DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 3, 5-8, 10-13, 15, 17 and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Brodie et al (US Patent Application Publication 2021/0280386) in view of Fujimoto et al (US Patent Application Publication 2007/0195326).
Regarding claim 1, Brodie et al disclose a system, comprising:
one or more memories 246; and
one or more processors 244, coupled to the one or more memories, configured to:
generate a profile scan or image based on one or more electron signals scattered from the sample 250 [see Fig. 3; see also paragraph 0039].
Brodie et al do not specify wherein the one or more processes are configured to apply a film to one or more of a side surface or a bottom surface, of a semiconductor structure of a wafer, at a depth different from a depth of a surface of the wafer, and wherein the sample is one or more of the film or the wafer. One such as Fujimoto et al disclose a system configured to apply a film 5 or one or more of a side surface or a bottom surface, of a semiconductor structure of a wafer 3, at a depth different from a depth of a surface of the wafer [see Figs. 9(a)-10(c); see also paragraph 0071], and wherein the system further is configured to generate a profile scan or image based on or more electron signals scattered from one or more of the film or the wafer [see paragraphs 0073 and 0075]. It would have been obvious to one of ordinary skill in the art at the time of invention to use the system of Brodie et al to generate a profile scan of the wafer and layer of Fujimoto et al in order to gather information about the deposition characteristics of the film, including but not limited to for purposes of preventing alignment errors during lithography processes [see paragraph 0072].
Regarding claim 3, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 1. Furthermore to the specifics of the semiconductor structure, Fujimoto et al disclose wherein at least one of the side surface or the bottom surface of the semiconductor structure is below the surface of the wafer [see Figs. 9(a)-10(c)].
Regarding claim 5, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 1. Furthermore to the specifics of the semiconductor structure, Fujimoto et al disclose wherein the one or more processes are further configured to:
apply the film to a top surface of the semiconductor structure [see Figs. 9(a)-10(c)].
Regarding claims 6 and 7, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 1. Furthermore, Brodie et al disclose wherein, to generate the profile scan or image, the one or more processors are configured to:
generate the profile scan or image based on a plurality and signal intensity of the one or more electron signals scattered from the sample [see Fig. 3; see also paragraph 0039], which when combined with the teachings of Fujimoto et al is the film and the wafer.
Regarding claim 8, Brodie et al disclose an electron microscope [see paragraph 0026], comprising:
one or more memories 246; and
one or more processors 244, coupled to the one or more memories, configured to:
emit an electron beam toward a sample 250; and
collect, based on emitting the electron beam, one or more backscattered electron signals from the sample to generate a profile scan or image [see Fig. 3; see also paragraph 0039].
Brodie et al do not specify wherein the sample comprises a wafer comprising a film applied to one or more of a side surface or a bottom surface of a semiconductor structure of a wafer, wherein at least one side surface of the one or more side surfaces is at a depth different from a depth of a surface of the wafer, or the wafer. One such as Fujimoto et al disclose a system configured to apply a film 5 or one or more of a side surface or a bottom surface, of a semiconductor structure of a wafer 3, at a depth different from a depth of a surface of the wafer [see Figs. 9(a)-10(c); see also paragraph 0071], and wherein the system further is configured to generate a profile scan or image based on or more electron signals scattered from one or more of the film or the wafer [see paragraphs 0073 and 0075]. It would have been obvious to one of ordinary skill in the art at the time of invention to use the system of Brodie et al to generate a profile scan of the wafer and layer of Fujimoto et al in order to gather information about the deposition characteristics of the film, including but not limited to for purposes of preventing alignment errors during lithography processes [see paragraph 0072].
Regarding claims 10-12, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 8. Furthermore, Brodie et al disclose wherein the one or more processors are further configured to:
generate the electron beam 201 [see Fig. 3], and provide the one or more backscattered electron signals 203 to a device for generating the profile scan or image based on the one or more backscattered electron signals, wherein the device is a scan processing device [see paragraph 0035].
Regarding claim 13, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 8. Furthermore, Brodie et al disclose wherein the one or more processors are further configured to:
scan the wafer while the electron beam is emitted [see Fig. 3].
Regarding claim 15, Brodie et al disclose a scan processing device, comprising:
one or more memories 246; and
one or more processors 244, coupled to the one or more memories, configured to:
receive an electron signal 203 backscattered from a wafer comprising a sample; and
generate a profile scan or image based on the electron signal[see Fig. 3; see also paragraph 0039].
Brodie et al do not specify wherein the sample comprises a wafer comprising a film applied to one or more of a side surface or a bottom surface of a semiconductor structure of a wafer, wherein at least one side surface of the one or more side surfaces is at a depth different from a depth of a surface of the wafer, or the wafer. One such as Fujimoto et al disclose a system configured to apply a film 5 or one or more of a side surface or a bottom surface, of a semiconductor structure of a wafer 3, at a depth different from a depth of a surface of the wafer [see Figs. 9(a)-10(c); see also paragraph 0071], and wherein the system further is configured to generate a profile scan or image based on or more electron signals scattered from one or more of the film or the wafer [see paragraphs 0073 and 0075]. It would have been obvious to one of ordinary skill in the art at the time of invention to use the system of Brodie et al to generate a profile scan of the wafer and layer of Fujimoto et al in order to gather information about the deposition characteristics of the film, including but not limited to for purposes of preventing alignment errors during lithography processes [see paragraph 0072].
Regarding claims 17 and 18, the prior art of Brodie et al and Fujimoto et al disclose the scan processing device of claim 15. Furthermore, Brodie et al disclose wherein, to generate the profile scan or image, the one or more processors are configured to:
generate the profile scan or image based on a signal intensity of the received electron signal [see Fig. 3; see also paragraph 0039] and determine the brightness or intensity for each portion of the profile scan or image based on the signal intensity of the backscattered electron signal at a corresponding position of the electron signal.
Claims 2, 4, 9, 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Brodie et al (US Patent Application Publication 2021/0280386) in view of Fujimoto et al (US Patent Application Publication 2007/0195326) as applied to claims 1, 8 and 15 above, and further in view of Waggoner et al (US Patent Application Publication 2018/0366340).
Regarding claims 2, 9 and 16, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 1, the electron microscope of claim 8, and the scan processing device of claim 15. Neither Brodie et al nor Fujimoto et al disclose wherein the film is a high atomic number material. One such as Waggoner et al disclose a film of high atomic number material, formed by sputtering on one or more of a side surface or a bottom surface of a semiconductor structure of a wafer, at a depth different from a depth of a surface of the wafer [see Fig. 11; see also paragraph 0046], such the film disclosed by Fujimoto et al, also by sputtering. It would have been obvious to one of ordinary skill in the art at the time of invention to form the film from a high atomic number material, for example to provide electrical contact between the wafer and external electrical components.
Regarding claim 4, the prior art of Brodie et al and Fujimoto et al disclose the system of claim 1. Neither Brodie et al nor Fujimoto et al disclose wherein at least one of the side surface or the bottom surface is above the surface of the wafer. One such as Waggoner et al disclose a film 1132 formed by sputtering on one or more of a side surface or a bottom surface of a semiconductor structure of a wafer, at a depth different from a depth of a surface of the wafer, wherein at least one of the side surface or the bottom surface is above the surface of the wafer 508 [see Fig. 11; see also paragraph 0046], such the film disclosed by Fujimoto et al, also by sputtering. It would have been obvious to one of ordinary skill in the art at the time of invention to form the film wherein at least one of the side surface or the bottom surface is above the surface of the wafer in order to utilize a dual damascene structure, as disclosed by Waggoner et al.
Regarding claim 20, the prior art of Brodie et al and Fujimoto et al disclose the scan processing device of claim 15; furthermore, as discussed above, Waggoner et al disclose a film of high atomic number material, formed by sputtering on one or more of a side surface or a bottom surface of a semiconductor structure of a wafer. None of Brodie et al, Fujimoto et al and Waggoner et al disclose with specificity wherein the film increases contrast, in the profile scan or image, between a surface of the wafer and the side surface of the semiconductor structure. However, one of ordinary skill in the art would recognize that the combination of the teachings of Brodie et al, Fujimoto et al and Waggoner et al would result in a substantially similar structure, subjected to a substantially similar scan, and would therefore result in a scenario where the film would function in a substantially similar manner; i.e., wherein it would increase contrast, in the profile scan or image, between a surface of the wafer and the side surface of the semiconductor structure. Moreover, it has been held that where the claimed and prior art products are identical or substantially identical in structure or composition, or are produced by identical or substantially identical processes, a prima facie case of either anticipation or obviousness has been established. In re Best, 562 F.2d 1252, 1255, 195 USPQ 430, 433 (CCPA 1977). “When the PTO shows a sound basis for believing that the products of the applicant and the prior art are the same, the applicant has the burden of showing that they are not.” In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed. Cir. 1990).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Brodie et al (US Patent Application Publication 2021/0280386) in view of Fujimoto et al (US Patent Application Publication 2007/0195326) as applied to claim 13 above, and further in view of Statham et al (US Patent Application Publication 2011/0129066).
Regarding claim 14, the prior art of Brodie et al and Fujimoto et al disclose the electron microscope of claim 13. Neither Brodie et al nor Fujimoto et al disclose wherein the one or more processors, to scan the wafer while the electron beam is emitted, are configured to: scan the wafer in a raster pattern. One such as Statham et al disclose a substantially similar processor configured to scan a sample [see Fig. 10], wherein the scan is in a raster pattern [see paragraphs 0073 and 0077]. It would have been obvious to one of ordinary skill in the art at the time of invention to scan the sample in a raster pattern because Statham et al disclose wherein the signal can be measured at each point in the raster and converted into a signal capable of being plotted with high resolution.
Allowable Subject Matter
Claim 19 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: regarding dependent claim 19, the prior art of record fails to teach or make reasonably obvious, in combination with the other claimed elements and with sufficient specificity, wherein a pitch of the profile scan or image dictates a granularity or sharpness of the profile scan or image.
Conclusion
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/C.E.S./Examiner, Art Unit 2899 /VICTOR A MANDALA/Primary Examiner, Art Unit 2899
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