DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This OA is in response to the amendment filled on 9/23/2026 that has been entered, wherein claims 1-11 are pending and claims 12-20 are canceled.
Election/Restrictions
Applicant’s election without traverse of Invention I, claims 1-11 in the reply filed on 9/23/2026 is acknowledged.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on5/5/2025 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-5 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yu (CN 115172276 A).
Regarding claim 1, Yu teaches a semiconductor device(Fig. 16), comprising:
a substrate(1);
an active region(101, ¶0046) in the substrate(1); and
a gate structure(103, 104,106, 107, ¶0074, ¶0083, ¶0086) in the active region(101, ¶0046), the gate structure(103, 104,106, 107, ¶0074, ¶0083, ¶0086) comprising a bottom conductive layer(103, ¶0074), a top conductive layer(104, ¶0074) on the bottom conductive layer(103, ¶0074), and a cap layer(107, ¶0086) on the top conductive layer(104, ¶0074), wherein a width of the top conductive layer(104, ¶0074) is less than a width of the bottom conductive layer(103, ¶0074), a bottom of the top conductive layer(104, ¶0074) is embedded in the bottom conductive layer(103, ¶0074), and a work function of the top conductive layer(104, ¶0074) is identical(¶0074, wherein the top conductive layer 104 and bottom conductive layer 103 are the same material) to a work function of the bottom conductive layer(103, ¶0074).
Regarding claim 2, Yu teaches the semiconductor device of claim 1, wherein the bottom conductive layer(103, ¶0074) comprises a bottom portion entirely below the top conductive layer(104, ¶0074) and a sidewall portion encircling the bottom of the top conductive layer(104, ¶0074).
Regarding claim 3, Yu teaches the semiconductor device of claim 1, wherein a material of the bottom conductive layer(103, ¶0074) and the top conductive layer(104, ¶0074) comprises titanium nitride(¶0061, ¶0069).
Regarding claim 4, Yu teaches the semiconductor device of claim 1, wherein a material of the cap layer(107, ¶0086) comprises silicon nitride(¶0086).
Regarding claim 5, Yu teaches the semiconductor device of claim 1, wherein an interface is present between the bottom conductive layer(103, ¶0074) and the top conductive layer(104, ¶0074).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Yu (CN 115172276 A) in view of Huh et al. (US 2013/0256770 A1).
Regarding claim 6, Yu teaches the semiconductor device of claim 1, further comprising: a first spacer(portion of 102 on 107, ¶0058) surrounding the cap layer(107, ¶0086); and
a third spacer(portion of 102 on 103, ¶0058) surrounding the bottom conductive layer(103, ¶0074),
Yu is not relied on to teach a thickness of the first spacer(portion of 102 on 107, ¶0058) is thicker than a thickness of the third spacer(portion of 102 on 103, ¶0058).
Huh teaches a semiconductor device(Fig. 62A) wherein a thickness of the first spacer(2339a, portion of 1224 on 2345, ¶0477) is thicker than a thickness of the third spacer(portion of 1224 on 2327a, ¶0477). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yu, so that a thickness of the first spacer is thicker than a thickness of the third spacer, as taught by Huh, in order to reduce or inhibit a leakage current in the second source/drain(¶0175).
Regarding claim 7, Yu teaches the semiconductor device of claim 6, wherein the first spacer(portion of 102 on 107, ¶0058) comprises a first portion of an oxide material(portion of 102 on 107, ¶0058).
Yu is not relied on to teach the first spacer(portion of 102 on 107, ¶0058) comprises a nitride layer in contact with the cap layer(107, ¶0086) and a first portion of an oxide material(portion of 102 on 107, ¶0058) between the nitride layer and the active region(101, ¶0046).
Huh teaches a semiconductor device(Fig. 62A) wherein the first spacer(2339a, portion of 1224 on 2345, ¶0477) comprises a nitride layer(2339a, metal-containing material layer, ¶0477, ¶0143-144) in contact with the cap layer(2345, ¶0477) and a first portion of an oxide material(1224, ¶0135, ¶0477) between the nitride layer(2339a, ¶0477) and the active region(1260, 1287, ¶0358). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yu, so that the first spacer comprises a nitride layer in contact with the cap layer and a first portion of an oxide material between the nitride layer and the active region, as taught by Huh, in order to reduce or inhibit a leakage current in the second source/drain(¶0175).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Yu (CN 115172276 A) in view of Kim et al. (US 2022/0077154 A1).
Regarding claim 11, Yu teaches the semiconductor device of claim 1, but is not relied on to teach an isolation region in the substrate(1); and
a dummy gate structure in the isolation region, wherein the dummy gate structure extends deeper than the gate structure(103, 104,106, 107, ¶0074, ¶0083, ¶0086) in the substrate(1).
Kim teaches a semiconductor device(Fig. 2) comprising an isolation region(110, ¶0017) in the substrate(101); and a dummy gate structure(GS inside of 110, ¶0017) in the isolation region(110, ¶0017), wherein the dummy gate structure(GS inside of 110, ¶0017) extends deeper(¶0023) than the gate structure(GE, ¶0086) in the substrate(101). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the device of Yu, to include an isolation region in the substrate; and a dummy gate structure in the isolation region, wherein the dummy gate structure extends deeper than the gate structure in the substrate, as taught by Kim in order to electrically isolate the active regions from each other(¶0021) and so that gate structure extends on an upper portion of the active regions while partially surrounding the side surfaces of the active regions(¶0023).
Allowable Subject Matter
Claims 8-10 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding independent claim 8, the prior art of record neither anticipates nor renders obvious the claimed subject matter of the instant application as a whole either taken alone or in combination, in particular, prior art of record does not teach “a second spacer surrounding the top conductive layer, wherein a thickness of the second spacer is thicker than a thickness of the third spacer.”
Claims 9 and 10 depend on claim 8 and inherit it’s allowable subject matter.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LAURA DYKES whose telephone number is (571)270-3161. The examiner can normally be reached M-F 9:30 am-5 pm.
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/LAURA M DYKES/Examiner, Art Unit 2892
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