DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1 -3, 5, 6, 8-10, 12 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Ding (US 2006/0030151 as cited on IDS) in view of Brynes (US 3,479,269).
Regarding claim 1, Ding teaches a method for fabricating a semiconductor device, comprising:
forming, within a physical vapor deposition (PVD) chamber (30, fig. 2) , a first layer by use of a PVD process on a surface of substrate (46) that comprises a plurality of features formed therein (Fig. 1, 5, and 6), wherein forming the first layer comprises biasing a target (60) within the process chamber [0027];
and etching, within the PVD chamber, at least a portion of the first layer, wherein the etching comprises: applying a substrate bias to an electrode disposed within a substrate support (44, Fig. 2) near a substrate receiving surface, wherein applying the substrate bias comprises delivering a voltage waveform to the electrode; and exposing the substrate (46) to a plasma generated within the PVD chamber [0037-0038].
Ding does not wherein applying the substrate bias comprises delivering a pulsed-voltage (PV) waveform to the electrode.
Byrnes is directed to sputtering etching a surface of a featured substrate with a pulsed negative voltage waveform (Fig. 2) applied to the substrate (col. 4) because it would allow etching of the surface to be maximized while preventing damage to the substrate (col. 4, ln. 50-60).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the substrate bias of Ding by applying the substrate bias comprises delivering a pulsed-voltage (PV) waveform to the electrode, as taught by Byrnes, because it would allow etching of the surface to be maximized while preventing damage to the substrate (col. 4, ln. 50-60).
Regarding claim 2, Ding does not teach delivering the PV waveform comprises: delivering a first voltage to the electrode disposed within the substrate support for a first period of time; and halting delivery of the first voltage to the electrode disposed within the substrate support for a second period of time.
Brynes teaches delivering the PV waveform comprises: delivering a first voltage to the electrode disposed within the substrate support for a first period of time; and halting delivery of the first voltage to the electrode disposed within the substrate support for a second period of time (Fig. 2).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the substrate bias of Ding by applying the substrate bias comprises d delivering the PV waveform comprises: delivering a first voltage to the electrode disposed within the substrate support for a first period of time; and halting delivery of the first voltage to the electrode disposed within the substrate support for a second period of time, as taught by Byrnes, because it would allow etching of the surface to be maximized while preventing damage to the substrate (col. 4, ln. 50-60).
Regarding claim 3, Ding teaches the first voltage is about negative 100 V to about negative 2000 V ([0038]).
Regarding claim 5, Ding teaches forming the first layer, and etching at least a portion of the first layer, occur simultaneously [0045-0048].
Regarding claim 6, Ding teaches the simultaneous forming and etching of the first layer cause a simultaneous deposition and redeposition of one or more materials of the first layer to improve step coverage [0046-0048].
Regarding claim 8, Ding teaches a method for fabricating a semiconductor device, comprising:
forming, within a first physical vapor deposition (PVD) chamber (30, fig. 2), a first layer on a surface of substrate that comprises a plurality of features formed therein (Fig. 1, 5, and 6), wherein forming the first layer comprises biasing a target (60) within the first PVD chamber [0027];
transferring the substrate (46) from the first PVD chamber to a second PVD chamber [0047];
and etching, within the second PVD chamber, at least a portion of the first layer, wherein the etching comprises: applying a substrate bias to an electrode disposed within a substrate support (44, fig. 2) near a substrate receiving surface, wherein applying the substrate bias comprises delivering a PV waveform to the electrode; and exposing the substrate (46) to a plasma generated within the second PVD chamber (pg. 5, [0038]).
Ding does not wherein applying the substrate bias comprises delivering a pulsed-voltage (PV) waveform to the electrode.
Byrnes is directed to sputtering etching a surface of a featured substrate with a pulsed negative voltage waveform (Fig. 2) applied to the substrate (col. 4) because it would allow etching of the surface to be maximized while preventing damage to the substrate (col. 4, ln. 50-60).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the substrate bias of Ding by applying the substrate bias comprises delivering a pulsed-voltage (PV) waveform to the electrode, as taught by Byrnes, because it would allow etching of the surface to be maximized while preventing damage to the substrate (col. 4, ln. 50-60).
Regarding claim 9, Ding does not teach delivering a first voltage to the electrode disposed within the substrate support for a first period of time; and halting delivery of the first voltage to the electrode disposed within the substrate support for a second period of time.
Brynes teaches delivering the PV waveform comprises: delivering a first voltage to the electrode disposed within the substrate support for a first period of time; and halting delivery of the first voltage to the electrode disposed within the substrate support for a second period of time (Fig. 2).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the substrate bias of Ding by applying the substrate bias comprises d delivering the PV waveform comprises: delivering a first voltage to the electrode disposed within the substrate support for a first period of time; and halting delivery of the first voltage to the electrode disposed within the substrate support for a second period of time, as taught by Byrnes, because it would allow etching of the surface to be maximized while preventing damage to the substrate (col. 4, ln. 50-60).
Regarding claim 10, Ding teaches first voltage is about negative 100 V to about negative 2000 V [0038].
Regarding claim 12, Ding teaches performing steps 134, 136 and 138 in reactor 30 of figure 2 or “other copper sputter reactor” [0047]. Therefore Ding teaches biasing a target within the second process chamber, and etching at least a portion of the first layer, occur simultaneously [0046-0047]].
Regarding claim 13, Ding teaches the simultaneous biasing the target, and etching of the first layer, within the second process chamber, cause a simultaneous deposition and redeposition of one or more materials of the first layer to improve step coverage [0046-0047].
Claim 4 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Ding and Brynes as applied to claims 1 and 8 above, and further in view of Tanaka (US 5,976,327).
Regarding claims 4 and 11, Ding does not teach adjusting a first voltage of the PV waveform to adjust a depth of etching of at least the portion of the first layer. Ding teaches the first voltage is about negative 100 V to about negative 2000 V [0038].
Tanaka directed to sputtering material into a via and sputtering that material to effect via coverage by modulating the waveform applied to the substrate holder. Tanaka teaches adjusting a first voltage of the PV waveform to adjust a depth of etching of at least the portion of the first layer (Fig. 1a, 1b, 3; col. 5).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the plasma in the process chamber of Ding by adjusting a first voltage of the PV waveform to adjust a depth of etching of at least the portion of the first layer, as taught by Tanaka, because it would produce desirable bottom coverage with minimal overhang formation (col. 5, ln. 48-50).
Claim 7 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Ding and Brynes as applied to claims 1 and 8 above, and further in view of Simamura (US 4,963,239 as cited on IDS).
Regarding claim 7, Ding does not teach altering a radial distribution of the plasma generated within the process chamber, wherein altering the radial distribution of the plasma further comprises delivering an electric current to one or more electromagnet assemblies aligned around the process chamber.
Shimamura teaches altering a radial distribution of the plasma generated within the process chamber, wherein altering the radial distribution of the plasma further comprises delivering an electric current to one or more electromagnet assemblies aligned around the process chamber (col. 20, ln. 25-50; clm 10).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the plasma in the process chamber of Ding by altering a radial distribution of the plasma generated within the process chamber, wherein altering the radial distribution of the plasma further comprises delivering an electric current to one or more electromagnet assemblies aligned around the process chamber, as taught by Shimamura, because it would improve the distribution of film on a substrate and extend the life of the sputtering target (col. 20, ln. 38-44).
Regarding claim 14, Ding does not teach altering a radial distribution of the plasma generated within the second process chamber, wherein altering the radial distribution of the plasma further comprises delivering an electric current to one or more electromagnet assemblies aligned around the second process chamber.
Shimamura teaches altering a radial distribution of the plasma generated within the process chamber, wherein altering the radial distribution of the plasma further comprises delivering an electric current to one or more electromagnet assemblies aligned around the process chamber (col. 20, ln. 25-50; clm 10).
Therefore it would have been obvious to one of ordinary skill in the art at the time of the invention to modify the plasma in the process chamber of Ding by altering a radial distribution of the plasma generated within the second process chamber, wherein altering the radial distribution of the plasma further comprises delivering an electric current to one or more electromagnet assemblies aligned around the second process chamber, as taught by Shimamura, because it would improve the distribution of film on a substrate and extend the life of the sputtering target (col. 20, ln. 38-44).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN J BRAYTON whose telephone number is (571)270-3084. The examiner can normally be reached 9AM-5PM EST M-F.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Lin can be reached at 571 272 8902. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
JOHN J. BRAYTON
Primary Examiner
Art Unit 1794
/JOHN J BRAYTON/Primary Examiner, Art Unit 1794
Prosecution Insights