Prosecution Insights
Last updated: July 17, 2026
Application No. 18/629,044

SEMICONDUCTOR PACKAGE WITH DOUBLE-SIDED THERMAL SOLUTION AND METHOD FOR FORMING THE SAME

Non-Final OA §103
Filed
Apr 08, 2024
Priority
Dec 19, 2023 — provisional 63/611,868
Examiner
NGUYEN, KHIEM D
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
1911 granted / 2229 resolved
+25.7% vs TC avg
Moderate +12% lift
Without
With
+12.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
54 currently pending
Career history
2272
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
69.9%
+29.9% vs TC avg
§102
17.2%
-22.8% vs TC avg
§112
9.0%
-31.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 2229 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The IDS filed on August 26th, 2025 has been considered. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 7, 8, 11, 13-16, and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (U.S. Pub. 2024/0096730) in view of Dede et al. (U.S. Patent 10,149,413). In re claim 1, Kim discloses a semiconductor package 100, comprising a substrate 180 having an upper surface and a lower surface (see paragraph [0059] and fig. 2); a plurality of first integrated circuit devices (142a,142b,142c) mounted on the upper surface (see paragraph [0067] and fig. 2); a plurality of second integrated circuit devices (152a,152b,152c) mounted on the lower surface (see paragraph [0086] and fig. 2); a first heat spreader 110 located over the plurality of first integrated circuit devices (142a,142b,142c) (see paragraph [0038] and fig. 2); a second heat spreader 130 located over the plurality of second integrated circuit devices (142a,142b,142c) (see paragraph [0038] and fig. 2). PNG media_image1.png 537 821 media_image1.png Greyscale Kim is silent to wherein the first heat spreader and the second heat spreader are a first vapor-chamber (VC) heat spreader located over the plurality of first integrated circuit devices; a second VC heat spreader located over the plurality of second integrated circuit devices; and a heat-transfer member thermally coupling the first VC heat spreader and the second VC heat spreader. However, Dede discloses in a same field of endeavor, a semiconductor package, including, inter-alia, a plurality of first integrated circuit devices 112 (see col. 4, lines 3-14 and fig. 3); a first vapor-chamber (VC) heat spreader 306 located over the plurality of first integrated circuit devices 112; a second VC heat spreader 308 located over the plurality of first integrated circuit devices 112; and a heat-transfer member 310 thermally coupling the first VC heat spreader 306 and the second VC heat spreader 308 (see col. 6, lines 22-48 and fig. 3). PNG media_image2.png 491 795 media_image2.png Greyscale Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Dede into the semiconductor package of Kim in order to enable wherein the first heat spreader and the second heat spreader are a first vapor-chamber (VC) heat spreader located over the plurality of first integrated circuit devices; a second VC heat spreader located over the plurality of second integrated circuit devices; and a heat-transfer member thermally coupling the first VC heat spreader and the second VC heat spreader in Kim to be formed in order to dissipate heat projected through the double-sided cooler and thus improve reliability and increase durability of the semiconductor package while reducing natural aging and/or damage to the semiconductor package. Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id. In re claim 7, as applied to claim 1 above, Kim in combination with Dede discloses wherein the semiconductor package further a heat sink 104 attached to the first VC heat spreader 306 (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 8, as applied to claim 7 above, Kim in combination with Dede discloses wherein the first VC heat spreader 306 is in thermal contact with the first integrated circuit devices 112 on a first side of the first VC heat spreader 306 through a thermal interface material 128, and the heat sink 104 is attached to a second side of the first VC heat spreader 306 opposite the first side (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 11, as applied to claim 1 above, Kim in combination with Dede discloses wherein the semiconductor package further comprising a heat sink 118 attached to the first integrated circuit devices 112 through a thermal interface material 128, wherein the first VC heat spreader 104 is located over and in thermal contact with heat sink 118, and the heat sink 118 is located between the first VC heat spreader 104 and the first integrated circuit devices 112 (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 13, Kim discloses a semiconductor package 100, comprising a substrate 180 having a first surface and a second surface (see paragraph [0053] and fig. 2); a plurality of first package components (142a,142b,142c) mounted on the first surface (see paragraph [0067] and fig. 2); a plurality of second package components (152a,152b,152c) mounted on the second surface (see paragraph [0086] and fig. 2); a first heat spreader 110 located over the plurality of first package components (142a,142b,142c) (see paragraph [0038] and fig. 2); and a second heat spreader 130 located over the plurality of second package components (152a,152b,152c) (see paragraph [0038] and fig. 2). Kim is silent to where the first heat spreader and the second heat spreader are a first vapor-chamber (VC) heat spreader located over the plurality of first package components; and a second VC heat spreader located over the plurality of second package components, the second VC heat spreader comprising: a main body; and a heat-transfer channel extended continuously from the main body to thermally contact the first VC heat spreader. However, Dede discloses in a same field of endeavor, a semiconductor package, including, inter-alia, a plurality of first package components 112 (see col. 4, lines 3-14 and fig. 1), a first vapor-chamber (VC) heat spreader 306 located over the plurality of first package components 112; and a second VC heat spreader 308 located over the plurality of first package components 112, the second VC heat spreader 308 comprising a main body; and a heat-transfer channel 310 extended continuously from the main body to thermally contact the first VC heat spreader 306 (see col. 6, lines 22-48 and fig. 3). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Dede into the semiconductor package of Kim in order to enable a first vapor-chamber (VC) heat spreader located over the plurality of first package components; and a second VC heat spreader located over the plurality of second package components, the second VC heat spreader comprising a main body; and a heat-transfer channel extended continuously from the main body to thermally contact the first VC heat spreader in Kim to be formed in order to dissipate heat projected through the double-sided cooler and thus improve reliability and increase durability of the semiconductor package while reducing natural aging and/or damage to the semiconductor package. Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id. In re claim 14, as applied to claim 13 above, Kim in combination with Dede discloses wherein no bonding interface is formed between the main body and the heat-transfer channel 310 of the second VC heat spreader 308 (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 15, as applied to claim 13 above, Kim in combination with Dede discloses wherein the first surface is an upper surface and the second surface is a lower surface of the substrate 180 (see paragraph [0053] and fig. 2 of Kim). In re claim 16, as applied to claim 15 above, Kim in combination with Dede discloses wherein the semiconductor package further comprising a heat sink comprising fin structures attached to the first VC heat spreader (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 19, Kim discloses a method of dissipating heat from a semiconductor package 100, comprising providing a package structure comprising a substrate 180 (see paragraph [0053] and fig. 2), a plurality of first integrated circuit devices (142a,142b,142c) mounted on an upper surface of the substrate 180 (see paragraph [0067] and fig. 2), and a plurality of second integrated circuit devices (152a,152b,152c) mounted on a lower surface of the substrate 180 (see paragraph [0086] and fig. 2); disposing a first heat spreader 110 to be thermally coupled to the first integrated circuit devices (142a,142b,142c) (see paragraph [0038] and fig. 2); disposing a second heat spreader 130 to be thermally coupled to the second integrated circuit devices (152a,152b,152c) (see paragraph [0038] and fig. 2). Kim is silent to wherein depositing the first heat spreader and the second heat spreader are disposing a first vapor-chamber (VC) heat spreader to be thermally coupled to the first integrated circuit devices; disposing a second VC heat spreader to be thermally coupled to the second integrated circuit devices; and thermally coupling the first VC heat spreader and the second VC heat spreader using one or more heat-transfer channels so that heat energy can be transferred from the second VC heat spreader to the first VC heat spreader. However, Dede discloses in a same field of endeavor, a method of dissipating heat from a semiconductor package, including providing a plurality of first integrated circuit devices 112 (see col. 4, lines 3-14 and fig. 3), disposing a first vapor-chamber (VC) heat spreader 306 to be thermally coupled to the first integrated circuit devices 112; disposing a second VC heat spreader 308 to be thermally coupled to the first integrated circuit devices 112; and thermally coupling the first VC heat spreader 306 and the second VC heat spreader 308 using one or more heat-transfer channels 310 so that heat energy can be transferred from the second VC heat spreader 308 to the first VC heat spreader 306 (see col. 6, lines 22-48 and fig. 3). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Dede into the method of dissipating heat semiconductor package of Kim in order to enable the process of disposing a first vapor-chamber (VC) heat spreader to be thermally coupled to the first integrated circuit devices; disposing a second VC heat spreader to be thermally coupled to the second integrated circuit devices; and thermally coupling the first VC heat spreader and the second VC heat spreader using one or more heat-transfer channels so that heat energy can be transferred from the second VC heat spreader to the first VC heat spreader in Kim to be performed in order to dissipate heat projected through the double-sided cooler and thus improve reliability and increase durability of the semiconductor package while reducing natural aging and/or damage to the semiconductor package. Furthermore, it would have been obvious because all the claimed elements were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods with no change in their respective functions, and the combination would have yielded predictable results to one of ordinary skill in the art at the time of the invention. KSR International Co. v. Teleflex Inc. (KSR), 550 U.S. 398 (2007). “If a technique has been used to improve one device, and a person of ordinary skill in the art would recognize that it would improve similar devices in the same way, using the technique is obvious unless its actual application is beyond that person’s skill.” Id. Claim(s) 2-6, 12, 18, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (U.S. Pub. 2024/0096730) in view of Dede et al. (U.S. Patent 10,149,413), as applied to claim 1 above, and further in view of Ku et al. (U.S. Pub. 2019/0385929). In re claim 2, as applied to claim 1 above, Kim being modified by Dede discloses wherein each of the first VC heat spreader 306 and the second VC heat spreader 308 has a substantially flat plate structure and includes a vapor chamber, and wherein the heat-transfer member 310 is a VC heat-transfer channel and has the same structure as the first VC heat spreader 306 and the VC second heat spreader 308 (see col. 6, lines 22-48 and fig. 3 of Dede). Kim and Dede are silent to wherein each of the first VC heat spreader and the second VD heat spreader includes a vapor chamber containing a two-phase vaporizable liquid sealed therein. However, Ku discloses in a same field of endeavor, a semiconductor package, including, inter-alia, wherein each of the first VC heat spreader and the second VD heat spreader includes a vapor chamber containing a two-phase vaporizable liquid sealed therein (see paragraph [0044] and fig. 1B). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Ku into the semiconductor package of Kim being modified by Dede in order to enable wherein each of the first VC heat spreader and the second VD heat spreader includes a vapor chamber containing a two-phase vaporizable liquid sealed therein in Kim to be formed in order to improve heat dissipation in 3D-IC package (see paragraph [0018] of Ku). In re claim 3, as applied to claim 2 above, Kim in combination with Dede and Ku discloses wherein the heat-transfer member is continuously extended from one VC heat spreader of the first VC heat spreader and the second VC heat spreader, and the heat-transfer member and the VC heat spreader share a single vapor chamber, and wherein a distal end of the heat-transfer member is in thermal contact with the other of the first VC heat spreader and the second VC heat spreader via a thermal interface material 111 (see paragraph [0027] and fig. 1A of Ku). In re claim 4, as applied to claim 2 above, Kim in combination with Dede and Ku discloses wherein the first VC heat spreader 306, the second VC heat spreader 308, and the heat-transfer member 310 are integrally formed and share a single continuous vapor chamber (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 5, as applied to claim 2 above, Kim in combination with Dede and Ku discloses wherein the heat-transfer member 310 is C-shaped or vertical linear (see col. 6, lines 22-48 and fig. 3 of Dede). In re claim 6, as applied to claim 1 above, Kim being modified with Dede are silent to wherein the semiconductor package further comprising a plurality of screws passing through the first VC heat spreader and the second VC heat spreader. However, Ku discloses in a same field of endeavor, a semiconductor package including, inter-alia, wherein the semiconductor package further comprising a plurality of screws 1017 passing through the first VC heat spreader and the second VC heat spreader (see paragraph [0089] and fig. 10). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Ku into the semiconductor package of Kim being modified by Dede in order to enable wherein the semiconductor package further comprising a plurality of screws passing through the first VC heat spreader and the second VC heat spreader in Kim to be formed in order to securing the first VC heat spreader and the second VC heat spreader to the system board. In re claim 12, as applied to claim 1 above, Kim in combination with Dede discloses wherein each of the first VC heat spreader 306 and the VC second heat spreader 308 has a substantially flat plate structure, and wherein the heat-transfer member 310 is a heat pipe and is connected to each of the first VC heat spreader 306 and the second VC heat spreader 308 through a thermal interface material or through soldering (see col. 6, lines 22-48 and fig. 3 of Dede). Kim and Dede are silent to wherein each of the first VC heat spreader and the VC second heat spreader includes a vapor chamber containing a two-phase vaporizable liquid sealed therein However, Ku discloses in a same field of endeavor, a semiconductor package, including, inter-alia, wherein each of the first VC heat spreader and the second VD heat spreader includes a vapor chamber containing a two-phase vaporizable liquid sealed therein (see paragraph [0044] and fig. 1B). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Ku into the semiconductor package of Kim being modified by Dede in order to enable wherein each of the first VC heat spreader and the second VD heat spreader includes a vapor chamber containing a two-phase vaporizable liquid sealed therein in Kim to be formed in order to improve heat dissipation in 3D-IC package (see paragraph [0018] of Ku). In re claim 18, as applied to claim 13 above, Kim and Dede are silent to wherein the semiconductor package further comprising a system board; and a plurality of screws passing through the first VC heat spreader, the second VC heat spreader, and the system board. However, Ku discloses in a same field of endeavor, a semiconductor package including, inter-alia, a system board 1011; and a plurality of screws 1017 passing through the first VC heat spreader, the second VC heat spreader, and the system board 1011 (see paragraph [0091] and fig. 10). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Ku into the semiconductor package of Kim being modified by Dede in order to enable wherein the semiconductor package further comprising a system board; and a plurality of screws passing through the first VC heat spreader, the second VC heat spreader, and the system board in Kim to be formed in order to securing the first VC heat spreader and the second VC heat spreader to the system board. In re claim 20, as applied to claim 19 above, Kim and Dede are silent to wherein heat generated by the first integrated circuit devices during operation is distributed on the first VC heat spreader in a two-dimensional manner, and heat generated by the second integrated circuit devices during operation is distributed on the second VC heat spreader in a two-dimensional manner. However, Ku discloses in a same field of endeavor, a semiconductor package, including, inter-alia, wherein heat generated by the first integrated circuit devices during operation is distributed on the first VC heat spreader in a two-dimensional manner, and heat generated by the second integrated circuit devices during operation is distributed on the second VC heat spreader in a two-dimensional manner (see paragraph [0044] and fig. 10). Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Ku into the semiconductor package of Kim being modified by Dede in order to enable wherein heat generated by the first integrated circuit devices during operation is distributed on the first VC heat spreader in a two-dimensional manner, and heat generated by the second integrated circuit devices during operation is distributed on the second VC heat spreader in a two-dimensional manner in Kim to be formed in order to improve heat dissipation in 3D-IC package (see paragraph [0018] of Ku). Allowable Subject Matter Claims 9, 10, and 17 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kobayashi et al. (U.S. Pub. 2014/0239488) discloses a semiconductor package 1, including, inter-alia, a substrate 31 having an upper surface and a lower surface (see paragraph [0027] and fig. 1); an integrated circuit device 32 mounted on the upper surface (see paragraph [0027] and fig. 1); a first heat spreader 6 located over the first integrated circuit device 32 (see paragraph [0031] and fig. 1), a system board 2 (see paragraph [0035] and fig. 1); and a plurality of screws 51 passing through the first heat spreader 6 and the system board 2 (see paragraph [0036] and fig. 1). Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHIEM D NGUYEN whose telephone number is (571)272-1865. The examiner can normally be reached Monday-Friday 8:00 AM - 6:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KHIEM D NGUYEN/Primary Examiner, Art Unit 2892
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Prosecution Timeline

Apr 08, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+12.5%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 2229 resolved cases by this examiner. Grant probability derived from career allowance rate.

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