Prosecution Insights
Last updated: May 29, 2026
Application No. 18/631,426

SEMICONDUCTOR DEVICE STRUCTURE INCLUDING A VERTICAL FUSE STRUCTURE

Non-Final OA §103
Filed
Apr 10, 2024
Priority
Mar 28, 2024 — divisional of 18/619,520
Examiner
ENAD, CHRISTINE A
Art Unit
2811
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nanya Technology Corporation
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
1114 granted / 1323 resolved
+16.2% vs TC avg
Moderate +10% lift
Without
With
+10.2%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
46 currently pending
Career history
1389
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
86.3%
+46.3% vs TC avg
§102
3.2%
-36.8% vs TC avg
§112
1.3%
-38.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1323 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 1 is rejected under 35 U.S.C. 103 as being unpatentable over Sherrima et al (US Patent No. 10,446,488) in view of Li (US Publication No. 2022/0246625). Regarding claim 1, Sherrima discloses a semiconductor device structure, comprising: a substrate Fig 3, 109 having a first surface and a second surface opposite to the first surface Fig 3; a fuse structure Fig 3, 111/113 penetrating the semiconductor substrate from the first surface to the second surface of the semiconductor substrate; and a circuit region electrically connected to the fuse structure (Column 5, lines 1-4, Column 7, line 64-Column 8, line 43). Sherrima disclose all the limitations but silent on the type of substrate. Whereas Li discloses a semiconductor substrate¶0017 Fig 2G, 102 having a first surface and a second surface opposite to the first surface Fig 2G; a fuse structure Fig 2G, 20 penetrating the semiconductor substrate Fig 2G and a circuit region electrically connected to the fuse structure Fig 2G. Sherrima and Li are analogous art because they are directed to fuse structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Sherrima because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Sherrima and incorporate the type of substrate taught by Li since it has been held to be within the general skill of a worker in the art to select a known material on the basis of its suitability for the intended use as a matter of design choice. In re Leshin, 125 USPQ 416 (1960). Claims 2-9 are rejected under 35 U.S.C. 103 as being unpatentable over Sherrima et al (US Patent No. 10,446,488) in view of Li (US Publication No. 2022/0246625) and in further in view of Cheng et al (US Publication No. 2018/0323202). Regarding claim 2, Sherrima and Li discloses all the limitations but silent on an arrangement of the fuse element with a fuse medium. Whereas Cheng discloses wherein the fuse structure comprises a first fuse element, a second fuse element, and a fuse medium arranged along a first direction from the first surface to the second surface of the semiconductor substrate ¶0035-0038 Fig 6-8A. Sherrima, Li and Cheng are analogous art because they are directed to semiconductor devices having a fuse structure and one of ordinary skill in the art would have had a reasonable expectation of success to modify Sherrima because they are from the same field of endeavor. Therefore it would have been obvious to one having ordinary skill of the art before the effective filing date of the claimed invention to modify the device of Sherrima and incorporate the teachings of Cheng as an alternative arrangement to improve device performance. Regarding claim 3, Cheng discloses wherein the first fuse element has a first surface exposed by the first surface of the substrate Fig 5. Regarding claim 4, Sherrima in view of Li discloses wherein the first fuse element has a second surface, opposite to the first surface, exposed by the second surface of the semiconductor substrate Fig 3 and Fig 4. Regarding claim 5, Sherrima in view of Li discloses wherein the second fuse element is disposed within the semiconductor substrate Fig 3 and Fig 4. Regarding claim 6, Sherrima in view of Li discloses wherein the second fuse element has a surface exposed by the second surface of the semiconductor substrate Fig 3 and Fig 4. Regarding claim 7, Cheng in view of Sherrima discloses wherein the fuse medium is embedded within the semiconductor substrate Fig 7. Regarding claim 8, Sherrima, Li and Cheng discloses all the limitation except for the shape/arrangement of the fuse structure. It would have been an obvious matter of design choice to modify the shape, since such a modification would have involved a mere change in the shape of a component. A change in shape is generally recognized as being within the level of ordinary skill in the art. In reDailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Regarding claim 9, Li discloses a conductive via disposed over the second surface of the semiconductor substrate; and a conductive layer disposed over the conductive via, wherein the circuit region is electrically connected to the fuse structure through the conductive via and the conductive layer Fig 2G. Allowable Subject Matter Claims 10-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHRISTINE A ENAD whose telephone number is (571)270-7891. The examiner can normally be reached Monday-Friday, 7:30 am -4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571 272 1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CHRISTINE A ENAD/Primary Examiner, Art Unit 2811
Read full office action

Prosecution Timeline

Apr 10, 2024
Application Filed
May 13, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
94%
With Interview (+10.2%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1323 resolved cases by this examiner. Grant probability derived from career allowance rate.

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