Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-10 in the reply filed on 08/10/2026 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, and 9 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim, US 20220399340.
Regarding claim 1, Kim discloses : A memory device, comprising: at least one transistor having a dual gate structure comprising a first gate metal and a second gate metal(Fig. 2, #hwg and #lwg), wherein the first gate metal has a first work function and the second gate metal has a second work function that is higher than the first work function(#hwg has a higher work function than #lwg [0044]).
Regarding claim 2, Kim discloses : The memory device of claim 1, wherein the first work function is less than 4.55 eV and the second work function is greater than 4.55 eV(#hwg may have a higher work function than 4.5 eV and #lwg may have a work function lower than 4.5 eV [0044]).
Regarding claim 4, Kim discloses : The memory device of claim 1, further comprising a bit line that contacts or is near the second gate metal (Fig. 2, #hwg near #BL) and a storage node that contacts or is near the first gate metal(#lwg near #cap).
Regarding claim 9, Kim discloses : The memory device of claim 1, wherein the memory device is a dynamic random access memory (DRAM)(#MC related to dram [0028]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim, US 20220399340 in view of Oh, US 20180061996.
Regarding claim 3, Kim discloses : The memory device of claim 1.
Kim teaches : wherein the first gate metal comprises at least one of tantalum (Ta), tungsten (W), titanium nitride (TiN), titanium (Ti), or N+ polysilicon(#lwg may include polysilicon doped with an n-type dopant [0044]).
Kim does not disclose : wherein the second gate metal comprises at least one of nickel (Ni), cobalt (Co), platinum (Pt), palladium (Pd), ruthenium (Ru), or molybdenum (Mo).
However, in the same field of endeavor, Oh teaches : wherein the second gate metal comprises at least one of nickel (Ni), cobalt (Co), platinum (Pt), palladium (Pd), ruthenium (Ru), or molybdenum (Mo)(gate metals may include Mo [0035]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Oh to Kim to have a gate metal comprise of molybdenum.
Claim(s) 5-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim, US 20220399340 in view of Oh, US 20170110511, hereafter ‘511.
Regarding claim 5, Kim discloses : The memory device of claim 1.
Kim does not disclose : wherein the first gate metal and the second gate metal are disposed on a spacer, wherein the first gate metal extends over about 50% of the spacer, and wherein the second gate metal extends over a remaining area of the spacer.
However, in the same field of endeavor, ‘511 teaches : wherein the first gate metal and the second gate metal are disposed on a spacer(Fig. 4, #125), wherein the first gate metal extends over about 50% of the spacer(#131 covers about 50% of #125), and wherein the second gate metal extends over a remaining area of the spacer(#133 over the remaining part of spacer).
It would have been an obvious matter of design choice to change the size of a first and second gate, since such a modification would have involved a mere change in the size of component. A change in size is generally recognized as being within the level of ordinary skill in the art. In re Rose, 105 USPQ 237 (CCPA 1955). See MPEP 2144.04.
Regarding claim 6, Kim as modified by ‘511 discloses : The memory device of claim 5.
‘511 teaches : wherein the first gate metal and the second gate metal do not overlap(Fig. 4, #131 and #133 do not overlap).
Regarding claim 7, Kim as modified by ‘511 discloses : The memory device of claim 5, wherein the first gate metal and the second gate metal overlap about 10% to about 20%(High work function electrode and low work function electrode may overlap [0116]).
Regarding claim 8, Kim as modified by Oh discloses : The memory device of claim 5.
Kim teaches : further comprising a channel on each side of the spacer(#Fig. 2, #CH), wherein the channel has a thickness of about 5 nm to about 40 nm(#CH may be a thickness of 10nm or less [0039]).
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kim, US 20220399340 in view Pawlak et al, US 20180374753.
Regarding claim 10, Kim discloses : The memory device of claim 1.
Kim does not disclose : further comprising: a scaffold comprising a plurality of alternating layers of silicon (Si) and silicon germanium (SiGe); and at least one nitride layer.
However, in the same field of endeavor, Pawlek teaches : further comprising: a scaffold comprising a plurality of alternating layers of silicon (Si) and silicon germanium (SiGe); and at least one nitride layer(Fig. 9a, #204 may be silicon, #206 may be silicon germanium, and #217 may be silicon carbon nitride [0039-0040]).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to apply the teachings of Pawlek to Kim to allow for further size scaling (Pawklek [0008]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure : US 20080251825 – Gate electrodes with different work functions.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVE TAN whose telephone number is (571)272-6841. The examiner can normally be reached M-F: 8-4 PST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHAD DICKE can be reached at (571) 270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/D.T./Examiner, Art Unit 2897 /CHAD M DICKE/Supervisory Patent Examiner, Art Unit 2897
Prosecution Insights