Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of claims 1-4, 6-7, 10-13, and 16-20 in the reply filed on August 18, 2026 is acknowledged. Claims 5, 8-9, and 14-15 are withdrawn from further consideration.
Information Disclosure Statement
The information disclosure statements (IDS)s submitted on April 12, 2024 and January 23, 2025 were filed before the mailing of a first Office action on the merits. The submissions are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-4, 10-11, and 17-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsieh (US 2022/0149161).
Regarding Claim 1:
Hsieh discloses a semiconductor device, comprising:
a body of semiconductor material (N epitaxial layer and N+ substrate, See fig. 2, ref. nos. 201, 202 and paragraph 23) comprising:
a top side (top surface of N epitaxial layer, See fig. 2, ref. no. 201);
a bottom side (bottom surface of N+ substrate, See fig. 2, ref. no. 202) opposite to the top side; and
a first conductivity type (the N epitaxial layer and the N+ substrate are N-type, See paragraph 23);
a trench (gate trench extending vertically downward from the from the top surface of the N epitaxial layer, See fig. 2, ref. no. 204 and paragraph 23. The examiner notes that center shielded gate trench MOSFET is being referred to in this rejection.) extending from the top side into the body of semiconductor material;
a stepped shield electrode (shielded gate electrode, See fig. 2, ref. no. 205 and paragraph 23) within the trench comprising:
a first portion (portion of the shielded gate electrode with a widest width, See fig. 2, ref. no. 205) comprising a first width; and
a second portion (portion of the shielded gate electrode with a narrowest width, See fig. 2, ref. no. 205) below and coupled to the first portion (the portion of the shielded gate electrode with the narrowest width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a second width less than the first width (the narrowest width is less than the widest width, See fig. 2, ref. no. 205);
a first dielectric (upper step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the first portion from the body of semiconductor material;
a second dielectric (lower step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the second portion from the body of semiconductor material;
a split gate electrode structure (split gate electrodes, See fig. 2, ref. no. 206 and paragraph 23) within the trench and comprising a first gate electrode (right gate electrode, See fig. 2, ref. no. 206) proximate to a first side (right side of the gate trench, See fig. 2, ref. no. 204) of the trench and second gate electrode (left gate electrode, See fig. 2, ref. no. 206) proximate to a second side (left side of the gate trench, See fig. 2, ref. no. 204) of the trench opposite to the first side, wherein the first gate electrode is laterally separated from the second gate electrode (the right gate electrode is laterally separated from the left gate electrode, See fig. 2, ref. no. 206);
a gate dielectric (second oxide layer, See fig. 2, ref. no. 208 and paragraph 23) separating the first gate electrode from the body of semiconductor material at the first side of the trench and separating the second gate electrode from the body of semiconductor material at the second side of the trench (the second oxide layer separates the right gate electrode from the right side of the trench and the left gate electrode from the left side of the trench, See fig. 2, ref. nos. 206 and 208); and
a third dielectric (third oxide layer, See fig. 2, ref. no. 209 and paragraph 23) separating the stepped shield electrode from the first gate electrode and the second gate electrode (the third oxide layer separates the right gate electrode from the shielded gate electrode and the left gate electrode from the shielded gate electrode, See fig. 2, ref. nos. 205, 206, and 209).
Regarding Claim 2:
Hsieh discloses wherein the stepped shield electrode comprises a third portion (portion of the shielded gate electrode with an intermediate width, See fig. 2, ref. no. 205) above and coupled to the first portion (the portion of the shielded gate electrode with the intermediate width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a third width less than the first width (the intermediate width is less than the widest width, See fig. 2, ref. no. 205).
Regarding Claim 3:
Hsieh discloses wherein the third dielectric laterally separates the third portion from the first gate electrode and the second gate electrode (the third oxide layer laterally separates the right gate electrode from the shielded gate electrode and the left gate electrode from the shielded gate electrode, See fig. 2, ref. nos. 205, 206, and 209); and the third dielectric comprises a thickness greater than that of the gate dielectric (a thickness of the third oxide layer between the shielded gate electrode and the right gate electrode is greater than a thickness of the second oxide layer between the right gate electrode and the right side of the trench, See fig. 2, ref. nos. 205, 206, 208, 209).
Regarding Claim 4:
Hsieh discloses wherein the first gate electrode comprises a first bottom side (the right gate electrode has an angled bottom surface, See fig. 2, ref. no. 206); the second gate electrode comprises a second bottom side (the left gate electrode has an angled bottom surface, See fig. 2, ref. no. 206); and the first portion of the stepped shield electrode comprises a top side (the portion of the shielded gate electrode with the widest width has top surfaces on the region that protrudes beyond the portion of the shielded gate electrode with the intermediate width and the right top surface of the portion of the shieled gate electrode with the widest width is below the angled bottom surface of the right gate electrode and the angled bottom surface of the left gate electrode, See fig. 2, ref. nos. 205 and 206) recessed below the first bottom side and the second bottom side.
Regarding Claim 10:
Hsieh discloses a first doped region (P body region near the top surface of the N epitaxial layer, See fig. 2, ref. nos. 201, 211 and paragraph 23) of a second conductivity type (P-type, See fig. 2, ref. nos. 201, 211 and paragraph 23) opposite the first conductivity type in the body of semiconductor material adjacent to the trench; and
a second doped region (N+ source region, See fig. 2, ref. no. 210 and paragraph 23) of the first conductivity type in the first doped region;
wherein the first portion of the stepped shield electrode and the first dielectric are adjacent to the body of semiconductor material at a location proximate to a bottom side of the first doped region (the portion of the shielded gate electrode with the widest width and the upper step portion of the two stepped oxide are near the N epitaxial layer at a located near a bottom side of the P body region, See fig. 2, ref. no. 205, 207, 211, and paragraph 23).
Regarding Claim 11:
Hsieh discloses a semiconductor device, comprising:
a body of semiconductor material (N epitaxial layer and N+ substrate, See fig. 2, ref. nos. 201, 202, and paragraph 23) comprising:
a top side (top surface of N epitaxial layer, See fig. 2, ref. no. 201);
a bottom side (bottom surface of N+ substrate, See fig. 2, ref. no. 202) opposite to the top side; and
a first conductivity type (the N epitaxial layer and the N+ substrate are N-type, See paragraph 23);
a trench (gate trench extending vertically downward from the from the top surface of the N epitaxial layer, See fig. 2, ref. no. 204 and paragraph 23. The examiner notes that center shielded gate trench MOSFET is being referred to in this rejection.) within the body of semiconductor material extending inward from the top side;
a stepped shield electrode (shielded gate electrode, See fig. 2, ref. no. 205 and paragraph 23) within the trench comprising:
a first portion (portion of the shielded gate electrode with a widest width, See fig. 2, ref. no. 205) comprising a first width;
a second portion (portion of the shielded gate electrode with a narrowest width, See fig. 2, ref. no. 205) below and coupled to the first portion (the portion of the shielded gate electrode with the narrowest width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a second width less than the first width (the narrowest width is less than the widest width, See fig. 2, ref. no. 205); and
a third portion (portion of the shielded gate electrode with an intermediate width, See fig. 2, ref. no. 205) above and coupled to the first portion (the portion of the shielded gate electrode with the intermediate width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a third width less than the first width (the intermediate width is less than the widest width, See fig. 2, ref. no. 205);
a first dielectric (upper step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the first portion from the body of semiconductor material;
a second dielectric (lower step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the second portion from the body of semiconductor material;
a split gate electrode structure (split gate electrodes, See fig. 2, ref. no. 206 and paragraph 23) within the trench and comprising a first gate electrode (right gate electrode, See fig. 2, ref. no. 206) proximate to a first side (right side of the gate trench, See fig. 2, ref. no. 204) of the trench and second gate electrode (left gate electrode, See fig. 2, ref. no. 206) proximate to a second side (left side of the gate trench, See fig. 2, ref. no. 204) of the trench opposite to the first side, wherein the first gate electrode is laterally separated from the second gate electrode (the right gate electrode is laterally separated from the left gate electrode, See fig. 2, ref. no. 206);
a gate dielectric (second oxide layer, See fig. 2, ref. no. 208 and paragraph 23) separating the first gate electrode from the body of semiconductor material at the first side of the trench and separating the second gate electrode from the body of semiconductor material at the second side of the trench (the second oxide layer separates the right gate electrode from the right side of the trench and the left gate electrode from the left side of the trench, See fig. 2, ref. nos. 206 and 208); and
a third dielectric (third oxide layer, See fig. 2, ref. no. 209 and paragraph 23) separating the third portion of the stepped shield electrode from the first gate electrode and the second gate electrode (the third oxide layer separates the right gate electrode and the left gate electrode from the portion of the shielded gate electrode with the intermediate width, See fig. 2, ref. nos. 205, 206, and 209), wherein the third dielectric is thicker than the gate dielectric (a thickness of the third oxide layer between the shielded gate electrode and the right gate electrode is greater than a thickness of the second oxide layer between the right gate electrode and the right side of the trench, See fig. 2, ref. nos. 205, 206, 208, 209).
Regarding Claim 17:
Hsieh discloses a first doped region (P body region near the top surface of the N epitaxial layer, See fig. 2, ref. nos. 201, 211 and paragraph 23) of a second conductivity type (P-type, See fig. 2, ref. nos. 201, 211 and paragraph 23) opposite the first conductivity type in the body of semiconductor material adjacent to the trench; and
a second doped region (N+ source region, See fig. 2, ref. no. 210 and paragraph 23) of the first conductivity type in the first doped region;
wherein the first portion of the stepped shield electrode and the first dielectric are adjacent to the body of semiconductor material at a location proximate to a bottom side of the first doped region (the portion of the shielded gate electrode with the widest width and the upper step portion of the two stepped oxide are near the N epitaxial layer at a located near a bottom side of the P body region, See fig. 2, ref. no. 205, 207, 211, and paragraph 23).
Regarding Claim 18:
Hsieh discloses a method of manufacturing a semiconductor device, comprising:
providing a body of semiconductor material (forming a N-channel shielded gate trench MOSFET in an N epitaxial layer extending onto an N+ substrate coated with a back metal layer on rear side, See fig. 2, ref. nos. 201, 202, and paragraph 23. The examiner notes the N epitaxial layer and the N+ substrate must be provided for the N-channel shielded gate trench MOSFET to be formed in them. The examiner also notes that in order to form the N-channel shielded gate trench MOSFET in the N epitaxial layer extending onto an N+ substrate coated with a back metal layer on rear side the elements that make up the N-channel shielded gate trench MOSFET must be formed.) comprising:
a top side (top surface of N epitaxial layer, See fig. 2, ref. no. 201);
a bottom side (bottom surface of N+ substrate, See fig. 2, ref. no. 202) opposite to the top side; and
a first conductivity type (the N epitaxial layer and the N+ substrate are N-type, See paragraph 23);
providing a trench (forming a gate trench extending vertically downward from the from the top surface of the N epitaxial layer, See fig. 2, ref. no. 204 and paragraph 23. The examiner notes that center shielded gate trench MOSFET is being referred to in this rejection.) extending from the top side into the body of semiconductor material;
providing a stepped shield electrode (forming a shielded gate electrode, See fig. 2, ref. no. 205 and paragraph 23) within the trench comprising:
a first portion (portion of the shielded gate electrode with a widest width, See fig. 2, ref. no. 205) comprising a first width; and
a second portion (portion of the shielded gate electrode with a narrowest width, See fig. 2, ref. no. 205) below and coupled to the first portion (the portion of the shielded gate electrode with the narrowest width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a second width less than the first width (the narrowest width is less than the widest width, See fig. 2, ref. no. 205);
providing a first dielectric (forming an upper step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the first portion from the body of semiconductor material;
providing a second dielectric (forming a lower step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the second portion from the body of semiconductor material;
providing a split gate electrode structure (forming split gate electrodes, See fig. 2, ref. no. 206 and paragraph 23) within the trench and comprising a first gate electrode (right gate electrode, See fig. 2, ref. no. 206) proximate to a first side (right side of the gate trench, See fig. 2, ref. no. 204) of the trench and second gate electrode (left gate electrode, See fig. 2, ref. no. 206) proximate to a second side (left side of the gate trench, See fig. 2, ref. no. 204) of the trench opposite to the first side, wherein the first gate electrode is laterally separated from the second gate electrode (the right gate electrode is laterally separated from the left gate electrode, See fig. 2, ref. no. 206);
providing a gate dielectric (forming a second oxide layer, See fig. 2, ref. no. 208 and paragraph 23) separating the first gate electrode from the body of semiconductor material at the first side of the trench and separating the second gate electrode from the body of semiconductor material at the second side of the trench (the second oxide layer separates the right gate electrode from the right side of the trench and the left gate electrode from the left side of the trench, See fig. 2, ref. nos. 206 and 208); and
providing a third dielectric (forming a third oxide layer, See fig. 2, ref. no. 209 and paragraph 23) separating the stepped shield electrode from the first gate electrode and the second gate electrode (the third oxide layer separates the right gate electrode from the shielded gate electrode and the left gate electrode from the shielded gate electrode, See fig. 2, ref. nos. 205, 206, and 209).
Regarding Claim 19:
Hsieh discloses providing stepped shield electrode comprises providing a third portion (forming portion of the shielded gate electrode with an intermediate width, See fig. 2, ref. no. 205) above and coupled to the first portion (the portion of the shielded gate electrode with the intermediate width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a third width less than the first width (the intermediate width is less than the widest width, See fig. 2, ref. no. 205);
providing the third dielectric comprises providing the third dielectric laterally separating the third portion from the first gate electrode and the second gate electrode (forming the third oxide layer laterally separating the right gate electrode from the shielded gate electrode and the left gate electrode from the shielded gate electrode, See fig. 2, ref. nos. 205, 206, and 209); and
the third dielectric comprises a thickness greater than that of the gate dielectric (a thickness of the third oxide layer between the shielded gate electrode and the right gate electrode is greater than a thickness of the second oxide layer between the right gate electrode and the right side of the trench, See fig. 2, ref. nos. 205, 206, 208, 209).
Regarding Claim 20:
Hsieh discloses providing the split gate electrode structure comprises:
providing the first gate electrode comprising a first bottom side (forming the right gate electrode with an angled bottom surface, See fig. 2, ref. no. 206); and
providing the second gate electrode comprising a second bottom side (forming the left gate electrode with an angled bottom surface, See fig. 2, ref. no. 206); and
providing the stepped shield electrode comprises providing the first portion comprising a top side recessed below the first bottom side and the second bottom side (forming the portion of the shielded gate electrode with the widest width includes forming top surfaces on the region that protrudes beyond the portion of the shielded gate electrode with the intermediate width and the right top surface of the portion of the shieled gate electrode with the widest width is below the angled bottom surface of the right gate electrode and the angled bottom surface of the left gate electrode, See fig. 2, ref. nos. 205 and 206).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 6-7, 11-13, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Baba et al. (US 2023/0073420) in view of Hsieh (US 2022/0149161).
Regarding Claim 1:
Baba discloses a semiconductor device, comprising:
a body of semiconductor material (semiconductor member, See figs. 1A-1B, 3-4, ref. no. 60, paragraphs 33-34 and 36-37) comprising:
a top side (upper surface of the semiconductor member, See figs. 3-4, ref. no. 62 and paragraph 37);
a bottom side (lower surface of the semiconductor member, See fig. 3-4, ref. no. 61 and paragraph 37) opposite to the top side; and
a first conductivity type (a drain layer, a drift layer, and a source layer of the semiconductor member are N-type, See figs. 3-4, ref. nos. 65, 66, 67 and paragraph 50);
a trench (trench formed from the upper surface into the semiconductor member, See figs. 3-4, ref. no. 63 and paragraph 37. The examiner notes that right trench is being referred to in this rejection.) extending from the top side into the body of semiconductor material;
a shield electrode (embedded lower electrode, See figs. 3-4, ref. no. 50 and paragraphs 47-48) within the trench;
a dielectric separating (insulating material of insulating member disposed between the embedded lower electrode and the semiconductor member, See figs. 3-4, ref. nos. 50, 60, 70, and paragraph 48) the shield electrode from the body of the semiconductor material;
a split gate electrode structure (two gate electrodes, See figs. 2-4, ref. no. 30 and paragraph 39) within the trench and comprising a first gate electrode (right gate electrode, See figs. 2-4, ref. no. 30) proximate to a first side (right side of the trench, See figs. 2-4, ref. nos. 30 and 63) of the trench and second gate electrode (left gate electrode, See figs. 2-4, ref. no. 30) proximate to a second side (left side of the trench, See figs. 2-4, ref. nos. 30 and 63) of the trench opposite to the first side, wherein the first gate electrode is laterally separated from the second gate electrode (the right gate electrode is laterally separated from the left gate electrode, See figs. 2-4, ref. no. 30);
a gate dielectric (insulating material of insulating member disposed between the gate electrodes and the semiconductor member, See figs. 2-4, ref. no. 30, 60, 70 and paragraph 49) separating the first gate electrode from the body of semiconductor material at the first side of the trench (the insulating material of insulating member separates the right gate electrode from the semiconductor member at the right side of the trench, See figs. 2-4, ref. nos. 30, 60, 63, and 70) and separating the second gate electrode from the body of semiconductor material at the second side of the trench (the insulating material of the insulating member separates the left gate electrode from the semiconductor member at the left side of the trench, See figs. 2-4, ref. nos. 30, 60, 63, and 70); and
a third dielectric (insulating material of the insulating member disposed between the right and left gate electrodes and above the embedded lower electrode, See figs. 3-4, ref. nos. 30, 50, and 70) separating the shield electrode from the first gate electrode and the second gate electrode (the insulating material of the insulating member disposed between the right and left gate electrodes and above the embedded lower electrode separates the right gate electrode from the embedded lower electrode and the left gate electrode from the embedded lower electrode, See figs. 3-4, ref. nos. 30, 50, and 70).
Baba does not disclose the shield electrode is a stepped shield electrode comprising:
a first portion comprising a first width; and
a second portion below and coupled to the first portion and comprising a second width less than the first width;
a first dielectric separating the first portion from the body of semiconductor material;
a second dielectric separating the second portion from the body of semiconductor material.
Hsieh discloses a stepped shield electrode (shielded gate electrode, See fig. 2, ref. no. 205 and paragraph 23) comprising:
a first portion (portion of the shielded gate electrode with a widest width, See fig. 2, ref. no. 205) comprising a first width; and
a second portion (portion of the shielded gate electrode with a narrowest width, See fig. 2, ref. no. 205) below and coupled to the first portion (the portion of the shielded gate electrode with the narrowest width is coupled to the portion of the shielded gate electrode with the widest width because both portions are part of the shielded gate electrode, See fig. 2, ref. no. 205) and comprising a second width less than the first width (the narrowest width is less than the widest width, See fig. 2, ref. no. 205);
a first dielectric (upper step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the first portion from the body of semiconductor material;
a second dielectric (lower step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the second portion from the body of semiconductor material;
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor device of Baba to modify the shape of the lower embedded electrode to be a stepped shape as taught by Hsieh in order to enhance the breakdown voltage and reduce the on-resistance of the semiconductor device. (See Hsieh paragraph 4.)
Regarding Claim 6:
The above stated combination of Baba and Hsieh discloses the stepped shield electrode comprises an elongate stepped shield electrode stripe (the modified lower embedded electrode has a stepped shape with a widest portion and a narrowest portion, See Hsieh fig. 2, ref. no. 205 and the modified lower embedded electrode has an elongate stripe shape, See Baba figs. 2-4, ref. no. 50 and paragraph 47), the first gate electrode comprises a first elongate gate electrode stripe (the right gate electrode has an elongate gate electrode stripe shape, See Baba figs. 2-4, ref. no. 30); and the second gate electrode comprises a second elongate gate electrode stripe (the left gate electrode has an elongate gate electrode stripe shape, See Baba figs. 2-4, ref. no. 30).
Regarding Claim 7:
The above stated combination of Baba and Hsieh discloses conductive regions (portions of the upper embedded electrodes above the upper ends of the two gate electrodes, See Baba figs. 2-3, ref. nos. 30, 40, and paragraphs 42-43) coupled to the elongate stepped shield electrode stripe along its length (the upper embedded electrodes are arranged intermittently along the Y direction, See Baba fig. 2, ref. no. 40 and paragraph 40).
Regarding Claim 11:
Baba discloses a semiconductor device, comprising:
a body of semiconductor material (semiconductor member, See figs. 1A-1B, 3-4, ref. no. 60, paragraphs 33-34 and 36-37) comprising:
a top side (upper surface of the semiconductor member, See figs. 3-4, ref. no. 62 and paragraph 37);
a bottom side (lower surface of the semiconductor member, See fig. 3-4, ref. no. 61 and paragraph 37) opposite to the top side; and
a first conductivity type (a drain layer, a drift layer and a source layer of the semiconductor member are N-type, See figs. 3-4, ref. nos. 65, 66, 67 and paragraph 50);
a trench (trench formed from the upper surface into the semiconductor member, See figs. 3-4, ref. no. 63 and paragraph 37. The examiner notes that right trench is being referred to in this rejection.) within the body of semiconductor material extending inward from the top side;
a shield electrode (shielded gate electrode, See fig. 2, ref. no. 205 and paragraph 23) within the trench comprising:
a second portion (lower embedded electrode, See figs. 3-4, ref. no. 50 and paragraphs 47-48) and comprising a second width (width of the lower embedded electrode, See figs. 3-4, ref. no. 50); and
a third portion (portion of upper embedded electrode below the upper ends of the two gate electrodes, See fig. 3, ref nos. 30, 33, 40 and paragraphs 42-43) and comprising a third width (width of the upper embedded electrode, See fig. 3, ref. no. 40. The examiner notes the lower embedded electrode and the upper embedded electrode have the same widths. See fig. 3, ref. nos. 40 and 50);
a second dielectric (insulating material of insulating member disposed between the embedded lower electrode and the semiconductor member, See figs. 3-4, ref. nos. 50, 70, and paragraph 48) separating the second portion from the body of semiconductor material;
a split gate electrode structure (two gate electrodes, See figs. 2-4, ref. no. 30 and paragraph 39) within the trench and comprising a first gate electrode (right gate electrode, See figs. 2-4, ref. no. 30) proximate to a first side (right side of the trench, See figs. 2-4, ref. nos. 30 and 63) of the trench and second gate electrode (left gate electrode, See figs. 2-4, ref. no. 30) proximate to a second side (left side of the trench, See figs. 2-4, ref. nos. 30 and 63) of the trench opposite to the first side, wherein the first gate electrode is laterally separated from the second gate electrode (the right gate electrode is laterally separated from the left gate electrode, See figs. 2-4, ref. no. 30);
a gate dielectric (insulating material of insulating member disposed between the gate electrodes and the semiconductor member, See figs. 2-4, ref. no. 30, 60, 70 and paragraph 49) separating the first gate electrode from the body of semiconductor material at the first side of the trench (the insulating material of insulating member separates the right gate electrode from the semiconductor member at the right side of the trench, See figs. 2-4, ref. nos. 30, 60, 63, and 70) and separating the second gate electrode from the body of semiconductor material at the second side of the trench (the insulating material of the insulating member separates the left gate electrode from the semiconductor member at the left side of the trench, See figs. 2-4, ref. nos. 30, 60, 63 and 70); and
a third dielectric (insulating material of the insulating member disposed between the right and left gate electrodes and above the embedded lower electrode, See figs. 3-4, ref. nos. 30, 50, and 70) separating the third portion of the shield electrode from the first gate electrode and the second gate electrode (the insulating material of the insulating member disposed between the right and left gate electrodes and above the embedded lower electrode separates the portion of the upper embedded electrode below the upper ends of the right and left gate electrodes from the right and left gate electrodes, See fig. 3, ref. nos. 30, 40, and 70), wherein the third dielectric is thicker than the gate dielectric (a thickness of the insulating material of the insulating member disposed between the right gate electrode and the portion of the upper embedded electrode below the upper ends of the right and left gate electrodes and the right gate electrode is greater than a thickness of the insulating material of the insulating member disposed between the right gate electrode and the semiconductor member at the right side of the trench, See fig. 3, ref. nos. 30, 60, 63, 70).
Baba does not disclose the shield electrode is a stepped shield electrode comprising a first portion comprising a first width with the first width being greater than the second width of the second portion and third width of the third portion, and a first dielectric separating the first portion from the body of the semiconductor material.
Hsieh discloses a stepped shield electrode (shielded gate electrode, See fig. 2, ref. no. 205 and paragraph 23) comprising:
a first portion (portion of the shielded gate electrode with a widest width, See fig. 2, ref. no. 205) comprising a first width;
a second portion (portion of the shielded gate electrode with a narrowest width, See fig. 2, ref. no. 205) comprising a second width less than the first width (the narrowest width is less than the widest width, See fig. 2, ref. no. 205); and
a third portion (portion of the shielded gate electrode with an intermediate width, See fig. 2, ref. no. 205) comprising a third width less than the first width (the intermediate width is less than the widest width, See fig. 2, ref. no. 205);
a first dielectric (upper step portion of the two stepped oxide, See fig. 2, ref. no. 207 and paragraph 23) separating the first portion from the body of semiconductor material.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor device of Baba to modify the shape of the lower embedded electrode to be a stepped shape as taught by Hsieh in order to enhance the breakdown voltage and reduce the on-resistance of the semiconductor device. (See Hsieh paragraph 4.)
Regarding Claim 12:
The above stated combination of Baba and Hsieh discloses the stepped shield electrode comprises an elongate stepped shield electrode stripe (the modified lower embedded electrode has a stepped shape with a widest portion and a narrowest portion, See Hsieh fig. 2, ref. no. 205 and the modified lower embedded electrode has an elongate stripe shape, See Baba figs. 2-4, ref. no. 50 and paragraph 47), the first gate electrode comprises a first elongate gate electrode stripe (the right gate electrode has an elongate gate electrode stripe shape, See Baba figs. 2-4, ref. no. 30); and the second gate electrode comprises a second elongate gate electrode stripe (the left gate electrode has an elongate gate electrode stripe shape, See Baba figs. 2-4, ref. no. 30).
Regarding Claim 13:
The above stated combination of Baba and Hsieh discloses a portion of the elongate stepped shield stripe is devoid of the third portion (the upper embedded electrodes are arranged intermittently along the Y direction, See Baba fig. 2, ref. no. 40 and paragraph 40).
Regarding Claim 16:
The above stated combination of Baba and Hsieh discloses a conductive region (portions of the upper embedded electrodes above the upper ends of the two gate electrodes, See Baba figs. 2-3, ref. nos. 30, 40, and paragraphs 42-43) coupled to the third portion, and a conductor over the top side coupled to the conductive region (metal film, See Baba fig. 3, ref. no. 46 and paragraph 43).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2018/0083110 to Kobayashi et al. discloses a MOSFET having a stepped field plate electrode (See figs. 1-2, ref. no. 20 and paragraphs 29-30 and 56).
US 2019/0123158 to Ohtani discloses a method of manufacturing a semiconductor device having a split gate electrode and a shield electrode (See figs. 1A-5D, paragraphs 15-19 and 34).
CN 113078066 A to Ming et al. discloses a split-gate power MOSFET device having a stepped separated gate electrode structure (See fig. 2, ref. no. 16, paragraphs n0004 and n0037). The examiner notes that the citations to paragraphs of Ming refer to paragraphs of the attached English language translation.
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/CALEEN O SULLIVAN/Primary Examiner, Art Unit 2899
/B.S./Examiner, Art Unit 2899
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