Prosecution Insights
Last updated: May 29, 2026
Application No. 18/634,497

Wet Processing Systems Having Novel Wafer Chuck Designs For Retaining A Processing Liquid On A Surface Of A Semiconductor Substrate

Non-Final OA §103
Filed
Apr 12, 2024
Priority
Mar 11, 2024 — continuation of 12/506,019
Examiner
GOLIGHTLY, ERIC WAYNE
Art Unit
1714
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Tokyo Electron Limited
OA Round
2 (Non-Final)
78%
Grant Probability
Favorable
2-3
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
668 granted / 860 resolved
+12.7% vs TC avg
Strong +25% interview lift
Without
With
+24.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 12m
Avg Prosecution
26 currently pending
Career history
886
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
77.5%
+37.5% vs TC avg
§102
4.7%
-35.3% vs TC avg
§112
9.5%
-30.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 860 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Applicant’s amendment filed 12/19/2025 is acknowledged. Claims 1-20 are pending. Claims 10-20 are withdrawn. Drawings The drawings were received on 12/19/2025. These drawings are acceptable. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-4, 8 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0244836 to Wang et al. (“Wang”) in view of US 2014/0017903 to Bello et al. (“Bello”). Regarding claim 1, Wang teaches a wet processing system for processing a semiconductor substrate (abstract, para [0002], [0024] – [0041], claim 1, Figs. 1-4), the wet processing system comprising: a processing chamber in which the semiconductor substrate can be received, the semiconductor substrate having a frontside surface, a backside surface, a peripheral edge region, a frontside center region that extends from a center of the frontside surface to the peripheral edge region and a backside center region (ref. 1005, note ref. 1001, para [0024], claim 1, Figs. 1 and 4) that extends from a center of the backside surface to the peripheral edge region; a wafer chuck disposed within the processing chamber (ref. 1002, para [0024], claim 1, Figs. 1 and 4) wherein the wafer chuck can support the semiconductor substrate received within the processing chamber; a processing liquid (para [0002], [0024], claim 18); and a liquid dispense nozzle positioned above the wafer chuck and capable of dispensing the processing liquid onto the frontside surface of the semiconductor substrate after the wafer chuck is activated to form a puddle of the processing liquid that covers an entirety of the frontside surface (ref. 1014, 1030, para [0024], [0028], claim 1, Figs. 1 and 4). Wang does not explicitly teach the system wherein activation of the wafer chuck clamps the backside center region of the semiconductor substrate onto a central planar region of the wafer chuck and elevates the peripheral edge region of the semiconductor substrate above the frontside center region of the semiconductor substrate to ensure that the frontside surface of the semiconductor substrate is concave; and wherein activation of the wafer chuck retains the puddle of the processing liquid dispensed onto the frontside surface by ensuring the frontside surface of the semiconductor substrate is concave before the processing liquid is dispensed onto the frontside surface. Initially, it is noted that the recited substrate is not positively claimed and is not interpreted to be a required structural feature of the claimed system. Bello teaches a system for processing a semiconductor substrate (abstract, para [0017] – [0026], claim 6, Figs. 2 and 3) including a chuck that applies a force to engage a center of a semiconductor surface and pins that may be selectively moved to push a periphery of the substrate away from the chuck (ref. 50, note ref. 30, para [0017] – [0024]), causing a support surface of the substrate to become spherically concave (para [0022] – [0026], Fig. 3), which is disclosed as advantageously improving circuit performance (para [0004] – [0006]). It would have been obvious to of ordinary skill in the art before the effective filing date of the invention to modify the Wang system in view of Bello wherein it includes a chuck that can apply a force to engage a center of a semiconductor surface and pins that may be selectively moved to push a periphery of the substrate away from the chuck, causing a support surface of the substrate to become spherically concave, with a reasonable expectation of success, in order to improve circuit performance. The Wang/Bello system appears to be fully capable of being operated in the recited manner, i.e. wherein activation of the wafer chuck clamps the backside center region of the semiconductor substrate onto a central planar region of the wafer chuck and elevates the peripheral edge region of the semiconductor substrate above the frontside center region of the semiconductor substrate to ensure that the frontside surface of the semiconductor substrate is concave; and wherein activation of the wafer chuck retains the puddle of the processing liquid dispensed onto the frontside surface by ensuring the frontside surface of the semiconductor substrate is concave before the processing liquid is dispensed onto the frontside surface (note Wang, para [0024], [0028], claim 1 and Figs. 1-4). Regarding claim 2, Wang/Bello disclose a system wherein the wafer chuck is can be activated by applying a vacuum pressure or an electrostatic charge to the wafer chuck (Bello, para [0022], [0024], claim 6, Fig. 3). Regarding claim 3, the Wang/Bello system appears to be fully capable of being operated in a manner wherein the liquid dispense nozzle dispenses the processing liquid onto the frontside surface of the semiconductor substrate while the wafer chuck is stationary, or spinning at a first rotational speed ranging between 0 to 50 rotations per minute (RPM), to form the puddle of the processing liquid on the frontside surface (note Wang, para [0024] – [0028], [0032]). Regarding claim 4, the Wang/Bello system appears to be fully capable of being operated in a manner wherein the processing liquid comprises an etching solution, a cleaning solution, a rinsing solution or a drying solution (note Wang, para [0002], [0024]). Regarding claim 8, Wang/Bello disclose a system wherein the wafer chuck further comprises: an edge support region positioned below the peripheral edge region of the semiconductor substrate to support the peripheral edge region (Bello, ref. 52, para [0027], Figs. 2 and 3), and the Wang/Bello system appears to be fully capable of being operated in the manner recited, i.e. wherein the edge support region of the wafer chuck is: (i) recessed below an upper surface of the central planar region of the wafer chuck when the semiconductor substrate is initially mounted onto the wafer chuck, and (ii) raised above the upper surface of the central planar region when the wafer chuck is activated to clamp the backside center region of the semiconductor substrate onto the central planar region of the wafer chuck (note Bello, para [0017] – [0026], Fig. 3). Regarding claim 9, Wang/Bello disclose a system wherein the edge support region of the wafer chuck comprises an annular support ring or a plurality of support pins (Bello, ref. 50, para [0022], Fig. 3), and the Wang/Bello system appears to be fully capable of being operated in the manner recited, i.e. wherein when the wafer chuck is activated, the annular support ring or the plurality of support pins are mechanically lifted to elevate the peripheral edge region of the semiconductor substrate above the frontside center region of the semiconductor substrate to ensure that the frontside surface of the semiconductor substrate is concave (note Bello, para [0017] – [0026], Fig. 3). Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0244836 to Wang et al. (“Wang”) in view of US 2014/0017903 to Bello et al. (“Bello”) and in further view of US 2023/0120387 to Mizunaga et al. (“Mizunaga”). Regarding claim 5, Wang/Bello do not explicitly teach the system wherein the wafer chuck further comprises one or more heating elements to control a temperature of the wafer chuck and ensure that the puddle of the processing liquid maintains a uniform temperature across the frontside surface of the semiconductor substrate. Mizunaga teaches a substrate processing apparatus (abstract) including a heating element configured to place a substrate thereon (para [0005]), which is disclosed as advantageously broadening the range of possible substrate treatments (para [0029] – [0032]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the Wang/Bello system in view of Mizunaga wherein the wafer chuck further comprises one or more heating elements, with a reasonable expectation of success, in order to broaden the range of possible substrate treatments. Since the Wang/Bello/Mizunaga system includes the claimed structural features, it appears to be fully capable of being operated in the manner recited, i.e. to control a temperature of the wafer chuck and ensure that the puddle of the processing liquid maintains a uniform temperature across the frontside surface of the semiconductor substrate. Claims 6 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over US 2019/0244836 to Wang et al. (“Wang”) in view of US 2014/0017903 to Bello et al. (“Bello”) and in further view of US 6,578,853 to Treur et al. (“Treur”). Regarding claim 6, Wang/Bello do not explicitly teach the system wherein the wafer chuck further comprises: an edge support region positioned below the peripheral edge region of the semiconductor substrate to support the peripheral edge region; and a plurality of spokes connecting the central planar region of the wafer chuck to the edge support region. Treur teaches a chuck assembly (abstract, col. 15, lines 36-43, claim 1, Figs. 7A and 7B) including an edge support region positionable below a peripheral edge region of a semiconductor substrate to support a peripheral edge region, and a plurality of spokes connecting a central planar region of the chuck to the edge support region (col. 15, lines 36-43, claim 1, Figs. 7A and 7B), which is disclosed as advantageously enhancing spin, rinse and dry operations on the surfaces of substrates while inhibiting substrate contamination risk (col. 3, line 17-20, col. 15, lines 36-43). It is noted that the recited substrate is not positively claimed and is not interpreted to be a required structural feature of the claimed system. It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the Wang/Bello system in view of Treur wherein the wafer chuck further comprises: an edge support region positioned below the peripheral edge region of the semiconductor substrate to support the peripheral edge region; and a plurality of spokes connecting the central planar region of the wafer chuck to the edge support region, with a reasonable expectation of success, in order to enhance spin, rinse and dry operations on the surfaces of substrates while inhibiting substrate contamination risk. Regarding claim 7, Wang/Bello/Treur disclose a system wherein the edge support region of the wafer chuck comprises a fixed annular support ring to support the peripheral edge region of the semiconductor substrate (Treur, Fig. 1, ref. 102b, col. 8, line 57 – col. 9, line 13) and appears to be fully capable of being operated in the manner wherein the fixed annular support ring is raised above an upper surface of the central planar region of the wafer chuck by a fixed amount, and wherein when the wafer chuck is activated to clamp the backside center region of the semiconductor substrate onto the central planar region of the wafer chuck, the fixed annular support ring elevates the peripheral edge region of the semiconductor substrate above the frontside center region of the semiconductor substrate to ensure that the frontside surface of the semiconductor substrate is concave (note Bello, para [0017] – [0026], Fig. 3). Response to Arguments Applicant's arguments filed 12/19/2025 have been fully considered but they are not persuasive. In response to applicant's argument that the present claims require components that not only form a puddle of the processing liquid that covers an entirety of the frontside surface of the semiconductor substrate, but also retains the puddle of the processing liquid dispensed onto the frontside surface by ensuring the frontside surface of the semiconductor substrate is concave before the processing liquid is dispensed onto the frontside surface (remarks, page 10, last para), a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Regarding applicant’s argument that the applied art apparatus is not capable of being used to form and retain a puddle of the processing liquid on a concave surface of a semiconductor substrate since, it is alleged, Bello does not teach or suggest that the stress-retention liner may be formed via a wet process (remarks, page 11, first para, page 12, last para), a recitation of the intended use of the claimed invention must result in a structural difference between the claimed invention and the prior art in order to patentably distinguish the claimed invention from the prior art. If the prior art structure is capable of performing the intended use, then it meets the claim. Regarding applicant’s argument that the applied art apparatus is not capable of being used to form and retain a puddle of the processing liquid on a concave surface of a semiconductor substrate since, it is alleged, the liquid pressures disclosed by Wang (e.g., 10 – 5000 psi) are too high to form an retain a puddle Wang discloses a shielding cover and chamber shroud to seal the process chamber and contain splashing (remarks, page 13, first and second full paras), it is not clear why liquid being splashed means that the liquid necessarily isn’t forming a puddle. That is, a portion of liquid may remain to puddle even as another portion of the liquid splashes away. Further, while Wang contemplates using a pressure as low as 10 psi, this does necessarily mean that the nozzle cannot be operated at a lower pressure than 10 psi. Regarding applicant’s assertion that the applied art system would likely create even more splashing due to the curvature of the substrate surface (remarks, page 13, para beginning “If the system”), it is not clear why such splashing would be more likely. Indeed, it seems that such a curvature could lead to splashing liquid striking a curved portion of the substrate and flowing back to a low center of the substrate to pool (rather than escaping the substrate’s boundary), which may consequently make a puddle more likely. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC GOLIGHTLY whose telephone number is (571)270-3715. The examiner can normally be reached M-F: 10 am - 7 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kaj Olsen can be reached at (571) 272-1344. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERIC W GOLIGHTLY/Primary Examiner, Art Unit 1714
Read full office action

Prosecution Timeline

Apr 12, 2024
Application Filed
Nov 28, 2025
Non-Final Rejection mailed — §103
Dec 19, 2025
Response Filed
Feb 09, 2026
Final Rejection mailed — §103
Mar 12, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+24.9%)
2y 12m (~10m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 860 resolved cases by this examiner. Grant probability derived from career allowance rate.

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