Prosecution Insights
Last updated: October 27, 2026
Application No. 18/642,184

SEMICONDUCTOR STRUCTURE AND METHOD OF FORMING THE SAME

Final Rejection §102§103
Filed
Apr 22, 2024
Examiner
RAHIM, NILUFA
Art Unit
2893
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
NANYA TECHNOLOGY Corporation
OA Round
2 (Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
83%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
404 granted / 483 resolved
+15.6% vs TC avg
Minimal -1% lift
Without
With
+-1.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
32 currently pending
Career history
518
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
46.6%
+6.6% vs TC avg
§102
27.7%
-12.3% vs TC avg
§112
21.6%
-18.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 483 resolved cases

Office Action

§102 §103
CTNF 18/642,184 CTNF 91257 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Specification 06-11 AIA The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15-aia AIA Claim(s) 1-3, 8 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Yen et al. (US 20230345703 A1; hereinafter “Yen”) . In re claim 1, Yen discloses in figs. 1, 2A-2G, a semiconductor structure, comprising: a plurality of bit-line structures 126b, 126b laterally spaced apart on a substrate 102 (¶11, 27); a buried contact 122, 128e between the bit-line structures 126b, 126b (¶24-25), wherein the buried contact comprises: a first conductive layer 122 ; and a second conductive layer 128e on the first conductive layer 122 , wherein the second conductive layer comprises: a main portion (e.g., an upper portion of 128e) ; and a protruding portion (e.g., a lower portion of 128e) extending from the main portion into the first conductive layer 122 . a landing pad 130 on the buried contact 122, 128e . In re claim 2, Yen discloses in figs. 1, 2A-2G, the semiconductor structure of claim 1, wherein the first conductive layer 122 surrounds and is in contact with the protruding portion (i.e., a lower portion of 128e) . In re claim 3, Yen discloses in figs. 1, 2A-2G, the semiconductor structure of claim 1, wherein a resistivity of the second conductive layer 128e (¶24) is lower than a resistivity of the first conductive layer 122 (¶21). In re claim 8, Yen discloses in figs. 1, 2A-2G, the semiconductor structure of claim 1, wherein the substrate 102 comprises an active region 106 (¶11), the buried contact 122, 128e is partially embedded in the substrate 102 and in contact with the active region 106 . 07-15-aia AIA Claim(s) 1, 9 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Ma et al. (US 20170345824 A1; hereinafter “Ma”) . In re claim 1, Ma discloses in figs. 20A-20B, a semiconductor structure, comprising: a plurality of bit-line structures BL laterally spaced apart on a substrate 100 (¶19, 22); a buried contact BC, 298a between the bit-line structures BL (¶25-28), wherein the buried contact BC comprises: a first conductive layer 290 (¶25); and a second conductive layer 296, 298a on the first conductive layer 290 (¶25), wherein the second conductive layer comprises: a main portion 298a ; and a protruding portion 296 extending from the main portion 298a into the first conductive layer 290 (e.g., the lower end portions of the upper plug 296 extend into the lower plug 290 ); and a landing pad 300a (¶28) on the buried contact BC, 298a . In re claim 9, Ma discloses in figs. 20A-20B, the semiconductor structure of claim 1, wherein each of the bit-line structures BL comprises a conductive stack (231a, 233a) and an insulation layer 240 on the conductive stack (231a, 233a) (¶23), and a top surface of the conductive stack (231a, 233a) is substantially coplanar to a top surface of the second conductive layer 296 (¶25) . 07-15-aia AIA Claim(s) 10, 11, 13, 15 is/are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Gong et al. (US 20220223597 A1; hereinafter “Gong”) . In re claim 10, Gong discloses in figs. 1-9, a method of forming a semiconductor structure, comprising: forming a plurality of bit-line structures 101 on a substrate 100, 102 (fig. 1; ¶29); forming a trench 11 in the substrate 100, 102 between the bit-line structures 101 ; forming a first conductive layer 113 in the trench 11 (figs. 2-3; ¶32-40); and forming a second conductive layer 104 on the first conductive layer 113 (fig. 4; ¶45-46), wherein a material of the first conductive layer is different from a material of the second conductive layer (“The doping concentration of the doping element in the first fill layer 113 , the doping concentration of the doping element in the bottom fill layer 104 and the doping concentration of the doping element in the top fill layer 105 are sequentially decreased”; ¶50), and the second conductive layer 104 comprises: a main portion (e.g., a portion above the gap 14; see figs. 3-4. Hereinafter “Main_P”) ; and a protruding portion (e.g., a portion inside the gap 14; see figs. 3-4) extending from the main portion (“Main_P”) into the first conductive layer 113 . In re claim 11, Gong discloses in figs. 1-9, the method of claim 10, wherein forming the first conductive layer in the trench comprises: depositing the material of the first conductive layer 103 in the trench 11 , wherein a void 12 is formed inside the material of the first conductive layer 103 (fig. 2; ¶32); and removing a top portion of the material of the first conductive layer 103 to expose the void 12 (fig. 3; ¶38). In re claim 13, Gong discloses in figs. 1-9, the method of claim 11, wherein forming the second conductive layer 104 on the first conductive layer 113 comprises: depositing the material of the second conductive layer 104 to cover the first conductive layer 113 and to fill the void 12 . In re claim 15, Gong discloses in figs. 1-9, the method of claim 10, further comprises forming a landing pad 105 on the second conductive layer 104 (fig. 5; ¶47) . Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-22-aia AIA Claim (s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yen , as applied to claim 1 above, and further in view of Lee et al. (US 20150061134 A1; hereinafter “Lee”) . In re claim 4, Yen discloses in figs. 1, 2A-2G, the semiconductor structure of claim 1, wherein the first conductive layer 122 comprises polysilicon (¶21). Yen does not expressly disclose the second conductive layer comprises cobalt. In the same field of endeavor, Lee discloses in figs. 1A-1E, a semiconductor structure, wherein a second conductive layer (9, 11a, 13a) of the buried contact BC comprises cobalt (e.g., contact 9 comprises cobalt silicide; ¶149) . It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Lee into Yen to reduce contact resistance of second conductive layer with polysilicon based first conductive layer . 07-21-aia AIA Claim (s) 5-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Ma, as applied to claim 1 above In re claim 5, Ma discloses the semiconductor structure of claim 1. Ma does not expressly disclose wherein a vertical thickness of the main portion is between 5 nm and 10 nm. However, it has been held to be within the general skill of a worker in the art to select a vertical thickness of the main portion 298a on the basis of its suitability for the intended use, e.g., sufficient enough to function as barrier patterns, as a matter of obvious design choice. In re Leshin , 125 USPQ 416. In Gardner v. TEC Systems, Inc. , 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied , 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. A person of ordinary skills in the art is motivated to select a vertical thickness of the main portion 298a in order to make barrier patterns sufficiently thick to protect the upper landing pad. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). In re claim 6, Ma discloses the semiconductor structure of claim 1. Ma does not expressly disclose wherein a vertical length of the protruding portion is between 20 nm and 50 nm. However, it has been held to be within the general skill of a worker in the art to select a vertical length of the protruding portion 296 on the basis of its suitability for the intended use, e.g., for improved reliability, as a matter of obvious design choice. In re Leshin , 125 USPQ 416. In Gardner v. TEC Systems, Inc. , 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied , 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. A person of ordinary skills in the art is motivated to select a vertical length of the protruding portion in order to have improved reliability of the contact structure. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). In re claim 7, Man discloses the semiconductor structure of claim 1. Ma does not expressly disclose wherein a vertical length of the protruding portion is 0.6 times to 1.5 times a diameter of the first conductive layer. However, it has been held to be within the general skill of a worker in the art to select a vertical length of the protruding portion 296 is 0.6 times to 1.5 times a diameter of the first conductive layer 290 on the basis of its suitability for the intended use, e.g., for improved reliability, as a matter of obvious design choice. In re Leshin , 125 USPQ 416. In Gardner v. TEC Systems, Inc. , 725 F.2d 1338, 220 USPQ 777 (Fed. Cir. 1984), cert. denied , 469 U.S. 830, 225 USPQ 232 (1984), the Federal Circuit held that, where the only difference between the prior art and the claims was a recitation of relative dimensions of the claimed device and a device having the claimed relative dimensions would not perform differently than the prior art device, the claimed device was not patentably distinct from the prior art device. A person of ordinary skills in the art is motivated to select a vertical length of the protruding portion is 0.6 times to 1.5 times a diameter of the first conductive layer in order to have improved reliability of the contact structure. “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” See MPEP 2144.05 II. In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955); see also Peterson, 315 F.3d at 1330, 65 USPQ2d at 1382; In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Lab. Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997); Smith v. Nichols, 88 U.S. 112, 118-19 (1874); In re Williams, 36 F.2d 436, 438 (CCPA 1929). See also KSR Int’l Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007) . 07-22-aia AIA Claim (s) 12, 14 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Gong , as applied to claim s 10-11 above, and further in view of Yen et al. (US 20230345703 A1; hereinafter “Yen”) . In re claim 12, Gong discloses in figs. 1-9, the method of claim 11 outlined above. Gong does not expressly disclose wherein removing the top portion of the material of the first conductive layer to expose the void is performed by dry etching. In the same field of endeavor, Yen discloses in figs. 1, 2A-2G, a method of forming buried bit line contact structures, wherein removing a top portion of the material of a first conductive layer 122 to expose the void 124 is performed by dry etching (fig. 2C; ¶22). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Yen into the method of Gong and removing the top portion of the material of the first conductive layer by dry etching to provide a controlled vertical profile of the first conductive layer. In re claim 14, Gong discloses in figs. 1-9, the method of claim 10 outlined above. Gong does not expressly disclose wherein a resistivity of the second conductive layer is lower than a resistivity of the first conductive layer. In the same field of endeavor, Yen discloses in figs. 1, 2A-2G, the method of claim 10, wherein a resistivity of the second conductive layer 128 (¶24) is lower than a resistivity of the first conductive layer 122 (¶21). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Yen into Gong in order to form a low resistance buried bit line contact structures (¶2-5 of Yen ). In re claim 16, Gong discloses in figs. 1-9, the method of claim 10 outlined above. Gong does not expressly disclose wherein forming the trench in the substrate between the bit-line structures comprises: etching the substrate to form the trench between the bit-line structures, exposing an active region of the substrate. In the same field of endeavor, Yen discloses in figs. 1, 2A-2G, the method of claim 10, wherein forming a trench 11 in the substrate 102 between the bit-line structures 126 comprises: etching the substrate 102 to form the trench 120 between the bit-line structures 126 , exposing an active region of the substrate 106 (¶21-22). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to employ the teachings of Yen into Gong in order to form a low resistance buried bit line contact structures (¶2-5 of Yen ). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to NILUFA RAHIM whose telephone number is (571)272-8926. The examiner can normally be reached M-F 9am-5:30pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J. Green can be reached at (571) 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NILUFA RAHIM/Primary Examiner, Art Unit 2893 Application/Control Number: 18/642,184 Page 2 Art Unit: 2893 Application/Control Number: 18/642,184 Page 3 Art Unit: 2893 Application/Control Number: 18/642,184 Page 4 Art Unit: 2893 Application/Control Number: 18/642,184 Page 5 Art Unit: 2893 Application/Control Number: 18/642,184 Page 6 Art Unit: 2893 Application/Control Number: 18/642,184 Page 7 Art Unit: 2893 Application/Control Number: 18/642,184 Page 8 Art Unit: 2893 Application/Control Number: 18/642,184 Page 9 Art Unit: 2893 Application/Control Number: 18/642,184 Page 10 Art Unit: 2893 Application/Control Number: 18/642,184 Page 11 Art Unit: 2893
Read full office action

Prosecution Timeline

Apr 22, 2024
Application Filed
May 20, 2026
Non-Final Rejection mailed — §102, §103
Aug 18, 2026
Response Filed
Oct 22, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
83%
With Interview (-1.0%)
2y 4m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 483 resolved cases by this examiner. Grant probability derived from career allowance rate.

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