DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 17-36 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
a. As to claim 17, 26, and 31, Recitation of forming a first protective layer on the first fin structure with no limits on some protective film on the second fin is not supported. Applicant discloses either the protective film item 110 is formed on both fins or a second protective film maybe formed on the second no where in the specification does applicant disclose the second fin is not provided with a protective film in all the embodiment there is some protective film 110 across all the films. Thus since the claim now encompasses embodiment where there is no protective film on the second film the claim is not supported. The specification paragraph 157 state: The method includes forming a first protective layer on the first fin structure and a second protective layer on the second fin structure, and forming a dummy gate structure across the first fin structure and the second fin structure.
This does not state that second does not have a protective layer the office interpretation is the protective layer on the second maybe different, not that it lack a protective layer.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 17-36 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
A. As to claim 17 , it is unclear if the dummy gate is on the protective layer as well as disclosed the gate is formed on the protective film item 118 on 110.
As to claim 17, recitation of removing a portion of the dummy gate structure to expose the first spacer layer lacks antecedent basis there is no requirement that the first spacer be covered. Further it is unclear since throughout the process 128 and 126 edge portions are always exposed thus it is unclear what of the first spacer is being exposed and exposed from what.
As to claim 17, recitation of removing a portion of the first spacer layer to expose a portion of the second spacer layer since it is unclear how it is exposed further the second spacer edge is always exposed at the top the structure. Thus, recitation exposing lack antecedent basis since it was not established that it was covered.
As to claim 17 removing a portion of the gate dielectric layer to expose the second spacer layer is unclear since it should be limited to exposed portion that where on the gate dielectric.
As to claim 17, recitation of and forming a dielectric wall between the first nanostructures and the second nanostructures is unclear in time when it occurs it appear it should recite in region formed by the removal of the gate forming a dielectric wall.
As to claim 19, recitation of further comprising: removing a top portion of the dielectric wall to expose the gate electrode layer; and forming a conductive layer on the dielectric wall and the gate electrode layer; and forming a contact structure on the conductive layer. Lack antecedent basis since applicant has not established the dielectric wall covers the gate.
As to claim 25, recitation of further comprising: forming an isolation structure over the substrate; and forming the dielectric wall over the isolation structure is unclear how the isolation relates to the fins.
As to claim 26 and 31, it is unclear if the dummy gate is on the protective layer as well as disclosed the gate is formed on the protective film item 118 on 110. Thus the gate lack structural relationship to the protective layer
Further it is unclear recitation forming a gate dielectric layer on the first nanostructures and second nanostructures is unclear how it relates to the second trench.
Further the recitation of forming a gate dielectric layer on the first nanostructures and second nanostructures; forming a gate electrode layer on the gate dielectric layer and in the second trench; and forming a second dielectric wall in the second trench. Has an antecedent basis issues since the gate and the gate dielectric are already formed in the second trench it is unclear if the is a second trench to form a second dielectric wall.
Allowable Subject Matter
Claims 17-36 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action.
Closest prior art Chen 20250040235 as well as You 20220045051 Huang 20250006548 fail to teach and or suggest
In particular Huang for claim 17 does not teach forming a dummy gate structure across the first fin structure and the second fin structure; forming a first spacer layer and a second spacer layer on a sidewall surface of the dummy gate structure; removing a portion of the dummy gate structure to expose the first spacer layer … removing a portion of the first spacer layer to expose a portion of the second spacer layer; removing a portion of the first semiconductor material layers to form first nanostructures and second nanostructures; forming a gate dielectric layer on the first nanostructures and the second nanostructures, wherein the gate dielectric layer is on the first spacer layer and the second spacer layer; forming a gate electrode layer on the gate dielectric layer; removing a portion of the gate electrode layer; removing a portion of the gate dielectric layer to expose the second spacer layer; and forming a dielectric wall between the first nanostructures and the second nanostructures in conjunction with the other elements of claim 17.
As to claim 26 Huang fails to teach and or suggest forming a first spacer layer and a second spacer layer on a sidewall surface of the dummy gate structure; removing a first portion of the dummy gate structure to form a first trench; forming a first dielectric wall in the first trench, wherein a top surface of the first dielectric wall is higher than a top surface of the protective layer; removing a second portion of the dummy gate structure to form a second trench; removing a portion of the first semiconductor material layers to form first nanostructures and second nanostructures; forming a gate dielectric layer on the first nanostructures and second nanostructures; forming a gate electrode layer on the gate dielectric layer and in the second trench; and forming a second dielectric wall in the second trench in conjunction with the other elements of claim 26.
As to claim 31 prior art fails to teach and or suggest removing a second portion of the dummy gate structure to form a second trench; removing a portion of the first semiconductor material layers to form first nanostructures and second nanostructures; forming a gate dielectric layer on the first nanostructures and second nanostructures; forming a gate electrode layer on the gate dielectric layer and in the second trench; removing a portion of the gate electrode layer to form a remaining gate electrode layer, wherein the remaining gate electrode layer is exposed by the second trench; and forming a dielectric wall on the remaining gate electrode layer and in the second trench, wherein the dielectric wall is between the first nanostructures and the second nanostructures in conjunction with the other elements of claim 31.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MATTHEW L REAMES whose telephone number is (571)272-2408. The examiner can normally be reached M-Th 6:00 am-4:00 pm EST.
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/MATTHEW L. REAMES/
Primary Examiner
Art Unit 2896
/MATTHEW L REAMES/Primary Examiner, Art Unit 2896
Prosecution Insights