Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I and species IA in the reply filed on 6 August 2026 is acknowledged.
In addition to the election above, Applicant has added claims 21-32, it appears some of these claims are drawn to a different species than what was elected.
Specifically, some claims are drawn to a new species IC: a semiconductor package device with a lid and an interface structure, the interface structure comprising a first metal layer over the package component and a thermal interface material over the first metal layer, believed to be drawn to fig. 17.
As species IA was already elected and drawn to fig. 8 some of the newly added claims are considered withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected species, there being no allowable generic or linking claim.
Species IA is drawn the following claims to be examined: 1, 3-8, and 28-32.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Hu et al. (US Patent Pub 20220093528 A1).
Regarding Claim 1, Hu teaches a package structure (Fig. 8 of app), comprising:
a substrate (Fig. 2, substrate 80);
a package component bonded to the substrate and comprising :
a first die (Fig. 2, first die 21),
a second die laterally spaced apart from the first die by an underfill (Fig. 2, second die 22 laterally spaced apart from first die 21 by underfill 30),
and a molding compound adjacent the first die and the second die (Fig. 2, molding compound 72);
a lid disposed over the package component and the substrate (Fig. 2, lid 40);
and an interface structure sandwiched between the package component and the lid, the interface structure comprising:
an interface layer disposed over the underfill and the molding compound (Fig. 2, interface layer 71 disposed over underfill 30 and molding compound 72),
and a thermal interface material (TIM) layer over the interface layer, the first die and the second die (Fig. 2, thermal interface material layer 73 formed over interface layer 71, first die 21, and second die 22).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 3-8 and 28-32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hu as applied to claim 1 above, and further in view of Chiou et al. (US Patent Pub 20230021005 A1).
Regarding Claim 3, Hu teaches the package structure of claim 1.
Hu is silent as to the composition of the interface layer and therefore fails to teach that a Young's modulus of the interface layer is smaller than a Young's modulus of the TIM layer.
However, Chiou teaches package structure semiconductor device wherein a Young's modulus of the interface layer is smaller than a Young's modulus of the TIM layer (Chiou, fig. 4F teaches an interface layer 602 and TIM layer 604. Paragraph 0056 of Chiou teaches interface layer 602 can be formed of polyimide (paragraph 0048 of Applicant’s own specification teaches the interface layer may be formed of polyimide) and has a Young’s modulus ranging from 1MPa to 500 MPa. Paragraph 0059 teaches TIM layer 604 has a Young’s modulus ranging from 5 GPa to 70 GPa, which is a greater Young’s modulus than the interface layer).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure wherein a Young's modulus of the interface layer is smaller than a Young's modulus of the TIM layer. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of alleviating the problem of delamination of the TIM structure (Chiou, paragraph 0076)
Regarding Claim 4, Hu teaches the package structure of claim 1.
Hu is silent as to the thermal conductivities of the interface layer and the TIM layer.
However, Chiou teaches a package structure semiconductor device wherein a thermal conductivity of the TIM layer is greater than a thermal conductivity of the interface layer (Chiou, Fig. 4F and paragraph 0056 teaches the thermal conductivity of the interface layer 602 can be 5W/mK. Paragraph 0059 teaches the thermal conductivity of the TIM layer 604 can be 10 W/mK, which is greater than the thermal conductivity of interface layer 602).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure wherein a thermal conductivity of the TIM layer is greater than a thermal conductivity of the interface layer. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of ensuring sufficient heat dissipation efficiency and device reliability (Chiou, paragraph 0075).
Regarding Claim 5, Hu teaches the package structure of claim 1.
Hu is silent as to the composition of the interface layer.
However, Chiou teaches a package structure semiconductor device wherein the interface layer comprises a die attach film (DAF), silicone, polyimide, or epoxy (Chiou, paragraph 0056 teaches interface layer 602 can be formed of polyimide).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure wherein the interface layer comprises a die attach film (DAF), silicone, polyimide, or epoxy. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of alleviating the problem of delamination of the TIM structure (Chiou, paragraph 0076).
Regarding Claim 6, Hu teaches the package structure of claim 1.
Hu is silent as to the composition of the TIM layer.
However, Chiou teaches a package structure semiconductor device wherein the TIM layer comprises beryllium oxide, aluminum oxide, zinc oxide, aluminum nitride, hexagonal boron nitride, copper, aluminum, diamond, graphene, or graphite (Chiou, paragraph 0059 teaches TIM layer 604 can be formed of copper).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure wherein the TIM layer comprises beryllium oxide, aluminum oxide, zinc oxide, aluminum nitride, hexagonal boron nitride, copper, aluminum, diamond, graphene, or graphite. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of ensuring sufficient heat dissipation efficiency and device reliability (Chiou, paragraph 0075).
Regarding Claim 7, Hu teaches the package structure of claim 1.
Hu is silent as to the composition of the lid.
However, Chiou teaches a package structure semiconductor device wherein the lid comprises as aluminum (Al), copper (Cu), iron (Fe), nickel (Ni), cobalt (Co), an aluminum-copper alloy, an iron-nickel alloy, or an iron-nickel-cobalt alloy (Chiou, paragraph 0065 teaches lid 800 is formed of an iron-nickel alloy).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure wherein the lid comprises as aluminum (Al), copper (Cu), iron (Fe), nickel (Ni), cobalt (Co), an aluminum-copper alloy, an iron-nickel alloy, or an iron-nickel-cobalt alloy. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of helping to maintain a lower temperature in the package structure (Chiou, paragraph 0075).
Regarding Claim 8, Hu teaches the package structure of claim 1.
Hu fails to teach the package structure wherein the TIM layer is spaced apart from the underfill and the molding compound by the interface layer.
However, Chiou teaches a package structure semiconductor device wherein the TIM layer is spaced apart from the underfill and the molding compound by the interface layer (Chiou, fig. 12E teaches TIM layer 1904 is spaced apart from underfill UF1 and molding compound 300 by interface layer 602).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure wherein the TIM layer is spaced apart from the underfill and the molding compound by the interface layer. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of preventing bleeding/overflowing to undesired components during fabrication (Chiou, paragraph 0135).
Regarding Claim 28, Hu teaches a package structure, comprising:
a package substrate (Fig. 2, package substrate 80);
a package component bonded to the package substrate and comprising:
an interposer (Fig. 2, interposer 10 (which is comprised of 14 and 15, see paragraph 0033)),
a first die over the interposer (Fig. 2, first die 21 over the interposer 10),
a second die over the interposer and laterally spaced apart from the first die by an underfill (Fig. 2, second die 22 over interposer 10 and laterally spaced apart from first die 21 by underfill 30),
and a molding compound adjacent the first die and the second die (Fig. 2, molding compound 72 adjacent to the first die 21 and second die 22);
a lid disposed over the package component and the package substrate (Fig. 2, lid 40);
and an interface structure sandwiched between the package component and the lid, the interface structure comprising:
a thermal interface material (TIM) layer over and interfacing the interface layer, the first die and the second die (Fig. 2, thermal interface material 73 over and interfacing the interface layer 71, the first die 21, and the second die 22).
Hu fails to teach the interface layer being disposed over and interfacing the underfill and the molding compound.
However, Chiou teaches a package structure semiconductor device having an interface layer disposed over and interfacing the underfill and the molding compound (Chiou, fig. 12E teaches an interface layer 602 disposed over and interfacing the underfill UF1 and the molding compound 300).
It would have been obvious to one of ordinary skill in the art at the time of invention to incorporate the teachings of Chiou into the method of Hu by forming the package structure having an interface layer disposed over and interfacing the underfill and the molding compound. The ordinary artisan would have been motivated to modify Hu in the manner set forth above for at least the purpose of preventing bleeding/overflowing to undesired components during fabrication (Chiou, paragraph 0135).
Regarding Claim 29, Hu in view of Chiou teaches the package structure of claim 28, wherein a Young's modulus of the interface layer is smaller than a Young's modulus of the TIM layer (Chiou, fig. 12F teaches an interface layer 602 and TIM layer 1904 (paragraph 0132 teaches 1904 can be formed the same as 604). Paragraph 0056 of Chiou teaches interface layer 602 can be formed of polyimide (paragraph 0048 of Applicant’s own specification teaches the interface layer may be formed of polyimide) and has a Young’s modulus ranging from 1MPa to 500 MPa. Paragraph 0059 teaches TIM layer 604 (which can have the same composition as 1904, see paragraph 0132) has a Young’s modulus ranging from 5 GPa to 70 GPa, which is a greater Young’s modulus than the interface layer).
Regarding Claim 30, Hu in view of Chiou teaches the package structure of claim 28, wherein a thermal conductivity of the TIM layer is greater than a thermal conductivity of the interface layer (Chiou, Fig. 12F and paragraph 0056 teaches the thermal conductivity of the interface layer 602 can be 5W/mK. Paragraph 0059 teaches the thermal conductivity of the TIM layer 604 (which can have the same composition as 1904, see paragraph 0132) can be 10 W/mK, which is greater than the thermal conductivity of interface layer 602).
Regarding Claim 31, Hu in view of Chiou teaches the package structure of claim 28, wherein the TIM layer is spaced apart from the underfill and the molding compound by the interface layer (Chiou, fig. 12E teaches TIM layer 1904 is spaced apart from underfill UF1 and molding compound 300 by interface layer 602).
Regarding Claim 32, Hu in view of Chiou teaches the package structure of claim 28, wherein the package substrate comprises a printed circuit board (Hu, paragraph 0046 teaches package substrate 80 comprises a printed circuit board).
Conclusion
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/V.R.G./Examiner, Art Unit 2899
/JOHN M PARKER/Primary Examiner, Art Unit 2899
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