Prosecution Insights
Last updated: October 01, 2026
Application No. 18/646,677

SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103§112
Filed
Apr 25, 2024
Priority
Apr 01, 2020 — divisional of 11/367,721 +1 more
Examiner
LEE, EUGENE
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
755 granted / 922 resolved
+13.9% vs TC avg
Moderate +6% lift
Without
With
+5.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
44 currently pending
Career history
949
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
60.1%
+20.1% vs TC avg
§102
16.6%
-23.4% vs TC avg
§112
13.2%
-26.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 922 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Election/Restrictions Applicant’s election without traverse of Species III (claims 21-40) in the reply filed on 8/5/26 is acknowledged. However, claims 31-38 are further withdrawn since these claims are directed towards Species II (i.e. “wherein a first depth of the first trench is substantially equal to a second depth of the second trench; …, wherein a first depth of the first trench is greater than a second depth of the second trench …”) as opposed to Species III (i.e. “wherein a depth of the second trench is substantially greater than a depth of the first trench; …”). Claims 31-38 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 8/5/26. Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the (1) “wherein a depth of the second trench is substantially greater than a depth of the first trench; …” (claims 21, and 39), and (2) “after the first etching, removing the patterned mask layer; forming a patterned layer covering the first trench and exposing the second trench; and performing the second etching using the patterned layer as a mask.” (claim 40) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Regarding (1), see, for example, FIG. 2C wherein the applicant shows a first depths D1 of the first trenches 122/124 being in the first region 102, and a second depths D2 of the second trenches 126 being in the second region 104 wherein the first depths D1 and second depths D2 being substantially the same (i.e. also stated in paragraph [0029]), but does not show “wherein a depth of the second trench is substantially greater than a depth of the first trench; …” as stated in claim 21. The same applies to claim 39, which contains the same limitation. Regarding (2), none of the figures show a patterned layer only covering the first layer and then exposing the second trench. Based on the applicant’s specification, it is unclear which features the applicant is referring to in the limitations “first etching”, “second etching”, “patterned mask layer” and “patterned layer” as the terms “first etching” and “second etching” are not used in the specification, and the patterned mask layer 114, and oxide layer 112 do not cover the trenches. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112: The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention. Claims 21 thru 30, 39, and 40 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. In lines 4-5 of new claim 21, the specification does not describe the limitation (i.e. “wherein a depth of the second trench is substantially greater than a depth of the first trench; …”. The same applies to claim 39, which contains the same limitation (“wherein a depth of the second trench is substantially greater than a depth of the first trench;”). In paragraph [0028] of the specification, the applicant states the second region as element 104, and the first region as element 102; however, the applicant shows (see, for example, FIG. 2I) the depth of the trench (i.e. second trench) in the second region 104 not being substantially greater than a depth of the first trench in the first region 102 as stated in claims 21, and 39. Appropriate clarification and/or correction are required. In lines 7-8 of new claim 21, the applicant states “wherein a top surface of the first isolation, a top surface of the patterned mask layer, and a top surface of the second isolation are substantially aligned.”; however, the specification does not use the term “aligned”, and even though FIG. 2I shows the top surfaces of the first isolation 146, second isolation 142/144, and patterned mask layer 114 being flat to each other, the drawings are not drawn to scale and there is no description in the specification that explicitly states these structures being “aligned”. Appropriate clarification and/or correction are required. Regarding claim 40, the specification does not describe “after the first etching, removing the patterned mask layer; forming a patterned layer covering the first trench and exposing the second trench; and performing the second etching using the patterned layer as a mask.”. Appropriate clarification and/or correction are required. The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 21 thru 30, and 40 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 21 recites the limitation "patterned mask layer" in line 7. There is insufficient antecedent basis for this limitation in the claim. Regarding claim 40, in line 5, the applicant states “forming a patterned layer”; however, it is unclear how a patterned layer is formed before the layer is first formed and then “patterned.” There is insufficient antecedent basis as the layer is not formed previously before it becomes a “patterned layer.” Appropriate clarification and/or correction are required. Further, in claim 40, the limitation “after the first etching, removing the patterned mask layer; forming a patterned layer covering the first trench and exposing the second trench; and performing the second etching using the patterned layer as a mask.”, it is unclear (see, for example, FIG. 2A-2J) how the patterned layer only covers the first layer and then exposes the second trench. Further, based on the applicant’s specification, it is unclear which features the applicant is referring to in “first etching”, “second etching”, “patterned mask layer” and “patterned layer” as the terms “first etching” and “second etching” are not used in the specification, and the patterned mask layer 114, and oxide layer 112 do not cover the trenches. Appropriate clarification and/or correction are required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. In view of the 112 rejection above, claim(s) 21 thru 27, 39, and 40 are is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yang et al. US 2015/0115337 A1. Yang discloses (see, for example, FIGs. 5A-5K) a method of manufacturing a semiconductor structure, comprising: providing a substrate 601 having a first region 654 and a second region 655; forming a first trench 651 in the first region 654; forming a second trench 652 in the second region 655, wherein a depth D6 of the second trench 652 is substantially greater than a depth D5 of the first trench 651; and forming a first isolation 636 in the first trench 651 and a second isolation 637 in the second trench 652, wherein a top surface of the first isolation 636, a top surface of the patterned mask layer 620, and a top surface of the second isolation 637 are substantially aligned. Regarding claim 22, see, for example, FIG. 5A and 5K wherein Yang discloses prior to the formation of the first trench 651, forming a patterned mask layer 620 over the substrate 601; and removing the patterned mask layer 620 after the formation of the first isolation 636 and the second isolation 637. Regarding claim 23, see, for example, FIG. 5K wherein Yang discloses a sidewall H5 of the first isolation 636 is partially exposed after the removal of the patterned mask layer 620, and a sidewall H6 of the second isolation 637 is partially exposed after the removal of the patterned mask layer 620. Regarding claim 24, see, for example, FIG. 5A wherein Yang discloses forming a dielectric layer 603 over the substrate 601 covering the first region 654 and the second region 655 prior to the formation of the patterned mask layer 620. Regarding claim 25, see, for example, FIG. 5D, and paragraph [0039] wherein Yang discloses the formation of the second trench 652 comprises: forming a third trench in the second region concurrently with the formation of the first trench; forming a patterned sacrificial layer 622 covering the first trench 651 and exposing the third trench; and performing an etching operation on the substrate using the patterned sacrificial layer 622 as a mask. Regarding claim 26, see, for example, FIG. 5D wherein Yang discloses a first width of the first isolation 636 is substantially the same as a second width of the second isolation 637. Regarding claim 27, see, for example, FIG. 3 wherein Yang discloses forming a first device 211 in the first region 207 adjacent to the first isolation 235; and forming a second device 213 in the second region 208 covering a portion of the second isolation 246. Regarding claim 39, see, for example, FIGs. 5A-5K wherein Yang discloses a method of manufacturing a semiconductor structure, comprising: providing a substrate 601 having a first region 654 and a second region 655; forming a patterned mask layer 620 on the substrate 601, wherein the patterned mask layer 620 exposes a first portion of the substrate in the first region 654 and a second portion of the substrate in the second region 655; performing an etching operation on the substrate, thereby forming a first trench 651 in the first region 654 and a second trench 652 in the second region 655, wherein a depth D6 of the second trench 652 is substantially greater than a depth D5 of the first trench 651; forming a first isolation 636 in the first trench 651 and a second isolation 637 in the second trench 652; and removing the patterned mask layer 622. Regarding claim 40, see, for example, FIGs. 5A-5K wherein Yang discloses the etching operation includes a first etching 701and a second etching 703, the first etching using the patterned mask layer 642 as a mask, and the method further comprises: after the first etching 701 removing the patterned mask layer 642; forming a patterned layer 643 covering the first trench and exposing the second trench; and performing the second etching 703 using the patterned layer 643 as a mask. Also see 112 rejections above. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 28 thru 30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yang et al. US 2015/0115337 A1 as applied to claims 21-27, 39, and 40 above, and further in view of Lim et al. US 2016/0141415 A1. Yang does not disclose the second device comprises a first gate dielectric, the first gate dielectric has a first portion covering the substrate and a second portion covering the second isolation, and the first portion is thinner than the second portion. However, Lim discloses (see, for example, FIG. 1) a second device comprising a first gate dielectric 230 wherein the first gate dielectric 232a has a first portion covering the substrate 200, and a second portion 231a covering the second isolation 210_3. It would have been obvious to one of ordinary skill in the art to have the second device comprises a first gate dielectric, the first gate dielectric has a first portion covering the substrate and a second portion covering the second isolation, and the first portion is thinner than the second portion in order to implement the second device into more robust circuits such as a high voltage device with superior current drivability and high breakdown characteristics according to the preferences of the user. Regarding claim 29, see, for example, FIG. 1 wherein Lim disclose the second device comprises a first spacer 250, and the first spacer 250 overlaps the second isolation 210_3. Regarding claim 30, see, for example, FIG. 1 wherein Lim discloses the second isolation 210_3 being between a first source 270s and a first drain 270d of the second device. INFORMATION ON HOW TO CONTACT THE USPTO Any inquiry concerning this communication or earlier communications from the examiner should be directed to EUGENE LEE whose telephone number is (571)272-1733. The examiner can normally be reached M-F 730-330 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. Eugene Lee August 25, 2026 /EUGENE LEE/Primary Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Apr 25, 2024
Application Filed
Aug 28, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12733513
JUMP-FUSING AND TAILORED PCB SYSTEM FOR LOOP INDUCTANCE REDUCTION
4y 1m to grant Granted Sep 08, 2026
Patent 12733515
METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES AND CORRESPONDING SEMICONDUCTOR DEVICE
3y 4m to grant Granted Sep 08, 2026
Patent 12733536
ELEMENT PACKAGE AND SEMICONDUCTOR DEVICE
3y 6m to grant Granted Sep 08, 2026
Patent 12733207
SEMICONDUCTOR DEVICES
3y 2m to grant Granted Sep 08, 2026
Patent 12727405
THERMAL CVD OF TITANIUM SILICIDE METHODS TO FORM SEMICONDUCTOR STRUCTURES
2y 9m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
88%
With Interview (+5.8%)
2y 8m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 922 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month