DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to an Application filed on 04/29/2024. This application claims the priority benefit of U.S. provisional applications no. 63/139,795, filed on 01/21/2021, and of U.S. provisional applications no. 63/235,105, filed on 08/19/2021.
Currently, claims 1-11 are examined as below.
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application No. 17/498,757, filed on 10/12/2021.
Information Disclosure Statement
Acknowledgment is made of applicant's Information Disclosure Statement (IDS) filed on 06/03/2024. The IDS has been considered.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested:
(Marked-Up Version) Manufacturing Method of Circuit Board Having Improved Reliability of Signal Transmission
(Clean Version) Manufacturing Method of Circuit Board Having Improved Reliability of Signal Transmission
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3 and 10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 3 is indefinite, because the limitation “the second” in the end of the claim renders the claim indefinite. It is unclear which element “the second” is in reference to.
Claim 10 is indefinite, because the limitation “the second” in the end of the claim renders the claim indefinite. It is unclear which element “the second” is in reference to.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
Claims 1-2, 4-9 and 11 are allowed.
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Regarding independent claim 1, US 2018/0184522 A1 to Rodriguez et al. (“Rodriguez”) in Figs. 1a, 1c-1d and 2 teaches a manufacturing method of a circuit board 130 (Fig. 2 & ¶ 23, coaxial via assembly/structure/board 130; ¶ 17, the coaxial via board (i.e., 130) comprises a printed circuit board), comprising:
laminating a metal layer 107, 109/118 (Figs. 1d, 2, ¶ 20, ¶ 22, a collective of ground plane 107 and microstrip pad 109/118), a first substrate 100 (Fig. 2, ¶ 17, sub-laminated coaxial via board 100), a second substrate 100’ (Fig. 2, ¶ 21, sub-laminated board 100’), and a third substrate 100” (Fig. 2, ¶ 23, coaxial via board structure or board segment 100”), so that the first substrate 100 is located between the metal layer 107, 109/118 and the second substrate 100’ (Fig. 2), and the second substrate 100’ is located between the first substrate 100 and the third substrate 100” (Fig. 2), the second substrate 100’ has an opening (Figs. 1a, 1c-1d, 2, ¶ 18, space filled with resin material 110) and comprises a first dielectric layer 110 (¶ 18, resin material 110), the opening penetrates the second substrate 100’ (Figs. 1c-1d & 2), the first dielectric layer 110 fills the opening (Figs. 1a, 1c-1d, 2, ¶ 18, space filled with resin material 110), and the third substrate 100” comprises an insulating layer 103 (Figs. 1d, 2, ¶ 20, dielectric material 103) and a conductive layer 122” (Fig. 2, ¶ 23, pad 122”) located on the insulating layer 103;
forming a through hole (Fig. 2, space filled by layers 116, 122, 122’ and 122”);
forming a conductive material layer 120 (Fig. 2, ¶ 23, signal layer 120) covering the metal layer 107, 109/118, the conductive layer 122” of the third substrate 100” (Fig. 2); and
forming a first external circuit layer 120 (Fig. 2, ¶ 23, signal layer 120) located on the first substrate 100 and a second external circuit layer 120 (Fig. 2, ¶ 23, signal layer 120) located on the insulating layer 103, and define a conductive through hole structure 116, 122, 122’, 122” (Fig. 2, ¶ 22-¶ 23, a collective of coaxial via 116 and pads 122, 122’ and 122”) connecting the first external circuit layer 120 and the second external circuit layer 120 (Fig. 2), and located in the through hole (Fig. 2), wherein the conductive through hole structure 116, 122, 122’, 122” electrically connects the first external circuit layer 120 and the second external circuit layer 120 to define a signal path (Fig. 2), and a ground path 107 (Fig. 2, ¶ 20, ground plane 107) surrounds the signal path 116 (Fig. 2).
However, the prior art of record, singularly or in combination, fails to disclose or suggest, in combination with the other claimed elements in claim 1, wherein the first substrate comprises a plurality of conductive pillars, forming a plurality of blind holes, wherein the plurality of blind holes extend from the third substrate to the second substrate, and the through hole penetrates the metal layer, the first substrate, the first dielectric layer of the second substrate, and the insulating layer and the conductive layer of the third substrate; forming a conductive material layer covering an inner wall of the through hole, and filling the plurality of blind holes to define a plurality of conductive holes; and patterning the conductive material layer, the metal layer, and the conductive layer to form a first external circuit layer located on the first substrate and electrically connected to the plurality of conductive pillars and a second external circuit layer located on the insulating layer and electrically connected to the plurality of conductive holes, and the first external circuit layer, the plurality of conductive pillars, the second substrate, the plurality of conductive holes, and the second external circuit layer are electrically connected to define a ground path.
Therefore, independent claim 1 is allowed.
Claims 2, 4-9 and 11 are allowed, because they depend from the allowed claim 1.
Claims 3 and 10 are rejected, but would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims.
Claim 3 would be allowable, because claim 3 depends from the allowed claim 1.
Claim 10 would be allowable, because claim 10 depends from the allowed claim 1.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 2005/0039950 A1 to Chan et al.US 2004/0227227 A1 to Imanaka et al.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MIKKA LIU whose telephone number is (571)272-2568. The examiner can normally be reached on 9AM-5AM EST M-F.
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/M.L./Examiner, Art Unit 2817
/ELISEO RAMOS FELICIANO/Supervisory Patent Examiner, Art Unit 2817
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