Prosecution Insights
Last updated: July 17, 2026
Application No. 18/651,117

3D DRAM Access Transistor

Non-Final OA §102§Other
Filed
Apr 30, 2024
Priority
May 03, 2023 — provisional 63/499,888
Examiner
HARRISTON, WILLIAM A
Art Unit
Tech Center
Assignee
Applied Materials Inc.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
953 granted / 1066 resolved
+29.4% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
16 currently pending
Career history
1089
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
65.6%
+25.6% vs TC avg
§102
11.5%
-28.5% vs TC avg
§112
1.0%
-39.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1066 resolved cases

Office Action

§102 §Other
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statements filed on 00/18/2024 and 07/29/2024 have been considered. Drawings The drawings filed on 04/30/2024 are acceptable. Specification The abstract of the disclosure and the specification filed on 04/30/2024 are acceptable. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 6 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Roberts (US 2018/0323199). PNG media_image1.png 704 1084 media_image1.png Greyscale Regarding claim 1, Roberts (US 2018/0323199) discloses a method of forming a 3-dimensional memory device, the method comprising: forming a plurality of layers stacked in a first direction, the plurality of layers comprising: a gate layer (27, ¶0062) formed over a first oxide layer (16, ¶0060); and a source/drain (S/D) layer (22, ¶0061) between a set of gate oxide layers (28, ¶0062), wherein the set of gate oxide layers (28) are formed over the gate layer (27), and wherein the S/D layer comprises a source and a drain on opposite sides of a body (¶0061); and forming a doped layer (58, ¶0067) over the source (22). Regarding claim 6, Roberts further discloses: forming a spacer layer (47, ¶0068) between the first oxide layer (16) and a second oxide layer (16). Allowable Subject Matter Claims 2-5, 7 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 2, the prior art does not disclose “forming the source to a first thickness in the first direction, wherein the first thickness is less than a second thickness of the body in the first direction” in combination with the remaining claimed features. Regarding claim 3, the prior art does not disclose “wherein forming the doped layer over the source comprises epitaxially growing the doped layer along the source” in combination with the remaining claimed features. Regarding claim 7, the prior art does not disclose “thermally treating the plurality of layers to activate and drive-in dopants of the doped layer into the source” in combination with the remaining claimed features. Claims 9-20 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding claim 9, the prior art does not disclose “etching the source and the drain to form thinned portions each having a first thickness, wherein the first thickness, in the first direction, is less than a second thickness of the body in the first direction; and forming a doped layer over the thinned portions of the source and the drain” in combination with the remaining claimed features. Regarding claim 15, the prior art does not disclose “wherein the S/D layer comprises a source and a drain on opposite sides of a body, and wherein a first thickness of each of the source and the drain, in the first direction, is less than a second thickness of the body in the first direction; and a doped layer formed over the source and over the drain” in combination with the remaining claimed features.. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WILLIAM A HARRISTON whose telephone number is (571)270-3897. The examiner can normally be reached Mon-Fri, 9AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408) 918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WILLIAM A HARRISTON/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Apr 30, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §102, §Other (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
98%
With Interview (+8.2%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1066 resolved cases by this examiner. Grant probability derived from career allowance rate.

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