Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This action is responsive to application No. 18/653,129 filed on July 09, 2026.
Claim Objections
The objections of claims 1, 3, 5, 6, 7, 8 have been withdrawn, per the response dated on 07/09/2026.
Claim Rejections - 35 USC § 102
4. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
5. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
6. Claims 1-2, 4, 7, 11-12 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Lee (US 2022/0139918 A1).
Regarding independent claim 1, Lee teaches a semiconductor device, comprising (Fig. 2E):
a substrate (201, para [0046]);
a bit line (215, para [0046]) disposed on the substrate (201) and extending along a first direction (x-direction);
a cap layer (207 dielectric film, para [0055]) disposed on the bit line (215);
a first word line (212 left) disposed on the substrate (201) and extending along a second direction (y-direction) perpendicular to the first direction (x-direction);
a second word line (212 right) disposed on the substrate (201) and extending along the second direction (y-direction); and
a channel layer (204) disposed between the first word line (212 left) and the second word line (212 right) and extending along the second direction (y-direction).
wherein the channel layer (204) is extended from a top surface of the bit line (215) and penetrates through the cap layer (207);
wherein the first word line (212 left) and the second word line (212 right) are extended from a top surface of the cap layer (207).
Regarding claim 2, Lee teaches wherein (Fig. 2E), the first word line (212 left) and the second word line (212 right) are disposed on two opposite sides of the channel layer (204).
Regarding claim 4, Lee teaches wherein (see Fig. 2E), further comprising:
a first gate dielectric (210 left) disposed between the first word line (212 left) and the channel layer (204), wherein the first gate dielectric (210) extends from the top surface of the cap layer (207) along the second direction (y-direction).
Regarding claim 7, Lee teaches wherein (see Fig. 2E), a lower surface (bottom surface) of the first gate dielectric (130a) is aligned with a lower surface (bottom surface) of the first word line (140a) and is aligned with the top surface of the cap layer (207).
Regarding claim 11, Lee teaches wherein (see Fig. 2E), the channel layer (204) has a bar-shaped profile (semiconductor pillar, para [0043] can be considered as the rectangular bar-shapes structure).
Regarding claim 12, Lee teaches wherein (see Fig. 2E), a width (horizontal length or width) of the first word line (212 left) is less than a width (horizontal length or width) of the channel layer (204) along the first direction (x-direction).
Claim Rejections - 35 USC § 103
7. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
8. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
9. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
10. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
a. Determining the scope and contents of the prior art.
b. Ascertaining the differences between the prior art and the claims at issue.
c. Resolving the level of ordinary skill in the pertinent art.
d. Considering objective evidence present in the application indicating obviousness or non-obviousness.
11. Claims 3, 5-6, 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2022/0139918 A1) as applied to claim 1 above, and further in view of IM (US 2023/0122541 A1).
Regarding claim 3, Lee teaches all of the limitations of claim 1 from which this claim depends.
Lee is explicitly silent of disclosing wherein, an upper surface of the first word line is aligned with an upper surface of the channel layer.
IM teaches wherein (see Fig. 2A), an upper surface of the first word line (140a) is aligned with an upper surface of the channel layer (120).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by IM, and modify the structure of Lee by adjusting the length of the word line or the channel layer, in order to ensure precise control and individual cell address, and improve the efficiency of current flow in the z-direction through the conductive channels.
Regarding claim 5, Lee teaches all of the limitations of claim 4 from which this claim depends.
Lee is explicitly silent of disclosing wherein, an upper surface of the first gate dielectric is aligned with an upper surface of the channel layer.
IM teaches wherein (see Fig. 2A), an upper surface of the first gate dielectric (130a) is aligned with an upper surface of the channel layer (120).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by IM, and modify the structure of Lee by adjusting the length of the gate dielectric with the channel, in order to provide superior control, reduce interface defects and enhance carrier mobility.
Regarding claim 6, Lee teaches all of the limitations of claim 4 from which this claim depends.
Lee is explicitly silent of disclosing wherein, an upper surface of the first gate dielectric is aligned with an upper surface of the first word line.
IM teaches wherein (see Fig. 2A), an upper surface of the first gate dielectric (130a) is aligned with an upper surface of the first word line (140a).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by IM, and modify the structure of Lee by adjusting the length of the gate dielectric with the word line, in order to prevent/reduce structural deformation, electrical shorts and improve uniformity.
Regarding claim 9, Lee teaches all of the limitations of claim 4 from which this claim depends.
Lee is explicitly silent of disclosing wherein, the first gate dielectric has a bar-shaped profile.
IM teaches wherein (see Fig. 2A), the first gate dielectric (130a) has a bar-shaped profile (see Fig. 2A wherein the gate dielectric 130a can be considered as the rectangular bar-shape structure). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, including the shape of the gate dielectric to the teachings of Lee. The motivation to do so is that the combination yields the predictable results of allowing for the selection of a known shape structure on its suitability for the intended use. Changes in Shape: In reDailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966), see MPEP 2144.04 IV (B).
Regarding claim 10, Lee teaches all of the limitations of claim 1 from which this claim depends.
Lee is explicitly silent of disclosing wherein, the first word line has a bar-shaped profile.
IM teaches wherein (see Fig. 2A), the first word line (140a) has a bar-shaped profile (see Fig. 2A wherein the first word line 140a can be considered as the rectangular bar-shape structure). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, including the shape of the word line to the teachings of Lee. The motivation to do so is that the combination yields the predictable results of allowing for the selection of a known shape structure on its suitability for the intended use. Changes in Shape: In reDailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966), see MPEP 2144.04 IV (B).
12. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2022/0139918 A1) as applied to claim 4 above, and further in view of Jeong et al. (US 2023/0320077 A1).
Regarding claim 8, Lee teaches all of the limitations of claim 4 from which this claim depends.
Lee is explicitly silent of disclosing wherein, a length of the first word line is the same as a length of the first gate dielectric along a third direction perpendicular to the first direction and the second direction.
Jeong et al. discloses wherein (Fig. 2B), a length of the first word line (34, para [0085]) is the same as a length of the first gate dielectric (32, para [0085]) along a third direction (z-direction) perpendicular to the first direction (x-direction) and the second direction (y-direction).
It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Jeong et al., and modify the structure of Lee by adjusting the length of the word line or the gate dielectric layer, in order to fabricate the cell transistors of memory cells of the DRAM (para [0085]), therefore, simplified the manufacturing process.
Response to Arguments
13. It has been acknowledged that the applicant amended claims 1, 3, 4, 5, 6, 7, 8, per the response dated on 07/09/2026.
Applicant’s remarks in pages 5-8 have been reviewed, but they are not found persuasive because of new grounds of rejections in the current office action.
Conclusion
14. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
15. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
16. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812
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