DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 5, 10-14, 16, and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 2019/0378911) (hereafter Lee).
Regarding claim 1, Figs. 1-3 and 29-34 of Lee disclose a method of forming a semiconductor device, the method comprising:
forming a fin 100P (Fig. 29, paragraph 0032) protruding above a substrate 100 (Fig. 29, paragraph 0032);
forming source/drain regions 150 (Fig. 30, paragraph 0063) over the fin 100P (Fig. 29);
forming a first nanosheet 110 (Fig. 31, paragraph 0040, wherein “nanowires”) and a second nanosheet 210 (Fig. 31, paragraph 0040, wherein “nanowires”) over the fin 100P (Fig. 31) between the source/drain regions 150 (Fig. 31), the first nanosheet 110 (Fig. 31) disposed between the fin 100P (Fig. 31) and the second nanosheet 210 (Fig. 31);
forming a gate dielectric material 137 (Fig. 32, paragraph 0163) around the first nanosheet (bottom 112 in Fig. 32) and the second nanosheet (top 112 in Fig. 32);
forming a work function material 130 (Fig. 33, paragraph 0166) around the gate dielectric material 135 (Fig. 33), wherein a first portion (top portion of 130 between 110 and 210 in Fig. 33) of the work function material 130 (Fig. 33) extends along a first surface (top surface of bottom 112 in Fig. 33) of the first nanosheet (bottom 112 in Fig. 33) facing away from the substrate 100 (Fig. 33), and a second portion (bottom portion of 130 between 110 and 210 in Fig. 33) of the work function material 130 (Fig. 33) extends along a second surface (bottom surface of top 112 in Fig. 33) of the second nanosheet (top 112 in Fig. 33) facing the substrate 100 (Fig. 33);
forming a liner material 121 (Fig. 34, paragraph 0167) around the work function material 130 (Fig. 33), wherein the liner material 121 (Fig. 34) fills a gap between the first portion (top portion of 130 between 110 and 210 in Fig. 34) and the second portion (bottom portion of 130 between 110 and 210 in Fig. 34) of the work function material 130 (Fig. 34); and
forming a gate electrode material 122 (Fig. 3, paragraph 0169; and see paragraph 0153, wherein “The semiconductor device manufactured using FIGS. 29 to 34 may be one described with reference to FIGS. 1 to 3”) over the first nanosheet 110 (Fig. 3) and the second nanosheet 210 (Fig. 3).
Regarding claim 2, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 1, wherein the gap between the first portion (top portion of 130 between 110 and 210 in Fig. 3) and the second portion (bottom portion of 130 between 110 and 210 in Fig. 3) of the work function material 130 (Fig. 3) is free of the gate electrode material 122 (Fig. 3).
Regarding claim 3, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 1, wherein the liner material 121 (Fig. 3) is formed to have a first thickness (vertical length of 121 between 110 and 210 in Fig. 3) between the first nanosheet 110 (Fig. 3) and the second nanosheet 210 (Fig. 3), and have a second thickness (vertical length of 121 over 210 in Fig. 3) over the second nanosheet 210 (Fig. 3), wherein the first thickness (vertical length of 121 between 110 and 210 in Fig. 3) is larger than the second thickness (vertical length of 121 over 210 in Fig. 3).
Regarding claim 5, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 3, wherein the second nanosheet 121 (Fig. 3) is a topmost nanosheet furthest from the substrate 100 (Fig. 3).
Regarding claim 10, Figs. 1-3 and 29-34 of Lee discloses a method of forming a semiconductor device, the method comprising:
forming a fin 100P (Fig. 29, paragraph 0032) protruding above a substrate 100 (Fig. 29, paragraph 0032);
forming source/drain regions 150 (Fig. 30, paragraph 0063) over the fin 100P (Fig. 29);
forming nanosheets (110 and 210 in Fig. 31, paragraph 0040, wherein “nanowires”) between the source/drain regions 150 (Fig. 31); and
forming a gate structure (136, 137, 130, and 121 in Fig. 34) over the fin 100P (Fig. 32), around the nanosheets (110 and 210 in Fig. 32), and between the source/drain regions 150 (Fig. 32), wherein forming the gate structure (136, 137, 130, and 121 in Fig. 34) comprises:
forming a gate dielectric material 137 (Fig. 34, paragraph 0048) around the nanosheets (110 and 210 in Fig. 34);
forming a work function material 130 (Fig. 34, paragraph 0053) around the gate dielectric material 137 (Fig. 34);
forming a liner material 121 (Fig. 3, paragraph 0057; and see paragraph 0153, wherein “The semiconductor device manufactured using FIGS. 29 to 34 may be one described with reference to FIGS. 1 to 3”) around the work function material 130 (Fig. 3), wherein the liner material 121 (Fig. 3) is formed to have a non-uniform thickness, and is formed to be thicker (see Fig. 3, wherein vertical length of 121 between 110 and 210 is thicker than horizontal length of 121 on sidewalls of 110 and 210) at a first location between the nanosheets (110 and 210 in Fig. 3) than at a second location along sidewalls of the nanosheets (110 and 210 in Fig. 3); and
forming a gate electrode material 122 (Fig. 3, paragraph 0167) around the nanosheets (110 and 210 in Fig. 3) and around the liner material 121 (Fig. 3).
Regarding claim 11, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 10, wherein the liner material 121 (Fig. 3) is formed to be thicker at the first location (region between 110 and 210 in Fig. 3) between the nanosheets (110 and 210 in Fig. 3) than at a third location (region along upper surface of 210 in Fig. 3) along an upper surface (upper surface of 210 in Fig. 3) of a first nanosheet 210 (Fig. 3) of the nanosheets (110 and 210 in Fig. 3), wherein the first nanosheet 210 (Fig. 3) is a topmost nanosheet furthest from the substrate 100 (Fig. 3).
Regarding claim 12, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 11, wherein a first thickness (vertical length of 121 between 110 and 210 in Fig. 3) of the liner material 121 (Fig. 3) at the first location (region between 110 and 210 in Fig. 3) is about twice of a second thickness (vertical length of 121 along upper surface of 210 in Fig. 3) of the liner material at the third location (region along upper surface of 210 in Fig. 3).
Regarding claim 13, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 10, wherein the gate dielectric material 137 (Fig. 3), the work function material 130 (Fig. 3), and the liner material 136 (Fig. 3) fill a space between adjacent ones of the nanosheets (110 and 210 in Fig. 3), and there is no gate electrode material 122 (Fig. 3) formed between adjacent ones of the nanosheets (110 and 210 in Fig. 3).
Regarding claim 14, Figs. 1-3 and 29-34 of Lee (utilized different elements for a liner material as applied in claim 10 in the above) discloses a method of forming a semiconductor device, the method comprising:
forming a fin 100P (Fig. 29, paragraph 0032) protruding above a substrate 100 (Fig. 29, paragraph 0032);
forming source/drain regions 150 (Fig. 30, paragraph 0063) over the fin 100P (Fig. 29);
forming nanosheets (110 and 210 in Fig. 31, paragraph 0040, wherein “nanowires”) between the source/drain regions 150 (Fig. 31); and
forming a gate structure (136, 137, 130, and 121 in Fig. 34) over the fin 100P (Fig. 32), around the nanosheets (110 and 210 in Fig. 32), and between the source/drain regions 150 (Fig. 32), wherein forming the gate structure (136, 137, 130, and 121 in Fig. 34) comprises:
forming a gate dielectric material 137 (Fig. 34, paragraph 0048) around the nanosheets (110 and 210 in Fig. 34);
forming a work function material 121 (Fig. 34, paragraph 0059) around the gate dielectric material 137 (Fig. 34);
forming a liner material 136 (Fig. 34, paragraph 0050) around the work function material 121 (Fig. 34), wherein the liner material 136 (Fig. 3; and see paragraph 0153, wherein “The semiconductor device manufactured using FIGS. 29 to 34 may be one described with reference to FIGS. 1 to 3”) is formed to have a non-uniform thickness, and is formed to be thicker (see Fig. 3, wherein horizontal length of 136 between 110 and 210 is thicker than horizontal length of 136 on sidewalls of 110 and 210) at a first location between the nanosheets (110 and 210 in Fig. 3) than at a second location along sidewalls of the nanosheets (110 and 210 in Fig. 3);
forming a gate electrode material 122 (Fig. 3, paragraph 0057) around the nanosheets (110 and 210 in Fig. 3) and around the liner material 136 (Fig. 3); and
wherein the work function material 121 (Fig. 3, paragraph 0059, wherein “titanium aluminum (TiAl),”) is an aluminum-containing material, wherein the liner material 136 (Fig. 34, paragraph 0050, wherein “silicon oxide”) is an oxide or a semiconductor material.
Regarding claim 16, Figs. 23-24B of Lee discloses a method of forming a semiconductor device, the method comprising:
forming, in an n-type device region (region II in Fig. 23; and see “NMOS” in paragraph 0111) of the semiconductor device, first nanosheets (510 and 610 in Fig. 24B, paragraph 0100) over a first fin 500P (Fig. 24B, paragraph 0100);
forming, in a p-type device region (region I in Fig. 16; and see “PMOS” in paragraph 0111) of the semiconductor device, second nanosheets (310 and 410 in Fig. 24A, paragraph 0100) over a second fin 300P (Fig. 24A, paragraph 0100);
forming a gate dielectric material (337 (Fig. 24A) and 537 (Fig. 24B)) around the first nanosheets (510 and 610 in Fig. 24B) and the second nanosheets (310 and 410 in Fig. 24A);
forming a first work function material (321c (Fig. 24A) and 521d (Fig. 24B)) around the gate dielectric material (337 (Fig. 24A) and 537 (Fig. 24B)), the first nanosheets (510 and 610 in Fig. 24B), and the second nanosheets (310 and 410 in Fig. 24A);
forming a liner material (321d (Fig. 24A) and 521c (Fig. 24B)) around the first work function material (321c (Fig. 24A) and 521d (Fig. 24B)), the first nanosheets (510 and 610 in Fig. 24B), and the second nanosheets (310 and 410 in Fig. 24A), wherein the liner material (321d (Fig. 24A) and 521c (Fig. 24B)) fills first spaces between adjacent first nanosheets (510 and 610 in Fig. 24B) and fills second spaces between adjacent second nanosheets (310 and 410 in Fig. 24A); and
forming a gate electrode material (322 (Fig. 24A) and 522 (Fig. 24B)) around the first nanosheets (510 and 610 in Fig. 24B) and the second nanosheets (310 and 410 in Fig. 24A).
Regarding claim 17, Figs. 23-24B of Lee further discloses the method of claim 16, wherein the liner material (321d (Fig. 24A) and 521c (Fig. 24B)) is formed to be a non-uniform layer, wherein the liner material (321d (Fig. 24A) and 521c (Fig. 24B)) is formed to have a first thickness (vertical length of 521c between 510 and 610 in Fig. 24B) between adjacent first nanosheets (510 and 610 in Fig. 24B), and is formed to have a second thickness (vertical length of 521c along sidewalls of 510 and 610 in Fig. 24B) along sidewalls of the first nanosheets (510 and 610 in Fig. 24B), wherein the first thickness (vertical length of 521c between 510 and 610 in Fig. 24B) is larger than the second thickness (vertical length of 521c along sidewalls of 510 and 610 in Fig. 24B).
Claims 1, 3, 4, and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Song et al. (US 2020/0381514) (hereafter Song).
Regarding claim 1, Song discloses a method of forming a semiconductor device, the method comprising:
forming a fin 105 (Fig. 4, paragraph 0019) protruding above a substrate 100 (Fig. 4, paragraph 0019);
forming source/drain regions 240 (Fig. 4, paragraph 0019) over the fin 105 (Fig. 4);
forming a first nanosheet (bottom 124 in Fig. 4, paragraph 0025, wherein “nanosheets”) and a second nanosheet (top 124 in Fig. 4, paragraph 0025, wherein “nanosheets”) over the fin 105 (Fig. 4) between the source/drain regions 240 (Fig. 4), the first nanosheet (bottom 124 in Fig. 4) disposed between the fin 105 (Fig. 4) and the second nanosheet (top 124 in Fig. 4);
forming a gate dielectric material 280 (Fig. 4, paragraph 0030) around the first nanosheet (bottom 124 in Fig. 4) and the second nanosheet (top 124 in Fig. 4);
forming a work function material 290 (Fig. 4, paragraph 0030) around the gate dielectric material 280 (Fig. 4), wherein a first portion (portion of 290 close to top surface of bottom 124 in Fig. 4) of the work function material 290 (Fig. 4) extends along a first surface (top surface of bottom 124 in Fig. 4) of the first nanosheet (bottom 124 in Fig. 4) facing away from the substrate 100 (Fig. 4), and a second portion (portion of 290 close to bottom surface of top 124 in Fig. 4) of the work function material 290 (Fig. 4) extends along a second surface (bottom surface of top 124 in Fig. 4) of the second nanosheet (top 124 in Fig. 4) facing the substrate 100 (Fig. 4);
forming a liner material 270 (Fig. 4, paragraph 0030) around the work function material 290 (Fig. 4), wherein the liner material 270 (Fig. 4) fills a gap between the first portion (portion of 290 close to top surface of bottom 124 in Fig. 4) and the second portion (portion of 290 close to bottom surface of top 124 in Fig. 4) of the work function material 290 (Fig. 4); and
forming a gate electrode material 300 (Fig. 4, paragraph 0030) over the first nanosheet (bottom 124 in Fig. 4) and the second nanosheet (top 124 in Fig. 4).
Regarding claim 3, Song further discloses the method of claim 1, wherein the liner material 270 (Fig. 3) is formed to have a first thickness (vertical length of 270 between bottom 124 and middle 124 in Fig. 3) between the first nanosheet (bottom 124 in Fig. 3) and the second nanosheet (top 124 in Fig. 3), and have a second thickness (vertical length of 270 over top 124 in Fig. 3) over the second nanosheet (top 124 in Fig. 3), wherein the first thickness (vertical length of 270 between bottom 124 and middle 124 in Fig. 3) is larger than the second thickness (vertical length of 270 over top 124 in Fig. 3).
Regarding claim 4, Song further discloses the method of claim 3, wherein the first thickness (vertical length of 270 between bottom 124 and middle 124 in Fig. 3) is about twice of the second thickness (vertical length of 270 over top 124 in Fig. 3).
Regarding claim 6, Song further discloses the method of claim 4, further comprising forming inner spacers 210 (Fig. 4, paragraph 0037) between end portions of the first nanosheet (bottom 124 in Fig. 3) and end portions of the second nanosheet (top 124 in Fig. 3), wherein the gate dielectric material 280 (Fig. 4), the work function material 290 (Fig. 4), and the liner material 270 (Fig. 3) fill a space between the inner spacers 210 (Fig. 4).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 7-8, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Figs. 1-3 and 29-34 of Lee as applied to claims 1 and 10 above, and further in view of Figs. 7-8 of Lee et al. (US 2019/0378911) (hereafter Figs. 7-8 of Lee).
Regarding claim 7, Figs. 1-3 and 29-34 of Lee discloses the method of claim 1, however Figs. 1-3 and 29-34 of Lee do not disclose after forming the work function material and before forming the liner material, forming a capping layer around the work function material.
Figs. 7-8 of Lee disclose after forming the work function material 130 (Fig. 8, paragraph 0078) and before forming the liner material 121b (Fig. 8, paragraph 0079), forming a capping layer 121a (Fig. 8, paragraph 0079, wherein “titanium nitride layer”) around the work function material 130 (Fig. 8)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Figs. 1-3 and 29-34 of Lee to include after forming the work function material and before forming the liner material, forming a capping layer around the work function material, as taught by Figs. 7-8 of Lee, since the titanium silicon nitride layer (Lee, paragraph 0147) may prevent diffusion of aluminum (Al).
Regarding claim 8, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 7, further comprising, before forming the gate dielectric material 137 (Fig. 32), forming an interfacial layer 136 (Fig. 32, paragraph 0048) around the first nanosheet 110 (Fig. 32) and the second nanosheet 210 (Fig. 32) .
Regarding claim 15, Figs. 1-3 and 29-34 of Lee further discloses the method of claim 10, further comprising: forming an interfacial dielectric material 136 (Fig. 34, paragraph 0096) between the gate dielectric material 137 (Fig. 34) and the nanosheets (110 and 210 in Fig. 34).
Figs. 1-3 and 29-34 of Lee do not disclose forming a capping layer between the work function material and the liner material, wherein a total thickness of the interfacial dielectric material, the gate dielectric material, the work function material, the capping layer, and the liner material between adjacent ones of the nanosheets is equal to a vertical distance between the adjacent ones of the nanosheets.
Figs. 7-8 of Lee discloses forming a capping layer 121a (Fig. 8, paragraph 0079, wherein “titanium nitride layer”) between the work function material 130 (Fig. 8, paragraph 0078) and the liner material 121b (Fig. 8, paragraph 0079), wherein a total thickness of the interfacial dielectric material 136 (Fig. 8, paragraph 0096), the gate dielectric material 137 (Fig. 8, paragraph 0096), the work function material 130 (Fig. 8), the capping layer 121a (Fig. 8), and the liner material 121b (Fig. 8) between adjacent ones of the nanosheets (110 and 210 in Fig. 8, paragraph 0030) is equal to a vertical distance between the adjacent ones of the nanosheets (110 and 210 in Fig. 8).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Figs. 1-3 and 29-34 of Lee to include forming a capping layer between the work function material and the liner material, wherein a total thickness of the interfacial dielectric material, the gate dielectric material, the work function material, the capping layer, and the liner material between adjacent ones of the nanosheets is equal to a vertical distance between the adjacent ones of the nanosheets, as taught by Figs. 7-8 of Lee, since the titanium silicon nitride layer (Lee, paragraph 0147) may prevent diffusion of aluminum (Al).
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Song as applied to claim 1 above, and further in view of Bao et al. (US 9997519 B1) (hereafter Bao).
Regarding claim 9, Song further discloses the method of claim 1, wherein the liner material 270 (Fig. 4, paragraph 0032, wherein “silicon oxide”) is formed of aluminum oxide, silicon oxide, or silicon.
Song does not disclose the work functional material is formed of titanium aluminum.
Bao discloses the work functional material 222 (Fig. 5A, Col. 5, Lines 52-54, wherein “WF1 metal layer 222, which may be formed of the same material and at the same time as scavenging metal layer 210”; and see “titanium aluminum” in Col. 4, Line 60) is formed of titanium aluminum.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the invention of Song to form the work functional material is formed of titanium aluminum, as taught by Bao, since applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
Allowable Subject Matter
1. Claims 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
2. Claim 18 would be allowable because a closest prior art, Lee et al. (US 2019/0378911), discloses forming a first work function material (321c (Fig. 24A) and 521d (Fig. 24B)) around the gate dielectric material (337 (Fig. 24A) and 537 (Fig. 24B)), the first nanosheets (510 and 610 in Fig. 24B), and the second nanosheets (310 and 410 in Fig. 24A); forming a liner material (321d (Fig. 24A) and 521c (Fig. 24B)) around the first work function material (321c (Fig. 24A) and 521d (Fig. 24B)), the first nanosheets (510 and 610 in Fig. 24B), and the second nanosheets (310 and 410 in Fig. 24A), wherein the liner material (321d (Fig. 24A) and 521c (Fig. 24B)) fills first spaces between adjacent first nanosheets (510 and 610 in Fig. 24B) and fills second spaces between adjacent second nanosheets (310 and 410 in Fig. 24A); and forming a gate electrode material (322 (Fig. 24A) and 522 (Fig. 24B)) around the first nanosheets (510 and 610 in Fig. 24B) and the second nanosheets (310 and 410 in Fig. 24A), wherein the liner material (321d (Fig. 24A) and 521c (Fig. 24B)) is formed to be a non-uniform layer, wherein the liner material (321d (Fig. 24A) and 521c (Fig. 24B)) is formed to have a first thickness (vertical length of 521c between 510 and 610 in Fig. 24B) between adjacent first nanosheets (510 and 610 in Fig. 24B), and is formed to have a second thickness (vertical length of 521c along sidewalls of 510 and 610 in Fig. 24B) along sidewalls of the first nanosheets (510 and 610 in Fig. 24B), wherein the first thickness (vertical length of 521c between 510 and 610 in Fig. 24B) is larger than the second thickness (vertical length of 521c along sidewalls of 510 and 610 in Fig. 24B) but fails to disclose after forming the liner material and before forming the gate electrode material: removing the liner material from the p-type device region; removing the first work function material from the p-type device region; and after removing the liner material and the first work function material, forming a second work function material in the p-type device region around the second nanosheets, wherein the second work function material is different from the first work function material. Additionally, the prior art of record neither anticipates nor renders obvious the limitations of the claim that recites a method of forming a semiconductor device, the method comprising: after forming the liner material and before forming the gate electrode material: removing the liner material from the p-type device region; removing the first work function material from the p-type device region; and after removing the liner material and the first work function material, forming a second work function material in the p-type device region around the second nanosheets, wherein the second work function material is different from the first work function material in combination with other elements of the base claim 16. The other claims each depend from one of these claims, and each would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims for the same reasons as the claim from which it depends. Claims 19-20 depend on claim 18.
Conclusion
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/L.B.K/Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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