DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: Electronic package comprising a substrate frame bonded to conductive elements and manufacturing method thereof.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5-9, 13, and 14 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (U.S. Pub. 2019/0238134).
In re claim 1, Lee discloses an electronic package, comprising a carrier structure 551 having a first side (top side) and a second side (bottom side) opposing the first side (see paragraph [0916] and fig. 40F); at least one first electronic element 317 bonded onto and electrically connected to the first side of the carrier structure 551 (see paragraph [1113] and fig. 40F); at least one second electronic element 100 bonded onto and electrically connected to the second side of the carrier structure 551 (see paragraph [0328] and fig. 40F); a plurality of conductive elements 27 bonded and electrically connected to the second side of the carrier structure 551 (see paragraphs [0884], [0886] and fig. 40F); and a substrate frame 79 bonded and electrically connected to the plurality of conductive elements 27, wherein a space corresponding to a position and quantity of the second electronic element 100 is flexibly provided for accommodating the second electronic element 100 (see paragraphs [0898], [0960], [0996] and fig. 40F).
PNG
media_image1.png
538
717
media_image1.png
Greyscale
In re claim 2, as applied to claim 1 above, Lee discloses wherein the at least one first electronic element 317 has an active surface facing the carrier structure 551 and electrically connected to the carrier structure 551 (see paragraph [1113] and fig. 40F), and the at least one second electronic element 100 has an active surface facing the carrier structure 551 and electrically connected to the carrier structure 551, so that the active surface of the at least one first electronic element 317 and the active surface of the at least one second electronic element 100 are arranged facing each other (see paragraph [0898] and fig. 40F).
In re claim 3, as applied to claim 1 above, Lee discloses wherein the substrate frame 79 has a circuit structure (see paragraphs [0084], [0996] and fig. 40F).
In re claim 5, as applied to claim 1 above, Lee discloses wherein the electronic package further comprising a cladding layer 565 covering the substrate frame, the plurality of conductive elements and the at least one second electronic element 100 (see paragraph [0928] and fig. 40F).
In re claim 6, as applied to claim 1 above, Lee discloses wherein the electronic package further comprising an encapsulation layer 318 formed on the first side of the carrier structure 551 and covering the at least one first electronic element 317 (see paragraph [0117] and fig. 40F).
In re claim 7, Lee discloses a method of manufacturing an electronic package, comprising providing a carrier structure 551 having a first side (top side) and a second side (bottom side) opposing the first side, wherein the first side is disposed with at least one first electronic element 317 thereon (see paragraphs [0916], [1113] and fig. 40F); disposing at least one second electronic element 100 on the second side of the carrier structure 551, wherein the at least one second electronic element 100 is electrically connected to the carrier structure 551 (see paragraphs [0328], [0916] and fig. 40F); forming a plurality of conductive elements 27 on the second side of the carrier structure 551, wherein the plurality of conductive elements 27 are electrically connected to the carrier structure 551 to form an electronic module (see paragraph [0885] and fig. 40F); and bonding the electronic module to a substrate frame 79, wherein the substrate frame 79 is electrically connected to the plurality of conductive elements 27, wherein the substrate frame 79 is flexibly provided with a space corresponding to a position and quantity of the second electronic element 100 for accommodating the second electronic element 100 (see paragraphs [0898], [0960], [0996] and fig. 40F).
In re claim 8, as applied to claim 7 above, Lee discloses wherein the at least one first electronic element 317 has an active surface facing the carrier structure 551 and electrically connected to the carrier structure 551 (see paragraph [1113] and fig. 40F), and the at least one second electronic element 100 has an active surface facing the carrier structure 551 and electrically connected to the carrier structure 551, so that the active surface of the at least one first electronic element 317 and the active surface of the at least one second electronic element 100 are arranged facing each other (see paragraph [0898] and fig. 40F).
In re claim 9, as applied to claim 7 above, Lee discloses wherein the substrate frame 79 has a circuit structure (see paragraphs [0084], [0996] and fig. 40F).
In re claim 13, as applied to claim 7 above, Lee discloses wherein the method further comprising covering the substrate frame 79, the plurality of conductive elements and the at least one second electronic element 100 with a cladding layer 565 (see paragraph [0928] and fig. 40F).
In re claim 14, as applied to claim 7 above, Lee discloses wherein the method further comprising forming an encapsulation layer 318 on the first side of the carrier structure 551 to cover the at least one first electronic element 317 (see paragraph [1117] and fig. 40F).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 4 and 10-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (U.S. Pub. 2019/0238134) in view of Matsumoto (U.S. Pub. 2021/0050876).
In re claims 4 and 10, as applied to claims 1 and 7 above, respectively, Lee is silent to wherein the electronic package and method further comprising connecting the substrate frame to a substrate.
However, Matsumoto discloses in a same field of endeavor, a method of manufacturing an electronic package, including, inter-alia, connecting the substrate frame 2 to a substrate 90 (see paragraph [0049] and fig. 2).
Therefore, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to be motivated to incorporate the technique as taught by Matsumoto into the method of manufacturing the electronic package of Lee in order to enable wherein the electronic package and method further comprising connecting the substrate frame to a substrate in Lee to be performed in order to enhance communication between the electronic module and the substrate (see paragraph [0106] of Matsumoto).
In re claim 11, as applied to claim 10 above, Lee in combination with Matsumoto discloses wherein the electronic module is first bonded to the substrate frame 2 and then connected to the substrate 90 (see paragraph [0049] and fig. 2 of [0049] and fig. 2 of Matsumoto).
In re claim 12, as applied to claim 10 above, Lee and Matsumoto are silent to wherein the substrate frame is first connected to the substrate, and then the electronic module is bonded to the substrate frame.
However, it is respectfully submitted that it would have been obvious to one of ordinary skill in the art to first attaching the substrate frame to the substrate and subsequently bonding the electronic module to the substrate frame without effecting functionality of the electronic package.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Patil et al. (U.S. Pub. 2021/0272931) discloses an electronic package 200, comprising a carrier structure 202 having a first side and a second side opposing the first side; at least one first electronic element 206 bonded onto and electrically connected to the first side of the carrier structure 202 (see paragraph [0025] and fig. 2); at least one second electronic element 204 bonded onto and electrically connected to the second side of the carrier structure 202 (see paragraph [0025] and fig. 2); a plurality of conductive elements 230 bonded and electrically connected to the second side of the carrier structure (see paragraph [0025] and fig. 2).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHIEM D NGUYEN whose telephone number is (571)272-1865. The examiner can normally be reached Monday-Friday 8:00 AM - 6:00 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/KHIEM D NGUYEN/Primary Examiner, Art Unit 2892
Prosecution Insights