Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of group I in the reply filed on 08/03/2026 is acknowledged.
Claim Objections
Claim 12 is objected to because of the following informalities: The linking verb “are” in line 2 of claim 12 appears to be a typographical error. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. The limitation “extending therethrough” …. “includes at least one disconnect therein” is unclear as to what it means.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2, 6-7 and 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chou et al., US 2017/0148911.
Regarding claim 1, Chou discloses (fig. 17 and related text) a semiconductor device (1700), comprising: a body region (202) and a drift region (204) formed on a substrate (102); a source structure (104) disposed within the body region (202) and a drain structure (106) disposed within the drift region (204); a gate structure including a gate electrode (108) disposed over the body region (202) and the drift region (204) and a dielectric layer (124, fig. 14) disposed over the gate electrode (108) and the drift region (204); an inter-level dielectric (ILD) layer (118) disposed over the substrate (102); at least first and second rows of contact field plate (CFP) contacts (120) formed within the ILD layer (118) above the dielectric layer (124), wherein each of the CFP contacts are configured to manipulate electric fields generated by the gate structure; and a back end of the line (BEOL) structure disposed (1702) on the ILD layer (118) that includes at least one conductive metal layer [0090] coupling the first and second rows of CFP contacts to the source structure (104, fig. 17).
Regarding claim 2, Chou discloses the first and second rows of CFP contacts (120) are aligned parallel to the source structure (104).
Regarding claim 6, Chou discloses the BEOL structure (1702) includes at least a first conductive metal layer coupling the first row of CFP contacts (120 on the right) to each other and at least a second conductive metal layer (1702 on the left) coupling the second row of CFP contacts to each other, wherein the BEOL structure is configured to selectively provide the first conductive metal layer and the second conductive metal layer with voltage or grounding independent of each other [0060].
Regarding claim 7, Chou discloses (fig. 18 and related text) a semiconductor device (1700), comprising: a body region (202) and a drift region (204) formed on a substrate (102);a source structure (104) disposed within the body region (202) and a drain structure (106) disposed within the drift region (204); a gate structure including a gate electrode (108) disposed over the body region (202) and the drift region (204) and a dielectric layer (124, fig. 14) disposed over the gate electrode (108) and the drift region (204); an inter-level dielectric (ILD) layer (118) disposed over the substrate (102); and at least a first row of contact field plate (CFP) contacts (120) formed within the ILD layer, wherein each of the CFP contacts are configured to manipulate electric fields generated by the gate structure (same structure hence capable of achieving the same), wherein at least some of the CFP contacts (1802 on the right hand side) are electrically isolated from the source structure (104).
Regarding claim 12, Chou discloses a back end of the line (BEOL) structure (1802) disposed on the ILD layer (118) that includes at least one conductive metal layer [0093] coupling the first row of CFP contacts to each other (fig. 18 on the right).
Allowance
Claims 21-26 are allowed.
Reason for Allowance
The following is an examiner’s statement of reasons for allowance: The prior art of record does not teach or suggest, singularly or in combination at least the limitation “the BEOL structure is configured to selectively provide the first conductive metal layer and the second conductive metal layer with voltage or grounding independent of each other, wherein the BEOL structure is configured to provide for independently biasing the first set of the CFP contacts relative to the second set of the CFP contacts during off-state stress” as recited in claim 21 is the major difference between the prior art and the claimed invention.
Claims 3-5, and 8-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SAMUEL A GEBREMARIAM whose telephone number is (571)272-1653. The examiner can normally be reached 8:30-4PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at 571-272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SAMUEL A GEBREMARIAM/Primary Examiner, Art Unit 2811
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