DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the Metal-Oxide-Semiconductor structure mentioned in claim 22 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Examiner sees no layer in the drawings that would read as a semiconductor material.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claim 30 is objected to because of the following informalities:
Claim 30 recites the limitation " the device 100 " in Line 1. There is insufficient antecedent basis for this limitation in the claim. Examiner believes this is a typo and applicant did not mean to include the element number. However, if applicant did want to include the element number in the claim, please fix the antecedent basis issue by placing the element number within a group symbol i.e. ((),{},[] …) see MPEP 608.01(m) for more information.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 states
“The capacitor component according to claim 1, wherein the at least one metallic structure is configured as a wire structure, a wire bond structure, a stitched wire bond structure, a looped wire bond structure, a lower height looped wire bond, a zero loop height wire bond, and/or a zero loop height stitched wire bond.”
The term “and” results in an indefinite claim since the metallic structure cannot be a low height and a zero height structure at the same time. Therefore, examiner will treat this limitation as ‘as a wire structure, a wire bond structure, a stitched wire bond structure, a looped wire bond structure, a lower height looped wire bond, a zero loop height wire bond, or a zero loop height stitched wire bond.’
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 4, 7, 9-15, 22, 23, 27, 30, 32, 63 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Yaojian Lin (US 20100301450 A1) hereinafter referred to as “Lin”
Regarding Claim 1 Lin teaches
A capacitor component (Fig 3f) comprising:
at least one dielectric layer; (126)
at least one capacitor top metal; (134b)
at least one capacitor bottom metal; (130b)
the at least one capacitor top metal, the at least one capacitor bottom metal, and the at least one dielectric layer being configured as a capacitor;(Para [0051]) and
at least one metallic structure (124) configured to improve a quality factor of the capacitor and/or reduce a plate resistance of the capacitor, (Para [0054])
wherein the at least one metallic structure is arranged on the at least one capacitor top metal.(Fig 3f)
Regarding Claim 2 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure is configured as a wire structure (124) , a wire bond structure, a stitched wire bond structure, a looped wire bond structure, a lower height looped wire bond, a zero loop height wire bond, or a zero loop height stitched wire bond.
Regarding Claim 4 Lin Teaches
The capacitor component according to claim 1
wherein the at least one metallic structure is connected to the at least one capacitor top metal (142 is connected to 134b, Fig 3f)
Regarding Claim 7 Lin teaches
The capacitor component according to claim 1
wherein the at least one capacitor top metal (134b) comprises a capacitor upper surface configured as a connection pad (Para [0045]) for one or more interconnects.(connection to 124)
Regarding Claim 9 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure(124) is configured to modify the capacitor to have an improved quality factor. (Para [0054])
Regarding Claim 10 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure(124) is configured to modify the capacitor to have a reduced plate resistance. (Para [0054])
Regarding Claim 11 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure(124) is configured to modify the capacitor to have an improved quality factor and a reduced plate resistance (Para [0054])
Regarding Claim 12 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure (124) is configured to modify the capacitor to have an improved quality factor through implementation of an additional metallic mass provided by the at least one metallic structure. (Para [0054])
Regarding Claim 13 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure (124) is configured to modify the capacitor to have a reduced plate resistance through implementation of an additional metallic mass provided by the at least one metallic structure. (Para [0054])
Regarding Claim 14 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure (124reduces an Equivalent Series Resistance (ESR) of the capacitor. (Para [0054])
Regarding Claim 15 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure (124) is configured as a wire structure.(Para [0038])
Regarding Claim 23 Lin teaches
The capacitor component according to claim 1
wherein the at least one metallic structure (124) is configured to enable an adjustment of a top metal geometry of the capacitor. (Para [0054] Fig 3f)
Regarding Claim 27 Lin teaches
A device comprising the capacitor component according to claim 1,
the device further comprising one or more interconnects (connection to 124)
Regarding Claim 30 Lin teaches
The device according to claim 27
wherein the device 100 is implemented as a RF package, a RF amplifier package, a RF power amplifier package, a RF power transistor package, and/or a RF power amplifier transistor package.(Para [0009])
Regarding Claim 32 Lin teaches
A capacitor component (Fig 3f) comprising:
at least one dielectric layer; (126)
at least one capacitor top metal; (134b)
at least one capacitor bottom metal; (130b)
the at least one capacitor top metal, the at least one capacitor bottom metal, and the at least one dielectric layer being configured as a capacitor (Para [0051]); and
at least one metallic structure (124) configured to improve a quality factor of the capacitor and/or reduce a plate resistance of the capacitor, (Para [0054])
wherein the at least one metallic structure comprises at least one wire(Para [0038]); and
wherein the at least one metallic structure is arranged on the at least one capacitor top metal. (Fig 3f)
Regarding Claim 63 Lin teaches
A process of implementing (the capacitor exists therefore is has been implemented) a capacitor component (Fig 3f) comprising:
providing at least one dielectric layer; (126)
providing at least one capacitor top metal; (134b)
providing at least one capacitor bottom metal; (130b)
configuring the at least one capacitor top metal, the at least one capacitor bottom metal, and the at least one dielectric layer being as a capacitor (Para [0051]); and
configuring at least one metallic structure (124) to improve a quality factor of the capacitor and/or reduce a plate resistance of the capacitor, (Para [0054])
wherein the at least one metallic structure comprises at least one wire (Para [0038]); and
wherein the at least one metallic structure is arranged on the at least one capacitor top metal. (Fig 3f)
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 22 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin as applied to claim 1 above, and further in view of Masaya Kawano (US 20190393051 A1) hereinafter referred to as “Kawano”.
Regarding Claim 22 Lin teaches
The capacitor component according to claim 1
Kawano teaches that reducing the ESR of a MOS capacitor is beneficial to the performance (Para [0036]) and therefore teaches
wherein the capacitor is a MOS (Metal-Oxide-Semiconductor) capacitor.
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify the device of Lin such that the capacitor is a MOS capacitor, as described in Kanwano because the modification allows for the increased quality of the MOS by reducing the ESR. This is a simple substitution of two known capacitors to result in a capacitor with reduced ESR which has a known benefit to both MIM and MOS capacitors (Para [0036]))
Allowable Subject Matter
Claims 16-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter
Pertaining to claim 16:
Although a stitched wire bond structure is known in the art ("Evans, Daniel D.,Multipurpose Wire Bonding – Bumps, Wires, Combination Interconnects, and Operation Efficiency, 2013, IMAPS, 2013, pages 6-7" ) it is not shown that a stitched wire bond structure would be an obvious variant of the taught wire bond structure. Therefore, examiner considers replacing the wire bond with a stitched wire bond to be new allowable subject matter.
Pertaining to claims 17-20:
The dependent claims of claim 16 inherit the allowable subject matter previously presented.
Pertaining to claim 20:
Although a looped wire bond structure is known in the art it is not shown that a looped wire bond structure would be an obvious variant of the taught wire bond structure. Therefore, examiner considers replacing the wire bond with a looped wire bond to be new allowable subject matter
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
FISHER; Jeremy (US 20230197597 A1), Katkar; Rajesh (US 9583411 B2), Liu; Tao (US 6529365 B1), Evans Jr, Daniel D. "Multipurpose Wire Bonding–Bumps, Wires, Combination Interconnects, and Operation Efficiency." In International Symposium on Microelectronics, vol. 2013, no. 1, pp. 000324-000330. International Microelectronics Assembly and Packaging Society, 2013. ("Evans, Daniel D.,Multipurpose Wire Bonding – Bumps, Wires, Combination Interconnects, and Operation Efficiency, 2013, IMAPS, 2013, pages 6-7" ) Daniel teaches the stitched wire bon and the looped wire bond on page 6-7.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAIME LYNN SPRENGER whose telephone number is (571)272-8444. The examiner can normally be reached Monday - Friday, 9:00a.m. - 5:00p.m. ET..
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/JAIME LYNN SPRENGER/ Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
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