DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I in the reply filed on 6/25/2026 is acknowledged.
Information Disclosure Statement
Acknowledgement is made of Applicant's Information Disclosure Statement (IDS) from PTO-1449. The IDS has been considered.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "610" and "615" have both been used to designate the same layer in the left-most figure in Fig. 6.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-16 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, because the specification, while being enabling for a specific combinations of materials, does not reasonably provide enablement for all possible combinations of materials as encompassed by the claim. The specification does not enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to use the invention commensurate in scope with these claims.
Claims 1 and 9 recites a “sacrificial layer” and removal of a portion of the sacrificial layer using a “wet etchant” containing “hydrogen (H+) ions”. The specifications provide a list of sacrificial layers like aluminum oxide (AlxOy such as Al2O3), titanium nitride (TiN), and/or tungsten carbonitride (WCN) (para [0064]) and a list of wet etchant containing hydrogen (H+) ions that include hydrochloric acid (HCl), sulfuric acid (H2SO4), hydrobromic acid (HBr), and/or carbon dioxide (CO2) dissolved in water (H2O) (para [0075]). However, the claim encompasses all possible combination of sacrificial layer
(which can be any material) that can be etched with any wet etchant containing “hydrogen (H+) ions”, which would require undue experimentation to sort out the scope. For example, a sacrificial layer made of gold (Au) cannot be etched with water which contains hydrogen (H+) ions. Hence claims 1 and 9 are rejected. Claims 2-8 and 10-16 depend from claims 1 and 9 respectively and are rejected at least for the reasons above.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being incomplete for omitting essential structural cooperative relationships of elements, such omission amounting to a gap between the necessary structural connections. See MPEP § 2172.01.
Claim 1 recites that “hydrogen (H+) ions in the wet etchant inhibit etching of the sacrificial spacers between the vertically adjacent nanostructure channels of the plurality of nanostructure channels” as shown in Fig. 7I. However, this is dependent on a critical vertical spacing between the vertically spaced channels 315a. If the vertical spacing is large, the etchant will be able to gradually remove all the sacrificial layers completely between the vertically adjacent nanostructure channels, as it does on the sidewalls of the channels, and the invention will not work. Therefore, the critical vertical spacing between the vertically spaced channels, which helps in the inhibition of the etching is missing in the claim. Hence claim 1 is rejected. Claims 2-8 depend from claim 1 and are rejected at least for the reasons above.
Claim 9 recites that “a combination of hydrogen (H+) ions in the second wet etchant and a material of the sacrificial spacers inhibits increasing of a vertical width of the seams” as shown in Fig. 7I. However, this is dependent on a critical vertical spacing between the vertically spaced channels 315a. If the vertical spacing is large, the etchant will be able to gradually remove all the sacrificial layers completely between the vertically adjacent nanostructure channels, as it does on the sidewalls of the channels, and the invention will not work. Therefore, the critical vertical spacing between the vertically spaced channels, which helps in the inhibition of the etching is missing in the claim. Hence claim 9 is rejected. Claims 10-16 depend from claim 9 and are rejected at least for the reasons above.
Claim 11 recites the limitation "first portions" in line 7. There is insufficient antecedent basis for this limitation in the claim. “First portions” is already defined in claim 9 from which claim 11 depends on. It is unclear if the applicant is referring to the same “first portions” as in claim 9 or redefining a new one. Hence, claim 11 is indefinite and rejected. For examination purposes, the limitation will be treated as “the first portions”.
Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 13 recites “forming the second type work function metal layer comprises: removing the second type work function metal layer after removing the sacrificial spacers” in lines 4-6. It is unclear how the second type work function metal layer is formed by “removing”. Hence, claim 13 is indefinite and rejected. For examination purposes, the limitation will be treated as “forming the second type work function metal layer comprises: -- forming -- the second type work function metal layer after removing the sacrificial spacers”.
Claim 16 recites the limitation "first portions" in lines 5 and 8, “a first wet etchant” in lines 2-3 and “a second wet etchant” in line 6. There is insufficient antecedent basis for this limitation in the claim. “First portions”, “a first wet etchant” and “a second wet etchant” are already defined in claim 9 from which claim 11 depends on. It is unclear if the applicant is referring to the same “first portions”, the same “first wet etchant” and the same “second wet etchant” as in claim 9 or redefining new ones. Hence, claim 16 is indefinite and rejected. For examination purposes, the limitation will be treated as “the first portions” in lines 5 and 8, “the first wet etchant” in lines 2-3 and “the second wet etchant” in line 6.
Furthermore, in claim 16, the claim recites, “removing first portions of the sacrificial spacer layer from sides of the plurality of nanostructure channels”. The “first portions” are only defined with respect to the first plurality of nanostructure channels in claim 9 from which claim 16 depends on. Therefore, it is unclear if the “plurality of nanostructure channels” means only the “first plurality of nanostructure channels” or all nanostructure channels. Hence, claim 16 is indefinite and rejected. For examination purposes, the limitation in claim 16 will be treated as follow:
“wherein removing -- the -- first portions of the sacrificial spacer layer from sides of the -- first -- plurality of nanostructure channels comprises performing, using --the -- second wet etchant that is different from the first wet etchant, a second etch operation to remove -- the -- first portions of the sacrificial spacer layer from sides of the -- first -- plurality of nanostructure channels”.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 21-24 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Huang et al. (US 2021/0336033 A1).
Re Claim 21, Huang teaches a method, comprising:
forming a first plurality of nanostructure channels (channels 215 in region 240-1, Fig. 3B, para [0024]) arranged in a first direction (x-axis, Fig. 3B) that is approximately perpendicular to a semiconductor substrate (202, Fig. 3B, para [0022]) of a semiconductor device (semiconductor device 200, Figs. 3A-3B, para [0020]);
forming a second plurality of nanostructure channels (channels 215 in region 240-2, Fig. 3B, para [0024]), adjacent to the first plurality of nanostructure channels (channels 215 in region 240-1) in a second direction (x-axis, Fig. 3B), that are arranged in the first direction (see Fig. 3B) that is approximately perpendicular to the semiconductor substrate (202, Fig. 3B),
wherein the first plurality of nanostructure channels and the second plurality of nanostructure channels (channels 215) extend in a third direction (z-axis, Fig. 3B) that is approximately perpendicular to the second direction (x-axis, Fig. 3B);
forming a first gate structure (340, Fig. 9B, para [0038]), wrapping around the first plurality of nanostructure channels (channels 215 in region 240-1), comprising a first type work function metal layer (340 is n-type, para [0031]);
forming a first gate dielectric layer (282, Fig. 9B, para [0029]) between the first gate structure (340) and the first plurality of nanostructure channels (channels 215 in region 240-1),
wherein, in the third direction (z-axis, Fig. 3B), an angle between a first portion of the first gate dielectric layer (corner sidewall of 282) on a sidewall of a nanostructure channel of the first plurality of nanostructure channels (channels 215 in region 240-1), and a second portion of the first gate dielectric layer (top surface of 282) on a top surface of the nanostructure channel (top surface of channel 215), is greater than or approximately equal to 100 degrees (since the corner sidewall of 282 is curved, an angle between the curved sidewall and the top surface of 282 will be greater than 100 degrees, see annotated Fig. 3B below, where an ∠ PQR will encompass an angle that is greater than 100 degrees);
forming a second gate structure (300, Fig. 16B, para [0050]), wrapping around each of the second plurality of nanostructure channels (channels 215 in region 240-2), comprising a second type work function metal layer (300 is p-type, para [0050]) different from the first type work function metal layer (340 is n-type, see above); and
forming a second gate dielectric layer (282, Fig. 16B, para [0029]) between the second gate structure (300) and the second plurality of nanostructure channels (channels 215 in region 240-2).
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Re Claim 22, Huang teaches the method of claim 21, wherein the angle between the first portion of the first gate dielectric layer and the second portion of the first gate dielectric layer is included in a range of approximately 100 degrees to approximately 160 degrees (since the corner sidewall of 282 is curved, an angle between the curved sidewall and the top surface of 282 will be included in a range of approximately 100 degrees to approximately 160 degrees, see annotated Fig. 3B above, where an ∠ PQR will encompass an angle that is between 100 degrees and 160 degrees).
Re Claim 23, Huang teaches the method of claim 21, wherein, in the third direction (z-axis, Fig. 3B), another angle between a first portion of the second gate dielectric layer (corner sidewall of 282) on a sidewall of another nanostructure channel of the second plurality of nanostructure channels (channels 215 in region 240-2), and a second portion of the second gate dielectric layer (top surface of 282) on a top surface of the other nanostructure channel (top surface of 215), is greater than or approximately equal to 100 degrees (since the corner sidewall of 282 is curved, an angle between the curved sidewall and the top surface of 282 will be greater than 100 degrees, see annotated Fig. 3B above, where an ∠ PQR will encompass an angle that is greater than 100 degrees).
Re Claim 24, Huang teaches the method of claim 23, wherein the angle between the first portion of the second gate dielectric layer and the second portion of the second gate dielectric layer is included in a range of approximately 100 degrees to approximately 160 degrees (since the corner sidewall of 282 is curved, an angle between the curved sidewall and the top surface of 282 will be included in a range of approximately 100 degrees to approximately 160 degrees, see annotated Fig. 3B above, where an ∠ PQR will encompass an angle that is between 100 degrees and 160 degrees).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-7 and 9-16 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2021/0336033 A1).
Re Claim 1, Huang teaches a method, comprising:
forming a plurality of nanostructure channels (channels 215 in region 240-2, Fig. 3B, para [0024]) that are arranged in a direction that is approximately perpendicular (see Fig. 3B) to a semiconductor substrate (202, Fig. 3B, para [0022]) of a semiconductor device (semiconductor device 200, Figs. 3A-3B, para [0020]);
forming a sacrificial spacer layer (284, Fig. 4B, para [0030]) around the plurality of nanostructure channels (215 in region 240-2);
etching (Fig. 5B), using a wet etchant (wet etchant can include HCl, para [0033]), the sacrificial spacer layer (284) to remove first portions of the sacrificial spacer layer from sides of the plurality of nanostructure channels (284 is removed from the sides of 215, see Fig. 5B),
wherein second portions of the sacrificial spacer layer (284’, Fig. 5B, para [0032]) remain between vertically adjacent nanostructure channels of the plurality of nanostructure channels as sacrificial spacers (284’, see Fig. 5B), and
forming a work function metal layer (340, Fig. 9B, para [0038]) on the plurality of nanostructure channels (215 in region 240-2, see Fig. 9B),
wherein the sacrificial spacers (284’, Fig. 9B) inhibit formation of the work function metal layer (340) between the vertically adjacent nanostructure channels of the plurality of nanostructure channels (215 in region 240-2, see Fig. 9B).
Huang does not explicitly state the hydrogen (H+) ions in the wet etchant inhibit etching of the sacrificial spacers between the vertically adjacent nanostructure channels of the plurality of nanostructure channels.
However, Huang teaches the same wet etchant (HCl, para [0033]) and the same material for the sacrificial spacer layer (284 can be aluminum oxide, para [0031]) as the applicant (see paras [0064] and [0075] of the original specification of the present application), and hence it would be obvious to one of ordinary skill in the art that it would have the same effect as the applicant in inhibiting the etching of the sacrificial spacers between the vertically adjacent nanostructure channels of the plurality of nanostructure channels.
Re Claim 2, Huang teaches the method of claim 1, wherein the sacrificial spacer layer comprises a material (284’ can be aluminum oxide, para [0031], Fig. 5B) but does not explicitly state that it has a positive surface charge.
However, one of ordinary skill in the art would realize that Huang is teaching the same material for sacrificial layer as the applicant (see para [0064] of the original specification of the present application which includes aluminum oxide) which is being etched by the same wet etchant (HCl, see Claim 1 above) as used by the applicant (see para [0075] of the original specification of the present application, which includes HCl), and hence would have a similar positive surface charge as recited in the claim.
Re Claim 3, Huang teaches the method of claim 1, wherein the wet etchant comprises a hydrogen-containing acid (wet etchant can include HCl, para [0033]).
Re Claim 4, Huang teaches the method of claim 1, further comprising:
etching the sacrificial spacer layer (284, Fig. 4B) to reduce a thickness of the sacrificial spacer layer (etching of 284 will gradually remove the material of 284, starting from an original thickness d0 to a reduced first thickness d1 after a certain etching time t1),
wherein etching the sacrificial spacer layer to remove the first portions of the sacrificial spacer layer (removing 284 from the sides of channels 215, Figs. 4B-5B) comprises:
etching the sacrificial spacer layer to remove the first portions of the sacrificial spacer layer after etching the sacrificial spacer layer to reduce the thickness of the sacrificial spacer layer (completely removing 284 from the sides of channels 215, Fig. 5B, after being etched to a reduced thickness d1, see above).
Re Claim 5, Huang teaches the method of claim 1, further comprising:
forming a gate dielectric layer (282, Fig. 4B, para [0029]) around the plurality of nanostructure channels (215, Fig. 4B),
wherein forming the sacrificial spacer layer (284, Fig. 4B) comprises:
forming the sacrificial spacer layer (284) on the gate dielectric layer (282), and
wherein etching the sacrificial spacer layer (etching of 284, para [0031]) results in etching of corners of the gate dielectric layer (there will be slight etching of dielectric layer 282 which will result in rounding of the corners of 282, Fig. 5B, para [0031]).
Re Claim 6, Huang teaches the method of claim 1, further comprising:
etching, using the wet etchant, (wet etchant can include HCl, para [0033]), the sacrificial spacer layer (284) to remove third portions of the sacrificial spacer layer from sidewalls of adjacent interlayer dielectric (ILD) regions (284 is conformally deposited which includes sidewalls of interlayer dielectric 270, see Fig. 4D, also see Fig. 2D, where 270 is marked. During the etching step, 284 is removed from the sidewalls of 270, see Fig. 5D) that are located adjacent to the sides of the plurality of nanostructure channels (215, Figs 5B and 5D).
Re Claim 7, Huang teaches the method of claim 1, further comprising:
removing the work function metal layer (340 is removed, Fig. 14B) and the sacrificial spacers (284’ is removed, Fig. 14B) from the plurality of nanostructure channels (215 in region 240-2, Fig. 14B); and
forming, after removing the work function metal layer and the sacrificial spacers, another work function metal layer (300, Fig. 16B, para [0050]) around the plurality of nanostructure channels (215 in region 240-2, Fig. 16B).
Re Claim 9, Huang teaches a method, comprising:
forming a first plurality of nanostructure channels (channels 215 in region 240-2, Fig. 3B, para [0024]) that are arranged in a direction that is approximately perpendicular to a semiconductor substrate (202, Fig. 3B, para [0022]) of a semiconductor device (semiconductor device 200, Figs. 3A-3B, para [0020]);
forming a second plurality of nanostructure channels (channels 215 in region 240-1, Fig. 3B, para [0024]) that are arranged in the direction that is approximately perpendicular to the semiconductor substrate (202, Fig. 3B);
forming a sacrificial spacer layer (284, Fig. 4B, para [0030]) around the first plurality of nanostructure channels (channels 215 in region 240-2) and around the second plurality of nanostructure channels (channels 215 in region 240-1);
removing the sacrificial spacer layer from the second plurality of nanostructure channels (complete removal of layer 284 from channels 215 in region 240-1, Fig. 7B) using a first wet etchant (first etchant can be NH4OH, para [0036]) and removing first portions of the sacrificial spacer layer from sides of the first plurality of nanostructure channels (removal of layer 284 from the sides of channels 215 in region 240-2, Fig. 5B) using a second wet etchant (second etchant can include HCl, para [0033]);
wherein second portions of the sacrificial spacer layer (284’, Fig. 5B, para [0032]) remain between vertically adjacent nanostructure channels of the first plurality of nanostructure channels (channels 215 in region 240-2, Fig. 5B) as sacrificial spacers (284’, Fig. 5B),
forming a work function metal layer (340, Fig. 9B, para [0038]) on the first plurality of nanostructure channels (channels 215 in region 240-2) and around the second plurality of nanostructure channels (channels 215 in region 240-1),
wherein the sacrificial spacers (284’, Fig. 9B) inhibit formation of the work function metal layer (340, Fig. 9B) between the vertically adjacent nanostructure channels of the first plurality of nanostructure channels (channels 215 in region 240-2, see Fig. 9B); and
removing the work function metal layer (removal of layer 340, Fig. 13B) from the first plurality of nanostructure channels (channels 215 in region 240-2, Fig. 13B).
Huang does not explicitly state a formation of seam and hence does not explicitly teach the following:
wherein seams are located between vertically adjacent sacrificial spacers that are between the vertically adjacent nanostructure channels, and
wherein a combination of hydrogen (H+) ions in the second wet etchant and a material of the sacrificial spacers inhibits increasing of a vertical width of the seams;
However, Huang teaches that the sacrificial layer (284, Fig. 4B) is formed conformally using an atomic layer deposition process (ALD). Hence, it would be obvious to one of ordinary skill in the art, as the sacrificial layer is grown, a seam will be formed at the intersection where the sacrificial layers surrounding the channels meet, as shown in annotated Fig. 4B below. (Examiner notes that a seam can be defined as a line or a groove formed by the abutment of edges. The claim language does not preclude this treatment). After the etching of layer 284 from the sidewalls of the channel 215, the seam is still present between the adjacent sacrificial spacers 284’, as annotated in Fig. 5B below.
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Furthermore, Huang teaches the same second wet etchant (HCl, para [0033]) and the same material for the sacrificial layer (284 can be aluminum oxide, para [0031]) as the applicant (see paras [0064] and [0075] of the original specification of the present application), and hence it would have the same effect as the applicant in inhibiting the vertical width of the seam. Huang states that the parameters of etching process, including the etching solution, are tuned to remove layer 284 from the sidewalls of the channels while keeping the sacrificial spacer 284’ (para [0033]). Thus, it would be obvious to one of ordinary skill in the art that a combination of etching agent, material for the sacrificial layer, and other etching parameters as disclosed by Huang, help in restricting the size of the layer 284’ and inhibits the vertical widths of the seam.
Re Claim 10, Huang teaches the method of claim 9,
wherein the first wet etchant comprises a basic wet etchant (first etchant can be NH4OH, para [0036]); and
wherein the second wet etchant comprises an acidic wet etchant selected from at least one of: hydrofluoric acid (HF), hydrochloric acid (HCl), sulfuric acid (H2SO4), hydrobromic acid (HBr), or carbon dioxide (CO2) dissolved in water (H2O) (second etchant can include HCl, para [0033]).
Re Claim 11, Huang teaches the method of claim 9, further comprising:
forming a high dielectric constant (high-k) gate dielectric layer (282, Fig. 3B, para [0029]) around the first plurality of nanostructure channels (channels 215 in region 240-2, Fig. 3B),
wherein forming the sacrificial spacer layer (284, Fig. 4B) comprises:
forming the sacrificial spacer layer (284) on the high-k gate dielectric layer (282, Fig. 4B), and wherein removing the sacrificial spacer layer and removing the first portions of the sacrificial spacer layer result in rounding of corners of the high-k gate dielectric layer (there will be slight etching of dielectric layer 282 which will result in rounding of the corners of 282, para [0031], Fig. 5B).
Re Claim 12, Huang teaches the method of claim 9,
wherein the work function metal layer (340, Fig. 9B) is a first type work function metal layer (340 is n-type, para [0038]); and
wherein the method further comprises: forming, after removing the work function metal layer (340 is removed, Fig. 13B) from the first plurality of nanostructure channels (215 in region 240-2, Fig. 14B), a second type work function metal layer (300, which is p-type, Fig. 16B, para [0050]) around the first plurality of nanostructure channels (215 in region 240-2, Fig. 16B).
Re Claim 13, Huang teaches the method of claim 12, further comprising:
removing the sacrificial spacers (284’ is removed, Fig. 14B) from the first plurality of nanostructure channels (215 in region 240-2, Fig. 14B) after removing the work function metal layer (340 is removed earlier in Fig. 13B) from the first plurality of nanostructure channels,
wherein forming the second type work function metal layer (300, Fig. 16B) comprises: forming the second type work function metal layer after removing the sacrificial spacers (removal of 284’ in Fig. 14B before the formation of 300 in Fig. 16B).
Re Claim 14, Huang teaches the method of claim 9,
removing third portions of the sacrificial spacer layer (284, Figs. 4B and 4D) from sidewalls of adjacent interlayer dielectric (ILD) regions (284 is conformally deposited which includes sidewalls of interlayer dielectric 270, see Fig. 4D, also see Fig. 2D, where 270 is marked. During the etching step, 284 is removed from the sidewalls of 270, see Fig. 5D) that are located adjacent to the sides of the first plurality of nanostructure channels (215, Figs 5B and 5D).
Re Claim 15, Huang teaches the method of claim 14, wherein forming the work function metal layer comprises:
forming the work function metal layer (340, Fig. 9B) on the sidewalls of the adjacent ILD regions (340 is conformally deposited which includes sidewalls of interlayer dielectric 270, see Fig. 9D),
wherein portions of the work function metal layer on the sidewalls of the adjacent ILD regions are physically separated by a gap between the adjacent ILD regions (see Fig. 9D where portions of 340 are separated by a gap between adjacent ILDs).
Re Claim 16, Huang teaches the method of claim 9,
wherein removing the sacrificial spacer layer from the second plurality of nanostructure channels (complete removal of layer 284 from channels 215 in region 240-1, Fig. 7B) comprises performing, using the first wet etchant (first etchant can be NH4OH, para [0036]), a first etch operation to remove the sacrificial spacer layer from the second plurality of nanostructure channels (removal of layer 284 from channels 215 in region 240-1, first etch operation shown in Fig. 7B, para [0036]); and
wherein removing the first portions of the sacrificial spacer layer from sides of the first plurality of nanostructure channels (removal of layer 284 from the sides of channels 215 in region 240-2, Fig. 5B) comprises performing, using the second wet etchant (second etchant can include HCl, para [0033]) that is different from the first wet etchant (first etchant was NH4OH), a second etch operation to remove the first portions of the sacrificial spacer layer from sides of the first plurality of nanostructure channels (removal of layer 284 from the sides of channels 215 in region 240-2, second etch operation shown in Fig. 5B, paras [0032] – [0033]).
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 2021/0336033 A1) and further in view of Chu et al. (US 2022/0037499 A1).
Re Claim 8, Huang teaches the method of claim 7, but does not disclose that
the work function metal layer is a p-type work function metal layer; and
wherein the other work function metal layer is an n-type work function metal layer.
Huang discloses that the first work function metal layer (340, Fig. 9B) is an n-type (para [0031]) as it is intended for the n-type GAA device in region 240-1 (para [0022], Fig. 12B), while the other work function layer (300, Fig. 16B, para [0050]) is a p-type which is intended for the p-type GAA device in region 240-2 (para [0050], Fig. 12B).
However, one of ordinary skill in the art would realize that region 240-1 can be either p-type or n-type device depending on the design choice and 240-2 will be the opposite of 240-1. For example, 240-1 can be a p-type GAA device requiring the first work function metal layer to be p-type as recited in the claim and 240-2 can be a n-type, thus requiring the other work function metal layer to be n-type, as recited in the claim.
For example, related art Chu teaches a similar process, where the sacrificial layers (230, Fig. 8, para [0025]) is formed on a plurality of channels (2081 in region 1000, Fig. 8, para [0022]), followed by an etching process, leaving only a sacrificial spacer layer (230’, Fig. 9, para [0026]). This is followed by a first work function metal layer (234, Fig. 13, see region 1000) where the work function metal layer is p-type (para [0028]). This is followed by a removal of the work function layer (removal of 234, Fig. 16) and formation of a second work function layer (238, Fig. 17, para [0031]) which is n-type as recited in the claim.
Therefore, one of ordinary skill in the art would realize that there are only two predictable processes – where the first work function metal layer can be either p-type (as shown by Huang) or n-type (as shown by Chu). The other work function metal layer is determined by the choice of the first work function metal layer – if the first work function metal layer is p-type, the other work function metal layer will be n-type and vice-versa (disclosed by Huang and Chu). Therefore, a person of ordinary skill has good reason to pursue both the options depending on the design choice of the GAA device and reach the claimed limitation with anticipated success, as both are art-recognized alternate processes for forming a GAA device containing both an NFET and PFET devices, see KSR, 550 U.S. at 421, 82 USPQ2d at 1397.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hsu et al. (US 2021/0134950 A1) shows a similar process steps as the applicant.
Lee et al. (US 2022/0406598 A1) also shows similar process steps as the applicant
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/P.D./Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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