Prosecution Insights
Last updated: October 22, 2026
Application No. 18/660,582

PACKAGE STRUCTURE AND METHOD FOR FABRICATING THE SAME

Non-Final OA §102§103
Filed
May 10, 2024
Examiner
WARD, ERIC A
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
78%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
594 granted / 759 resolved
+10.3% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
27 currently pending
Career history
786
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
58.1%
+18.1% vs TC avg
§102
21.2%
-18.8% vs TC avg
§112
15.6%
-24.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 759 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group II, claims 8-27, in the reply filed on 09/02/2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 8,12,13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2021/0202348 A1 to Arrington et al., “Arrington”. Regarding claim 8, Arrington discloses a method (e.g. FIG. 2) for fabricating a package structure (e.g. FIG. 9), comprising: bonding (FIG. 3) a first package component (305, ¶ [0024]-[0025]) to a second package component (310, ¶ [0024]-[0025]); mounting (FIG. 3) an electronic component (306, ¶ [0026]) onto the second package component; (310); forming (e.g. FIG. 5A) a first adhesive wall (540, ¶ [0029]) over the second package component (310), wherein the first adhesive wall (540) is located between the first package component (305) and the electronic component (306); forming (FIG. 5B) a second adhesive wall (540B, ¶ [0038]) over the first adhesive wall (540A); forming (e.g. FIG. 6) a thermal interface material (650, ¶ [0041]) over the first package component (305) and covering (in FIG. 9) sidewalls of the first adhesive wall and the second adhesive wall (540 which comprises 540A and 540B); and bonding a lid structure (980, ¶ [0047]) over the second package component (310). Regarding claim 12, Arrington discloses the method as claimed in claim 8, and Arrington further discloses wherein during bonding (FIG. 9) the lid structure (980) over the second package component (310), the thermal interface material (650) flows away from the first package component (305) and in contact with the first adhesive wall or the second adhesive wall (540 comprises first adhesive wall 540A and second adhesive wall 540B from FIG. 5B). Regarding claim 13, Arrington discloses the method as claimed in claim 8, and Arrington further discloses wherein (FIG. 5B) forming the second adhesive wall (540B) further comprises forming an opening (e.g. inner sidewall of 540A facing 305, or FIG. 5A opening 533B continued to FIG. 5B) to expose the underlying first adhesive wall (540A). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 15-17,19 are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0202348 A1 to Arrington et al., “Arrington”, in view of US 8,115,304 B1 to Joshi et al., “Joshi”. Regarding claim 15, Arrington discloses a method (e.g. FIG. 2) for fabricating a package structure (e.g. FIG. 9), comprising: disposing (FIG. 3) a first package component (305, ¶ [0024]-[0025]) over a second package component (310, ¶ [0024]-[0025]); mounting (FIG. 3) an electronic component (306, ¶ [0026]) onto the second package component; forming (e.g. FIG. 5A) a first adhesive wall (540, ¶ [0029]) over the second package component (310); forming (FIG. 5B) a second adhesive wall (540B, ¶ [0038]) over the first adhesive wall (540A); forming (e.g. FIG. 6) a thermal interface material (650, ¶ [0041]) over the first package component (305), wherein (FIG. 9) a portion of the thermal interface material (540) is sandwiched between the first package component (305) and the second adhesive wall; and bonding a lid structure (980, ¶ [0047]) over the second package component (310). Arrington fails to clearly teach forming a protective material covering the electronic component (306). Joshi teaches (Fig. 3d) forming a protective material (second epoxy 311, column 5 lines 9-46) covering an electronic component (305). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Arrington with an epoxy protecting the discrete component (306) of Arrington as taught by Joshi in order to protect the discrete component from harsh environments or moisture or improve the thermal performance of the IC die (Joshi column 5 lines 47-63). Regarding claim 16, although Arrington in view of Joshi yields the method as claimed in claim 15, Arrington fails to clearly teach wherein the first adhesive wall (540A) is formed higher than the electronic component (306). However, Arrington in the drawings (FIG. 5A) shows a height (H2) higher than the height of the electronic component (306) and generally teaches selecting a suitable height (e.g. FIG. 5A height H1 or FIG. 5B height H3, ¶ [0030],[0032]) for the first adhesive wall. It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Arrington in view of Joshi with the first adhesive wall higher than the electronic component as suggested by the drawings of Arrington since it has been held that “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955), In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969), wherein in the instant case the height of the first adhesive wall contributes to the overall height H2 of the adhesive wall which determines the amount of thermal interface material (TIM) among other parameters making it a result effective variable, In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977), and MPEP 2144.05 Obviousness of Ranges II. OPTIMIZATION OF RANGES A. Optimization Within Prior Art Conditions or Through Routine Experimentation B. Only Result-Effective Variables Can Be Optimized. Regarding claim 17, Arrington in view of Joshi yields the method as claimed in claim 15, and Arrington further teaches wherein the second adhesive wall (540B) is formed over edges (e.g. near and over the left edge, higher than all edges) of the second package component (310), and the lid structure (980) is bonded over the second package component (310) via the second adhesive wall (540/540B). Regarding claim 19, Arrington in view of Joshi yields the method as claimed in claim 15, and Arrington further teaches forming the second adhesive wall (540B) further comprises forming an opening (exposed interior sidewalls, e.g. inner sidewall of 540A facing 305, or FIG. 5A opening 533B continued to FIG. 5B) to expose the underlying first adhesive wall (540A). Claims 21-24,27 are rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0202348 A1 to Arrington et al., “Arrington”, in view of US 2003/0085475 A1 to Im et al., “Im”. Regarding claim 21, Arrington discloses a method for fabricating a package structure, comprising: bonding (FIG. 3) a first package component (305, ¶ [0024]-[0025]) to a second package component (310, ¶ [0024]-[0025]); disposing (FIG. 3) an electronic component (306, ¶ [0026]) on the second package component (310); forming (e.g. FIG. 6) a thermal interface material (650, ¶ [0041]) over the first package component (305); forming (e.g. FIG. 5A) a first adhesive wall (540, ¶ [0029]) located between the first package component and the electronic component; and bonding a lid structure (980, ¶ [0047]) to the second package component (310), comprising (FIG. 9) pressing the thermal interface material (650) against the first adhesive wall (540). Arrington fails to clearly teach wherein the first adhesive wall is formed after the thermal interface material is formed. Im teaches (FIG. 8) wherein a first adhesive wall (dam 106A, ¶ [0048]-[0049]) is formed after (¶ [0050]) a thermal interface material (TIM) is formed. It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Arrington by switching the order of forming the adhesive wall(s) and the thermal interface material (TIM) as taught by Im since it has been held in KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007) that exemplary rationales that may support a conclusion of obviousness include: (A) Combining prior art elements according to known methods to yield predictable results; (B) Simple substitution of one known element for another to obtain predictable results; (C) Use of known technique to improve similar devices (methods, or products) in the same way; (D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results; (E) “Obvious to try” – choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success; (F) Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art; (G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention; wherein in the instant case one having ordinary skill in the art could have and would have found it obvious to apply (B) Simple substitution of forming the adhesive wall after the thermal interface material (TIM) rather than before with the predictable and desirably result of forming a suitable package with a dam for the thermal interface material (TIM). Regarding claim 22, Arrington in view of Im yields the method as claimed in claim 21, and Arrington further teaches: forming (FIG. 5B) a second adhesive wall (540B, ¶ [0038]) over the first adhesive wall (540A), wherein bonding the lid structure (980, ¶ [0047]) to the second package component comprises pressing the thermal interface material (650, ¶ [0041]) against the second adhesive wall (540B). Regarding claim 23, Arrington in view of Im yields the method as claimed in claim 22, and Arrington further discloses forming an opening (e.g. inner sidewall of 540A facing 305, or FIG. 5A opening 533B continued to FIG. 5B) in the second adhesive wall, wherein (FIG. 9) the thermal interface material (650) passes through the opening of the second adhesive wall (upper 540). Regarding claim 24, Arrington in view of Im yields the method as claimed in claim 22, and Arrington further teaches wherein the lid structure (980, ¶ [0047]) is connected to the second package component (310) via the first adhesive wall (540A) and the second adhesive wall (540B). Regarding claim 27, although Arrington in view of Im yields the method as claimed in claim 21, Arrington fails to clearly state in sufficient specificity for anticipation (MPEP 2131.03) wherein a width (W2) of the first adhesive wall (540A) is from about 1 mm to about 3 mm. However, Arrington teaches wherein a width (W2) of the first adhesive wall (540A) may be less than 5 mm, more advantageously less than 2 mm, and may even be less than 500 μm (¶ [0031]) which overlaps with the claimed range. It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Arrington in view of Im with the width within the claimed range as taught by the overlapping range of Arrington since it has been held that in the case where the claimed ranges "overlap or lie inside ranges disclosed by the prior art" a prima facie case of obviousness exists. In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990) (MPEP 2144.05), or since it has been held that “where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955), In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969), wherein in the instant case the width of the first adhesive wall determines the amount of thermal interface material (TIM) to the formed among other parameters making it a result effective variable, In re Antonie, 559 F.2d 618, 195 USPQ 6 (CCPA 1977), and MPEP 2144.05 Obviousness of Ranges II. OPTIMIZATION OF RANGES A. Optimization Within Prior Art Conditions or Through Routine Experimentation B. Only Result-Effective Variables Can Be Optimized. Claim 26 is rejected under 35 U.S.C. 103 as being unpatentable over US 2021/0202348 A1 to Arrington et al., “Arrington”, in view of US 2003/0085475 A1 to Im et al., “Im”, as applied to claim 21 above, further in view of US 8,115,304 B1 to Joshi et al., “Joshi”. Regarding claim 26, although Arrington in view of Im yields the method as claimed in claim 21, Arrington fails to clearly teach forming a protective material over the electronic component before the thermal interface material is formed, wherein the first adhesive wall is spaced apart from the protective material. Joshi teaches (Fig. 3d) forming a protective material (second epoxy 311, column 5 lines 9-46) covering an electronic component (305) and spaced apart from the first electronic component (104) and TIM (such that applying the teachings of Joshi to Arrington would space the epoxy 311 away from the dam of Arrington which is formed proximate the TIM). It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have performed the method of Arrington in view of Im with an epoxy protecting the discrete component (306) of Arrington as taught by Joshi in order to protect the discrete component from harsh environments or moisture or improve the thermal performance of the IC die (Joshi column 5 lines 47-63). Allowable Subject Matter Claims 9-11,14,18,20,25 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Although prior art e.g. Joshi teaches forming a protective material (second epoxy 311) as discussed above, prior art fails to reasonably teach or suggest forming a protective material over the electronic component, wherein the first adhesive wall is formed on the protective material, as claim in claim 9 together with all of the limitations of claim 8. Claims 10-11 are objected to as including allowable subject matter insofar as they depend upon and include all of the limitations of claim 9. Additionally, although Arrington teaches (FIG. 5B) forming first (540A) and second (540B) adhesive walls as discussed above, prior art fails to reasonably teach or suggest performing a thermal treatment while bonding the lid structure over the second package component, wherein the thermal interface material passes through the opening during the thermal treatment as claimed in claim 14 together with all of the limitations of claim 13 and 8. Additionally, prior art fails to reasonably teach or suggest wherein the first adhesive wall is formed on opposite sides of the electronic component, and the protective material is surrounded by and in contact with the first adhesive wall as claimed in claim 18 together with all of the limitations of claim 15. Additionally, prior art fails to reasonably teach or suggest performing a thermal treatment while bonding the lid structure over the second package component, wherein the thermal interface material flows over the first adhesive wall via the opening during the thermal treatment as claim in claim 20 together with all of the limitations of claims 19 and 15. Additionally, prior art fails to reasonably teach or suggest forming a protective material over the electronic component before the thermal interface material is formed, wherein the first adhesive wall is formed to contact the protective material as claimed in claim 25 together with all of the limitations of claim 21. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2007/0045819 A1 to Edwards et al. teaches (e.g. Figure 10) forming at least two barriers (e.g. 1114,1126, ¶ [0040]) which are used to confine (Figure 11) a thermal compound (1115) on a first package component (10) bonded to a second package component (1121). Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC A WARD whose telephone number is (571)270-3406. The examiner can normally be reached M-F 10-6 ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Eric A. Ward/Primary Examiner, Art Unit 2891 09/29/2026
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Prosecution Timeline

May 10, 2024
Application Filed
Oct 02, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
78%
Grant Probability
92%
With Interview (+13.3%)
2y 6m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 759 resolved cases by this examiner. Grant probability derived from career allowance rate.

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