DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 05/13/2024 was filed before the first action on the merits. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,984,363. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of U.S. Patent No. 11,984,363 recites all of the limitations in claim 1 of the instant application.
Claim 2 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 2 of U.S. Patent No. 11,984,363. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 2 of U.S. Patent No. 11,984,363 recites all of the limitations in claim 2 of the instant application.
Claim 3 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 2 of U.S. Patent No. 11,984,363. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 2 of U.S. Patent No. 11,984,363 recites all of the limitations in claim 3 of the instant application.
Claim 4 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of U.S. Patent No. 11,984,363. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 1 of U.S. Patent No. 11,984,363 recites all of the limitations in claim 4 of the instant application.
Claim 7 is rejected on the ground of nonstatutory double patenting as being unpatentable over claim 9 of U.S. Patent No. 11,984,363. Although the claims at issue are not identical, they are not patentably distinct from each other because claim 9 of U.S. Patent No. 11,984,363 recites all of the limitations in claim 7 of the instant application.
Prior art of record
Re claim 1, Eom et al. (2016/0086950) teaches a semiconductor device (Figs. 19-20), comprising: a first epitaxial feature (43) disposed in a first device region (PMOS) of the semiconductor device (Figs. 19-20); a second epitaxial feature (44) disposed in a second device region (NMOS) of the semiconductor device (Figs. 19-20); a first silicide layer (81) disposed on the first epitaxial feature (43); a second silicide layer (82) disposed on the second epitaxial feature (44); a metal layer (83) disposed on the first silicide layer (81); a first contact plug (85) landing on the metal layer (83); and a second contact plug (86) landing on the second silicide layer (82).
Eom does not explicitly teach wherein the metal layer and the second silicide layer each include a first metal element, and the first silicide layer includes a second metal element different from the first metal element.
Re claim 10, Eom et al. (2016/0086950) teaches a semiconductor device (Figs. 19-20), comprising:
a first transistor (PMOS) of a first conductivity type (p-type); and a second transistor (NMOS) of a second conductivity type (n-type) opposite to the first conductivity type (p-type), wherein: the first transistor (PMOS) includes: a first epitaxial feature (43), a first silicide layer (81) over the first epitaxial feature (43), a first metal layer (83) over the first silicide layer (81), and a first contact plug (85) over the first metal layer (83), the second transistor (NMOS) includes: a second epitaxial feature (44), a second silicide layer (82) over the second epitaxial feature (44), a second metal layer (84) over the second silicide layer (82), and a second contact plug (86) over the second metal layer (84).
Eom does not explicitly teach wherein the second metal layer is thinner than the first metal layer.
Re claim 17, Eom et al. (2016/0086950) teaches a method (Figs. 19-20), comprising: forming an epitaxial feature (43) on a fin-shape structure (27); forming a germanium-containing layer (81) on the epitaxial feature (43); depositing a first metal layer (83) on the germanium-containing layer (81). Eom does not explicitly teach reacting the germanium-containing layer and the first metal layer to form a capping layer; removing the capping layer to expose the epitaxial feature; depositing a second metal layer on the epitaxial feature; reacting a top surface portion of the epitaxial feature and the second metal layer to form a silicide layer; and forming a contact plug over the silicide layer.
Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter:
The prior art of record does not anticipate or make obvious the device of claim 1, including each of the limitations and specifically wherein the metal layer and the second silicide layer each include a first metal element, and the first silicide layer includes a second metal element different from the first metal element, for the same reasons as mentioned for claim 1 in the prior art of record above. The prior art of record does not anticipate or make obvious the device of claim 10, including each of the limitations and specifically wherein the second metal layer is thinner than the first metal layer, for the same reasons as mentioned for claim 10 in the prior art of record above. The prior art of record does not anticipate or make obvious the method of claim 17, including each of the limitations and specifically reacting the germanium-containing layer and the first metal layer to form a capping layer; removing the capping layer to expose the epitaxial feature; depositing a second metal layer on the epitaxial feature; reacting a top surface portion of the epitaxial feature and the second metal layer to form a silicide layer; and forming a contact plug over the silicide layer, for the same reasons as mentioned for claim 17 in the prior art of record above.
Conclusion
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/FERNANDO L TOLEDO/Supervisory Patent Examiner, Art Unit 2897
/ADAM S BOWEN/Examiner, Art Unit 2897
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