Prosecution Insights
Last updated: July 17, 2026
Application No. 18/663,038

DIELECTRIC LAYER, INTERCONNECTION STRUCTURE USING THE SAME, AND MANUFACTURING METHOD THEREOF

Non-Final OA §102
Filed
May 13, 2024
Priority
Aug 14, 2018 — divisional of 10/950,426 +1 more
Examiner
GUMEDZOE, PENIEL M
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
1098 granted / 1320 resolved
+23.2% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
19 currently pending
Career history
1332
Total Applications
across all art units

Statute-Specific Performance

§101
0.5%
-39.5% vs TC avg
§103
76.6%
+36.6% vs TC avg
§102
11.8%
-28.2% vs TC avg
§112
8.2%
-31.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1320 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement(s) (IDS) submitted on 05/13/26 was/were received by the Examiner before the issuance/mailing date of the first office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) has/have been considered (except for anything in foreign language non-accompanied by an English translation) by the Examiner. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 16 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 2009/0280637). Re claim 16, Lee et al. disclose a structure, comprising: a substrate 10 (see fig. 8 and related text; see remaining of disclosure for more details); and a dielectric layer 20 over the substrate, wherein the dielectric layer has a volume percentage porosity in a range from about 10% to about 75% ([0032] discloses a volume porosity of 10-20% which falls in the claimed range); and a conductive material (40a or 44a or 44a&40a; [0036]) extending through the dielectric layer. Allowable Subject Matter Claims 1-15 are allowed. Claims 17-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Bruce et al. (US 2012/0329273) disclose a structure similar to the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

May 13, 2024
Application Filed
Jun 30, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12685155
ELECTRONIC PACKAGE AND SUBSTRATE STRUCTURE THEREOF
2y 11m to grant Granted Jul 14, 2026
Patent 12677660
SEMICONDUCTOR DEVICE
2y 8m to grant Granted Jul 07, 2026
Patent 12672570
SEMICONDUCTOR DEVICE
2y 6m to grant Granted Jun 30, 2026
Patent 12666987
SEMICONDUCTOR APPARATUS
3y 5m to grant Granted Jun 23, 2026
Patent 12666962
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE
3y 0m to grant Granted Jun 23, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
87%
With Interview (+3.6%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1320 resolved cases by this examiner. Grant probability derived from career allowance rate.

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