Prosecution Insights
Last updated: August 16, 2026
Application No. 18/665,848

SEMICONDUCTOR DEVICE HAVING BIT LINE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §102§DP
Filed
May 16, 2024
Priority
Apr 23, 2024 — divisional of 18/643,049
Examiner
SUN, YU-HSI DAVID
Art Unit
Tech Center
Assignee
NANYA TECHNOLOGY Corporation
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
5m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
673 granted / 871 resolved
+17.3% vs TC avg
Moderate +8% lift
Without
With
+8.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
31 currently pending
Career history
892
Total Applications
across all art units

Statute-Specific Performance

§101
3.6%
-36.4% vs TC avg
§103
45.9%
+5.9% vs TC avg
§102
22.3%
-17.7% vs TC avg
§112
20.3%
-19.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 871 resolved cases

Office Action

§102 §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by RYU et al. (US PG Pub 2022/0165736, hereinafter Ryu). Regarding claim 1, figures 2 and 17 of Ryu disclose a semiconductor device, comprising: a substrate (100); a bit line structure (295) disposed over the substrate; a landing pad (425) disposed over the bit line structure and having a recess region (430); and a first sealing layer (440) disposed in the recess region, wherein the first sealing layer includes a carbon-containing material (¶ 103). Regarding claim 2, figures 2 and 17 of Ryu disclose the first sealing layer (440) truncates an insulating spacer structure (355/335) of the bit line structure (295). Regarding claim 3, figures 2 and 17 of Ryu disclose the first sealing layer (440) contacts the insulating spacer structure (355/335) of the bit line structure (295). Regarding claim 4, figures 2 and 17 of Ryu disclose the first sealing layer (440) covers an air spacer (335) defined in the insulating spacer structure (355/335) of the bit line structure (295). Regarding claim 5, figures 2 and 17 of Ryu disclose the insulating spacer structure (355/335) is disposed between the bit line structure (295) and a storage node contact (375). Note that figure 1 shows an array of repeating cell structures with storage node contacts. Regarding claim 6, figures 2 and 17 disclose a second sealing layer (450) disposed on the first sealing layer (440) in the recess region (430), wherein the first sealing layer and the second sealing layer have different materials (¶ 47). Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-11 are provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 7 of copending Application No. 18/643,049 (reference application). Although the claims at issue are not identical, they are not patentably distinct from each other because: Regarding claim 1, claim 7 of the conflicting application discloses the entire claimed invention. Note the various dependent claims are anticipated by/obvious in view of the conflicting application/patent. This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented. Allowable Subject Matter Claims 8-11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to YU-HSI DAVID SUN whose telephone number is (571)270-5773. The examiner can normally be reached Mon-Fri 8am-4pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached at 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YU-HSI D SUN/ Primary Examiner, Art Unit 2817
Read full office action

Prosecution Timeline

May 16, 2024
Application Filed
Jul 29, 2026
Non-Final Rejection mailed — §102, §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12707750
IMAGING ELEMENT AND ELECTRONIC APPARATUS
2y 8m to grant Granted Aug 11, 2026
Patent 12708051
SEMICONDUCTOR PACKAGE
2y 4m to grant Granted Aug 11, 2026
Patent 12702037
BONDING APPARATUS, BONDING METHOD, AND COMPUTER READABLE STORAGE MEDIUM
3y 2m to grant Granted Aug 04, 2026
Patent 12696762
POWER SEMICONDUCTOR MODULE COMPRISING AT LEAST ONE POWER SEMICONDUCTOR ELEMENT
3y 7m to grant Granted Jul 28, 2026
Patent 12690489
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SEMICONDUCTOR DEVICE
3y 11m to grant Granted Jul 21, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
86%
With Interview (+8.5%)
2y 8m (~5m remaining)
Median Time to Grant
Low
PTA Risk
Based on 871 resolved cases by this examiner. Grant probability derived from career allowance rate.

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