Prosecution Insights
Last updated: July 17, 2026
Application No. 18/668,441

SEMICONDUCTOR DEVICE HAVING LANDING PAD AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §102§103
Filed
May 20, 2024
Examiner
HAIDER, WASIUL
Art Unit
Tech Center
Assignee
NANYA TECHNOLOGY Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
497 granted / 540 resolved
+32.0% vs TC avg
Moderate +6% lift
Without
With
+6.3%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
18 currently pending
Career history
559
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
87.0%
+47.0% vs TC avg
§102
2.3%
-37.7% vs TC avg
§112
2.9%
-37.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 540 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 1. Claim(s) 1-4,8-9 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by US 20240324182 A1 (Cho). Regarding claim 1, Cho shows (Fig. 1-2) a semiconductor device, comprising: PNG media_image1.png 644 636 media_image1.png Greyscale a bit line (BL, para 28) extending in a first direction (D3); an oxide film (40, para 32) extending in a second direction (D2) and disposed over the bit line (Fig. 1); and a plurality of landing pads (LP, para 38) arranged along the oxide film (Fig. 1). Regarding claim 2, Cho shows (Fig. 1-2) wherein the plurality of landing pads are alternately arranged on two adjacent bit lines along the first direction (as shown above). Regarding claim 3, Cho shows (Fig. 1-2) wherein about 50 to 100 percent of an area of one of the plurality of landing pads overlaps the bit line (as shown above). Regarding claim 4, Cho shows (Fig. 1-2) wherein a curved surface of one of the plurality of landing pads overlaps the bit line (as shown above). Regarding claim 8, Cho shows (Fig. 2) a contact area (area formed between LP and OSP) under one of the plurality of landing pads (LP). Regarding claim 9, Cho shows (Fig. 2) a lower electrode (within DSP, para 44) electrically connected with the contact area (through LP as shown in Fig. 2 A-A’ top right). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 1. Claim(s) 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cho. Regarding claim 5, Cho shows landing pads on a top surface of the bit line and the oxide film. Cho does not show wherein a thickness of one of the plurality of landing pads on a top surface of the bit line is substantially equal to a thickness of the oxide film. However, the ordinary artisan would have recognized the thickness of the oxide film to be a result effective variable affecting the protection of storage node contact BC (para 62). Thus, it would have been obvious to have the thickness of the oxide film equal to the thickness of one of the plurality of landing pads on a top surface of the bit line, since optimum or workable ranges of such variables are discoverable through routine experimentation. See MPEP 2144.05 II.B. 2. Claim(s) 6-7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cho, as applied to claim 5 in view of US 20190043865 A1 (Chang). Regarding claim 6, Cho shows the landing pad and the bit line. Cho does not show the landing pad tapers away from the bit line. Chang shows (Fig. 7B) the landing pad (22a, para 34) tapers away from the bit line (16, para 28). It would have been obvious to one of ordinary skill in the art, at or before the effective filing date of the invention was made, to add the invention of Chang, with tapered landing pad, to the invention of Cho. The motivation to do so is that the combination produces the predictable result of avoiding the short circuits with the adjacent bit line mask (para 34). PNG media_image2.png 398 462 media_image2.png Greyscale Regarding claim 7, Cho in view of Chang shows wherein an angle defined by the landing pad and the top surface of the bit line is about 70 to 90 degrees (as shown by the two arrows and the angle between them). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WASIUL HAIDER whose telephone number is (571)272-1554. The examiner can normally be reached M-F 9 a.m. - 6 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WASIUL HAIDER/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

May 20, 2024
Application Filed
Jul 07, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684956
DISPLAY DEVICE AND METHOD FOR MANUFACTURING THE SAME
2y 9m to grant Granted Jul 14, 2026
Patent 12684876
PROTECTION DIODE MATRIX FOR ANTENNA PROTECTION
2y 9m to grant Granted Jul 14, 2026
Patent 12677657
SEMICONDUCTOR PACKAGES HAVING CAPACITORS
2y 6m to grant Granted Jul 07, 2026
Patent 12666848
DISPLAY APPARATUS
2y 6m to grant Granted Jun 23, 2026
Patent 12660607
ULTRA-THIN SEMI-METALS FOR LOW TEMPERATURE CONDUCTION
3y 8m to grant Granted Jun 16, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
98%
With Interview (+6.3%)
1y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 540 resolved cases by this examiner. Grant probability derived from career allowance rate.

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