Prosecution Insights
Last updated: October 01, 2026
Application No. 18/668,809

CHIP PACKAGE STRUCTURE WITH ADHESIVE WALL STRUCTURE AND METHOD FOR FORMING THE SAME

Non-Final OA §103
Filed
May 20, 2024
Examiner
MARIN, JACOB RAUL
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
11m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
23 granted / 23 resolved
+40.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
16 currently pending
Career history
43
Total Applications
across all art units

Statute-Specific Performance

§103
74.5%
+34.5% vs TC avg
§102
17.5%
-22.5% vs TC avg
§112
8.0%
-32.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 23 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 5, 11, 14-16, and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chi et al. (US-20210118767-A1 referred as Chi) in view of Lin et al. (CN-114975138-A referred as Lin). Regarding claim 1. Chi discloses a method for forming a chip package structure, comprising: disposing a chip structure over a substrate ([0038], figure 1a, disposing a chip structure #120 over a substrate #110); forming an adhesive wall structure over the substrate and surrounding the chip structure ([0047], figure 1D, forming an adhesive wall structure #180 over the substrate #110 and surrounding the chip structure #120); forming an adhesive layer over the substrate, wherein the adhesive layer surrounds the adhesive wall structure, and a first Young's modulus of the adhesive layer is different from a second Young's modulus of the adhesive wall structure ([0057], figure 1E, forming an adhesive layer #210 over the substrate #110 and the adhesive layer #210 is surrounding the adhesive wall structure #180. The young modulus of the adhesive layer #210 (made of epoxy) is different than the young modulus of the adhesive wall structure #180 (made of silicone)); and disposing a heat-spreading lid over the adhesive layer to cover the adhesive wall structure and the chip structure, wherein the heat-spreading lid is bonded to the adhesive layer and the adhesive wall structure ([0060], figure 1E, disposing a heat-spreading lid #220 over the adhesive layer #210 to cover the adhesive wall structure #180 and the chip structure #120). Chi lacks wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure. PNG media_image1.png 269 680 media_image1.png Greyscale Figure 1C annotated Lin discloses wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure ([pg 9 lines 21-30 of machine translation], figure 1c annotated above, the adhesive wall structure #116a has a convex curved sidewall facing away from the chip structure #108a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi to include wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure as taught by Lin in order to reduce materials used in manufacturing, allow for enhanced heat distribution, and to increase the wall structures integrity. Regarding claim 5. Chi as modified discloses wherein the first Young's modulus of the adhesive layer is greater than the second Young's modulus of the adhesive wall structure ([0057], figure 1E, the young modulus of the adhesive layer #210 (made of epoxy) is greater than the young modulus of the adhesive wall structure #180 (made of silicone)). Regarding claim 11. Chi discloses a method for forming a chip package structure, comprising: disposing a chip structure over a substrate ([0038], figure 1a, disposing a chip structure #120 over a substrate #110); forming an adhesive wall structure over the substrate and surrounding the chip structure ([0047], figure 1D, forming an adhesive wall structure #180 over the substrate #110 and surrounding the chip structure #120); forming an adhesive layer over the substrate, wherein the adhesive layer surrounds the adhesive wall structure, and a first elongation rate of the adhesive layer is different from a second elongation rate of the adhesive wall structure ([0057], figure 1E, forming an adhesive layer #210 over the substrate #110 and the adhesive layer #210 is surrounding the adhesive wall structure #180. The elongation rate of the adhesive layer #210 (made of epoxy) is different than the elongation rate of the adhesive wall structure #180 (made of silicone)); and disposing a heat-spreading lid over the adhesive layer to cover the adhesive wall structure and the chip structure, wherein the adhesive layer and the adhesive wall structure are in contact with the substrate and the heat-spreading lid ([0060], figure 1E, disposing a heat-spreading lid #220 over the adhesive layer #210 to cover the adhesive wall structure #180 and the chip structure #120 with contact). Chi lacks wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure. PNG media_image1.png 269 680 media_image1.png Greyscale Figure 1C annotated Lin discloses wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure ([pg 9 lines 21-30 of machine translation], figure 1c annotated above, the adhesive wall structure #116a has a convex curved sidewall facing away from the chip structure #108a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi to include wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure as taught by Lin in order to reduce materials used in manufacturing, allow for enhanced heat distribution, and to increase the wall structures integrity. Regarding claim 14. Chi as modified discloses wherein the first elongation rate of the adhesive layer is less than the second elongation rate of the adhesive wall structure ([0057], figure 1E, the first elongation rate of the adhesive layer #210 (made of epoxy) is less than the second elongation rate of the adhesive wall structure #180 (made of silicone)), and a first Young's modulus of the adhesive layer is greater than a second Young's modulus of the adhesive wall structure ([0057], figure 1E, the young modulus of the adhesive layer #210 (made of epoxy) is greater than the young modulus of the adhesive wall structure #180 (made of silicone)). Regarding claim 15. Chi as modified discloses wherein the substrate has a top surface having a convex portion, and the adhesive wall structure is over the convex portion ([0104], figure 11, in a different embodiment.. the substrate #110 includes a top surface having a convex portion #130 (since the bump #130 is conductive to the substrate #110 means its part of it) and the adhesive wall structure #1010 is seen over the convex portion #130). Regarding claim 16. Chi discloses a chip package structure, comprising: a substrate ([0038], figure 1a, substrate #110); a chip structure over the substrate ([0038], figure 1a, disposing a chip structure #120 over a substrate #110); an adhesive wall structure over the substrate and surrounding the chip structure ([0047], figure 1D, forming an adhesive wall structure #180 over the substrate #110 and surrounding the chip structure #120); an adhesive layer over the substrate and surrounding the adhesive wall structure, wherein a first Young's modulus of the adhesive layer is different from a second Young's modulus of the adhesive wall structure ([0057], figure 1E, forming an adhesive layer #210 over the substrate #110 and the adhesive layer #210 is surrounding the adhesive wall structure #180. The young modulus of the adhesive layer #210 (made of epoxy) is different than the young modulus of the adhesive wall structure #180 (made of silicone)); and a heat-spreading lid over the adhesive layer, the adhesive wall structure, and the chip structure, wherein the heat-spreading lid is bonded to the adhesive layer and the adhesive wall structure ([0060], figure 1E, disposing a heat-spreading lid #220 over the adhesive layer #210 to cover the adhesive wall structure #180 and the chip structure #120). Chi lacks wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure. PNG media_image1.png 269 680 media_image1.png Greyscale Figure 1C annotated Lin discloses wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure ([pg 9 lines 21-30 of machine translation], figure 1c annotated above, the adhesive wall structure #116a has a convex curved sidewall facing away from the chip structure #108a). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi to include wherein the adhesive wall structure has a convex curved sidewall facing away from the chip structure as taught by Lin in order to reduce materials used in manufacturing, allow for enhanced heat distribution, and to increase the wall structures integrity. Regarding claim 19. Chi as modified discloses wherein the first Young's modulus of the adhesive layer is greater than the second Young's modulus of the adhesive wall structure ([0057], figure 1E, the young modulus of the adhesive layer #210 (made of epoxy) is greater than the young modulus of the adhesive wall structure #180 (made of silicone)). Regarding claim 20. Chi as modified discloses wherein a first elongation rate of the adhesive layer is less than a second elongation rate of the adhesive wall structure ([0057], figure 1E, the first elongation rate of the adhesive layer #210 (made of epoxy) is less than the second elongation rate of the adhesive wall structure #180 (made of silicone)). Claims 2-4, 10, 12, and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Chi et al. (US-20210118767-A1 referred as Chi) and Lin et al. (CN-114975138-A referred as Lin) in further view of Lin et al. (US-20220270893-A1 referred as Lin #2). Regarding claim 2 and claim 3. Chi as modified lacks [claim 2] wherein the second Young's modulus of the adhesive wall structure is greater than the first Young's modulus of the adhesive layer. [claim 3] wherein a first bottom surface of the adhesive wall structure is lower than a second bottom surface of the adhesive layer. [claim 10] further comprising: forming a heat conductive layer over the chip structure, wherein the adhesive wall structure further surrounds the heat conductive layer. Lin #2 discloses [claim 2] wherein the second Young's modulus of the adhesive wall structure is greater than the first Young's modulus of the adhesive layer ([0076], figure 5A, the adhesive wall structure #230 (made of polyimide) has a greater young modulus than the adhesive layer #220 (made of epoxy)). [claim 3] wherein a first bottom surface of the adhesive wall structure is lower than a second bottom surface of the adhesive layer ([0076], figure 5A, the adhesive wall structure #230 has a lower bottom surface than the adhesive layer #220). [claim 10] further comprising: forming a heat conductive layer over the chip structure, wherein the adhesive wall structure further surrounds the heat conductive layer ([0096], figure 5B, forming a heat conductive layer #240 over the chip substrate #122 wherein the adhesive wall structure #230 surrounds the heat conductive layer #240). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi as modified to include wherein the adhesive wall structure having a greater young modulus and lower bottom surface than the adhesive layer and also including a heat conductive layer as taught by Lin #2 in order to reduce unwanted material warping, distribute weight across the device, and to reduce manufacturing costs. Regarding claim 4. Chi as modified discloses wherein the substrate has a top surface having a recess, and the adhesive wall structure is in the recess ([0043], figure 1b-1c, the substrate #110 has a top surface with a recess #G2 which is then filled with the adhesive wall structure #180 in the recess #G2). Regarding claim 12, claim 17, and claim 18. Chi as modified lacks [claim 12] wherein the first elongation rate of the adhesive layer is greater than the second elongation rate of the adhesive wall structure, and a first Young's modulus of the adhesive layer is less than a second Young's modulus of the adhesive wall structure. [claim 17] wherein the first Young's modulus of the adhesive layer is less than the second Young's modulus of the adhesive wall structure. [claim 18] wherein a first elongation rate of the adhesive layer is greater than a second elongation rate of the adhesive wall structure. Lin #2 discloses [claim 12] wherein the first elongation rate of the adhesive layer is greater than the second elongation rate of the adhesive wall structure ([0076], figure 5A, in a different embodiment the adhesive layer #220 (made of silicone) has a greater elongation rate than the adhesive wall structure #230 (made of epoxy)), and a first Young's modulus of the adhesive layer is less than a second Young's modulus of the adhesive wall structure ([0076], figure 5A, additionally the young modulus of the adhesive layer #220 (made of silicone) is less than the young modulus of the adhesive wall structure #230 (made of epoxy)). [claim 17] wherein the first Young's modulus of the adhesive layer is less than the second Young's modulus of the adhesive wall structure ([0076], figure 5A, additionally the young modulus of the adhesive layer #220 (made of silicone) is less than the young modulus of the adhesive wall structure #230 (made of epoxy)). [claim 18] wherein a first elongation rate of the adhesive layer is greater than a second elongation rate of the adhesive wall structure ([0076], figure 5A, in a different embodiment the adhesive layer #220 (made of silicone) has a greater elongation rate than the adhesive wall structure #230 (made of epoxy)). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi as modified to include wherein the adhesive wall structure and the adhesive layer meet elongation rate and young modulus parameters as taught by Lin #2 in order to extend the devices lifetime, maximize the versatility of the element, and to reduce the device failing. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Chi et al. (US-20210118767-A1 referred as Chi) and Lin et al. (CN-114975138-A referred as Lin) in further view of Yeh et al. (US-20210217676-A1 referred as Yeh). Regarding claim 6. Chi as modified lacks wherein a first bottom surface of the adhesive layer is lower than a second bottom surface of the adhesive wall structure. Yeh discloses wherein a first bottom surface of the adhesive layer is lower than a second bottom surface of the adhesive wall structure ([0052], figure 1a for element identification then figure 1c, the first bottom surface of the adhesive layer #190 is lower than the second bottom surface of the adhesive wall structure #140). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi as modified to include wherein the adhesive wall structure having a greater young modulus and lower bottom surface than the adhesive layer as taught by Yeh in order to reduce unwanted material warping, distribute weight across the device, and to reduce manufacturing costs. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Chi et al. (US-20210118767-A1 referred as Chi), Lin et al. (CN-114975138-A referred as Lin) and Yeh et al. (US-20210217676-A1 referred as Yeh) in further view of Oganesian et al. (US-20150189204-A1 referred as Oganesian). Regarding claim 7. Chi as modified lacks wherein the substrate has a top surface having a recess portion, and the adhesive layer is over the recess portion. Oganesian discloses wherein the substrate has a top surface having a recess portion, and the adhesive layer is over the recess portion ([0014], figure 1, the substrate #12 has a top surface having a recess portion which is filled with an adhesive layer #16). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi as modified to include wherein the substrate has a top surface having a recess portion, and the adhesive layer is over the recess portion as taught by Oganesian in order to reduce total space used in the device, allow for compatibility for the adhesive layer, and to allow for a solid connection for the adhesive layer. Claims 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Chi et al. (US-20210118767-A1 referred as Chi) and Lin et al. (CN-114975138-A referred as Lin) in further view of Yeh et al. (US-20230069717-A1 referred as Yeh #2). Regarding claim 8 and claim 9. Chi as modified lacks [claim 8] wherein there is a gap between the chip structure and the adhesive wall structure. [claim 9] wherein the gap is an air gap. Yeh #2 discloses [claim 8] wherein there is a gap between the chip structure and the adhesive wall structure ([0070], figure 1B-1, there is a gap #162 between the chip structure #132 and the adhesive wall structure #126). [claim 9] wherein the gap is an air gap ([0070], figure 1B-1, since nothing is present in the #162, air is present in the gap). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application for Chi as modified to include wherein there is a air gap between the chip structure and the adhesive wall structure as taught by Yeh #2 in order to reduce material used in manufacturing, reduce total weight of device, and to allow breathability in the device for airflow and heat dissipation. Allowable Subject Matter Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicants disclosure includes Tsai et al. (US-20250349653-A1) and Hsieh et al. (US-20250174510-A1) for teaching the adhesive wall structure, substrate, and young modulus materials. Any inquiry concerning this communication or earlier communications from the examiner should be directed to JACOB R MARIN whose telephone number is (571)272-5887. The examiner can normally be reached Monday to Friday from 8:30am - 5:00pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272 - 2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JACOB RAUL MARIN/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

May 20, 2024
Application Filed
Sep 24, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
3y 3m (~11m remaining)
Median Time to Grant
Low
PTA Risk
Based on 23 resolved cases by this examiner. Grant probability derived from career allowance rate.

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