Prosecution Insights
Last updated: October 01, 2026
Application No. 18/671,417

CRYOGENIC ETCHING OF SILICON-CONTAINING MATERIALS

Non-Final OA §102§103§112
Filed
May 22, 2024
Priority
Jan 31, 2024 — provisional 63/627,716
Examiner
CARTER, JONATHAN LANGDON
Art Unit
1713
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Applied Materials Inc.
OA Round
1 (Non-Final)
100%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 100% — above average
100%
Career Allowance Rate
3 granted / 3 resolved
+35.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
29 currently pending
Career history
24
Total Applications
across all art units

Statute-Specific Performance

§101
0.9%
-39.1% vs TC avg
§103
70.3%
+30.3% vs TC avg
§102
4.2%
-35.8% vs TC avg
§112
20.3%
-19.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 3 resolved cases

Office Action

§102 §103 §112
CTNF 18/671,417 CTNF 101755 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claim 18 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. In claim 18, the limitation recites a layer of a first silicon-containing material, a layer of a second silicon-containing material, and a layer of a third silicon-containing material, and further recites wherein the first silicon-containing material, the second silicon-containing material, and the second silicon-containing material are different silicon-containing materials. The claim repeats the second silicon-containing material in place of the third silicon-containing material in the latter clause, resulting in an inconsistency in the recited elements. As written, it is unclear whether the claim is intended to recite two or three different silicon-containing materials, and whether the third silicon-containing material is distinct from the first and second silicon-containing materials. The claim will be interpreted as requiring three different silicon-containing materials; however, correction is required to clarify the intended subject matter. Claims 19-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite because they depend, directly or indirectly, from claim 18, which has been rejected as indefinite, as they do not cure the deficiencies of claim 18. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15 AIA Claim s 1–7 are rejected under 35 U.S.C. 102( a)(1) or (a)(2 ) as being anticipated by Lee et al. (US 2023/0230840 A1) . Regarding claim 1, Lee teaches providing an etchant precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region (the substrate is transferred to a plasma etching apparatus including gases for generating plasma paragraphs [0034]-[0045], [0053], [0070], see Fig. 1-2). Lee further teaches wherein the substrate comprises a layer of a silicon-containing material, wherein the silicon-containing material comprises, a silicon-and-nitrogen-containing material, a silicon-and-oxygen-containing material, or silicon material (a mold layer (MO) formed on the substrate, wherein the mold layer includes silicon-containing materials including silicon oxide and silicon nitride paragraph [0070]; Fig. 3). Lee also teaches forming plasma effluents of the etchant precursor (generating plasma from the process gas, wherein the plasma produces radicals of the process gas corresponding to plasma effluents, paragraph [0053]). Lee further teaches contacting the substrate with the plasma effluents of the etchant precursor, wherein the contacting etches a portion of the layer of the silicon-containing material (Lee discloses that radicals generated from the process gas contact and etch the mold layer on the substrate, paragraphs [0053]–[0054]; Figs. 3–8). Lee additionally teaches that the processing region is maintained at a cryogenic temperature while contacting the substrate with the plasma effluents of the etchant precursor (the mold layer is etched at cryogenic temperatures in a cryogenic etching process at temperatures ranging from about −150°C to about 0°C paragraph [0008], [0053], and [0068]-[0073]). Regarding claim 2, Lee teaches that the substrate comprises a patterned mask material overlying the layer of the silicon-containing material, as Lee discloses a hard mask layer (HML) formed on the mold layer (MO), wherein the hard mask layer is patterned to expose portions of the mold layer (paragraph [0071]; Fig. 3). Regarding claims 3–5 , Lee teaches the recited silicon-containing materials and etchant precursors. Lee teaches that the silicon-containing material comprises a silicon-and-nitrogen-containing material and a silicon-and-oxygen-containing material, with regard to claim 3 and 4 (Lee discloses that the mold layer includes silicon nitride and silicon oxide, paragraph [0070]). Lee further teaches that the etchant precursor comprises hydrogen fluoride (HF), nitrogen trifluoride (NF3), sulfur hexafluoride (SF6), or a fluorocarbon (CHxFy), with regard to claim 3 and 4 (Lee discloses process gases including fluorine-containing and hydrogen-containing gases such as HF, NF3, SF6, and fluorocarbon species, paragraph [0054]). Lee also teaches providing a carbon-containing precursor with the etchant precursor, with regard to claim 5 (Lee discloses fluorocarbon gases (CxFy, CxHyFz) within the process gas supplied to the chamber, paragraph [0054]). Regarding claim 6, Lee teaches that the plasma effluents of the etchant precursor are an inductively coupled plasma, as Lee discloses that plasma may be generated using an inductively coupled plasma method (paragraph [0043]). Regarding claim 7, Lee teaches applying a bias power while contacting the substrate with the plasma effluents of the etchant precursor, as Lee discloses a plasma etching apparatus including a pedestal electrically connected to a power supply configured to supply radio-frequency power, wherein the pedestal functions as an electrode applying power to the substrate during plasma processing (paragraph [0049]; Fig. 2) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 07-21-aia AIA Claim s 8–9, 11–12, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0230840 A1) . Regarding claim 8 , Lee teaches providing a first etchant precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region (Lee discloses supplying process gas into chamber 590, in which a substrate is disposed, to generate plasma for plasma etching, paragraphs [0053], [0067]). Lee further teaches wherein the substrate comprises a layer of a first silicon-containing material and a layer of a second silicon-containing material, wherein the first silicon-containing material and the second silicon-containing material are different silicon-containing materials (Lee discloses a mold layer including at least one silicon oxide layer and at least one silicon nitride layer stacked alternately with each other, paragraph [0070]; Fig. 3). Lee also teaches forming plasma effluents of the first etchant precursor and contacting the substrate with the plasma effluents of the first etchant precursor at a cryogenic temperature, wherein the contacting etches a portion of the layer of the first silicon-containing material (Lee discloses generating plasma from the process gas to etch the mold layer at cryogenic temperatures, paragraphs [0053]–[0054], [0073]). Lee does not expressly identify the process gases as a “first etchant precursor” and a “second etchant precursor” corresponding to respective layers. However, Lee teaches supplying multiple process gases, including first, second, and third process gases, into the chamber to generate plasma for etching the substrate (paragraphs [0059], [0067]). Lee also teaches that the process gas may include one or more fluorine-containing gases suitable for etching a mold layer or etch-target layer under plasma (paragraphs [0054]–[0055]). The examiner notes that the claim only requires two precursor gases and two layers. The claim does not require the precursor gases or to be applied in different etching steps. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use a second etchant precursor selected from Lee’s disclosed process gases to etch the second silicon-containing material layer of Lee’s stacked mold layer, because Lee teaches multiple process gases useful for the same plasma etching process, and combining known etching gases for their known etching purpose would have predictably used prior art elements according to their established functions. See MPEP §2144.06. Regarding claim 9 , Lee teaches the method of claim 8 as discussed above. Lee further teaches wherein the first etchant precursor and the second etchant precursor comprise hydrogen fluoride (HF), nitrogen trifluoride (NF3), carbon tetrafluoride (CF4), fluoroform (CHF3), hexafluorobutadiene (C4F6), or sulfur hexafluoride (SF6) (Lee discloses process gases including CF4, C4F6, CHF3, SF6, NF3, and HF, paragraph [0054]). Regarding claim 11 , Lee teaches the method of claim 8 as discussed above. Lee further teaches providing a carbon-containing precursor with the first etchant precursor, the second etchant precursor, or both (Lee discloses fluorocarbon process gases including CxFy and CxHyFz, paragraph [0054]). Regarding claim 12 , Lee teaches the method of claim 8 as discussed above. Lee further teaches passivating a sidewall of the portion of the layer of the first silicon-containing material, a sidewall of the portion of the layer of the second silicon-containing material, or both (Lee discloses that ammonium salt generated during etching may be deposited on a sidewall of an etched hole and may serve as a passivation layer, paragraph [0084]; Figs. 6–7). Regarding claim 16 , Lee teaches the method of claim 12 as discussed above. Lee further teaches wherein the layer of the first silicon-containing material comprises silicon-and-oxygen-containing material and the layer of the second silicon-containing material comprises silicon-containing material (Lee discloses a mold layer including at least one silicon oxide layer, corresponding to the silicon-and-oxygen-containing material, and at least one silicon nitride layer, corresponding to the silicon-containing material, paragraph [0070]; Fig. 3) . 07-22-aia AIA Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0230840 A1) , as applied to claim 8 above, and further in view of Citla et al. (US 2023/0071366 A1) . Lee teaches the method of claim 8 as discussed above. However, Lee does not expressly teach halting a flow of the first etchant precursor prior to providing the second etchant precursor. However, Lee further teaches that the etching process can include cycle etching where different materials are etched at different times (paragraph [140-157]). Citla teaches halting a flow of a first etchant precursor prior to introducing a second etchant precursor (paragraph [0041]). As a result, the combined teachings of Lee and Citla show that onw of ordinary skill in the art would know to provide a purge gas between the cycles of Lee in order to conduct the cycle etching. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Lee to include halting the flow of the first etchant precursor prior to providing the second etchant precursor as taught by Citla in order to prevent mixing of chemistries and enable controlled sequential cycles of etching. See MPEP §2143 . 07-22-aia AIA Claim s 13–14 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0230840 A1) , as applied to claim 8 above, and further in view of Zhang et al. (US 2024/0112888 A1) . Regarding claim 13, Lee teaches the method of claim 8 as discussed above. However, Lee does not expressly teach that the portion of the layer of the first silicon-containing material, the portion of the layer of the second silicon-containing material, or both are characterized by a critical dimension of greater than or about 50 nm. Zhang teaches features having a critical dimension between 50 nm and 200 nm, including examples of about 75 nm (paragraphs [0020], [0038]). The claimed critical dimension of greater than or about 50 nm falls within the range taught by Zhang. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select a critical dimension within this range because Zhang teaches dimensions that overlap the claimed range, and where the claimed range overlaps or lies within a range disclosed by the prior art, a prima facie case of obviousness exists. See MPEP §2144.05. Regarding claim 14, Lee teaches the method of claim 8 as discussed above. However, Lee does not teach that the layer of the first silicon-containing material and the layer of the second silicon-containing material are each characterized by a thickness of greater than or about 100 nm. Zhang teaches layer thicknesses between 50 nm and 2.5 μm (paragraph [0019]). The claimed thickness of greater than or about 100 nm falls within the range taught by Zhang. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to select a thickness within this range because Zhang teaches thicknesses that overlap the claimed range, and where the claimed range overlaps or lies within a range disclosed by the prior art, a prima facie case of obviousness exists. See MPEP §2144.05 . 07-22-aia AIA Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0230840 A1) , as applied to claim 8 above, and further in view of Kuo et al. (US 2014/0030893 A1) . Lee teaches the method of claim 8 as discussed above. Lee further teaches that the substrate further comprises a patterned mask material (Lee discloses a hard mask layer formed over the mold layer, paragraph [0071]; Fig. 3). However, Lee does not teach that the substrate further comprises a layer of a metal-and-nitrogen-containing material on the layer of the first silicon-containing material. Kuo teaches a layer of a metal-and-nitrogen-containing material, as Kuo discloses a titanium nitride (TiN) layer within a multilayer structure (paragraph [0032]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Lee to include a metal-and-nitrogen-containing material such as titanium nitride as taught by Kuo in order to provide a barrier layer or hard mask layer, as such materials are conventionally used in semiconductor fabrication. See MPEP §2143 . 07-22-aia AIA Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Lee , as applied to claim 12 above, and further in view of Kudo et al. (US 2017/0372916 A1) . Lee teaches the method of claim 12 as discussed above. Lee does not teach maintaining the processing region at a pressure of less than or about 500 mTorr. Kudo teaches a cryogenic plasma etching process in which the processing chamber is maintained at a pressure of about 15 to 25 mTorr (paragraph [0079]). The claimed pressure of less than or about 500 mTorr encompasses the pressure range taught by Kudo. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to operate Lee’s cryogenic plasma etching process at the pressure conditions taught by Kudo because Kudo teaches pressure conditions for cryogenic plasma etching that fall within the claimed range, and where the claimed range overlaps or encompasses a range disclosed by the prior art, a prima facie case of obviousness exists. See MPEP §2144.05 . 07-21-aia AIA Claim s 18–20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2023/0230840 A1) . Regarding claim 18, Lee teaches providing a first etchant precursor to a processing region of a semiconductor processing chamber, wherein a substrate is disposed within the processing region (Lee discloses supplying process gas into chamber 590, in which a substrate is disposed, to generate plasma for plasma etching, paragraphs [0053], [0067]). Lee further teaches forming plasma effluents of the first etchant precursor and contacting the substrate with the plasma effluents of the first etchant precursor at a cryogenic temperature, wherein the contacting etches a portion of a silicon-containing material (Lee discloses generating plasma from the process gas to etch the mold layer at cryogenic temperatures, paragraphs [0053]–[0054], [0073]). Lee further teaches that the substrate comprises a plurality of silicon-containing layers (Lee discloses a mold layer including at least one silicon oxide layer and at least one silicon nitride layer stacked alternately with each other, paragraph [0070]; Fig. 3; see also paragraphs [0097], [0137], [0156]). Lee does not expressly teach identifying the layers as first, second, and third silicon-containing materials or expressly identifying corresponding first, second, and third etchant precursors for etching respective layers. However, Lee teaches supplying multiple process gases, including first, second, and third process gases, into the chamber to generate plasma for etching the substrate (paragraphs [0059], [0067]). Lee further teaches that the process gas may include one or more fluorine-containing gases suitable for etching silicon-containing materials (paragraphs [0054]–[0055]). The examiner notes that the claim only requires three precursor gases and three layers. The claim does not require the precursor gases to be different or to be applied in different etching steps. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use first, second, and third etchant precursors selected from Lee’s disclosed process gases to etch respective silicon-containing layers of Lee’s stacked structure, because Lee teaches multiple process gases useful for the same plasma etching process, and combining known etching gases for their known etching purpose would have predictably used prior art elements according to their established functions. See MPEP §2144.06. Regarding claim 19, Lee teaches the method of claim 18 as discussed above. Lee further teaches applying a bias power while contacting the substrate with plasma effluents (Lee discloses a pedestal configured to apply radio-frequency power to the substrate during plasma processing, paragraph [0049]; Fig. 2). Regarding claim 20, Lee teaches the method of claim 18 as discussed above. Lee further teaches that contacting the substrate with the plasma effluents of the first etchant precursor, the plasma effluents of the second etchant precursor, and the plasma effluents of the third etchant precursor are performed in the same semiconductor processing chamber (Lee discloses a chamber configured to receive multiple process gases, including first, second, and third process gases, which are mixed and supplied into the same chamber to generate plasma for etching the substrate, paragraphs [0009], [0042], [0059], [0067]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN CARTER whose telephone number is (571)272-8176. The examiner can normally be reached Monday - Friday 6:00 AM - 3:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Joshua L Allen can be reached at (571) 272-3176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHAN L CARTER/Examiner, Art Unit 1713 /ERIN F BERGNER/Primary Examiner, Art Unit 1713 Application/Control Number: 18/671,417 Page 2 Art Unit: 1713 Application/Control Number: 18/671,417 Page 3 Art Unit: 1713 Application/Control Number: 18/671,417 Page 4 Art Unit: 1713
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Prosecution Timeline

May 22, 2024
Application Filed
May 05, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

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Patent 12610766
METHOD OF PATTERNING A SEMICONDUCTOR STRUCTURE
2y 2m to grant Granted Apr 21, 2026
Study what changed to get past this examiner. Based on 1 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
100%
Grant Probability
99%
With Interview (+0.0%)
2y 8m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 3 resolved cases by this examiner. Grant probability derived from career allowance rate.

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