DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-2 & 4-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Maekawa (US 20060151840).
Regarding claim 1, Maekawa discloses that a method for fabricating semiconductor device, comprising:
forming a gate dielectric layer 22 on a substrate 11 (Fig. 3A);
forming a gate electrode 23 on the gate dielectric layer 22;
forming a first spacer 25 adjacent to the gate electrode 23;
forming a lightly doped drain (LDD) 21 in the substrate adjacent to the first spacer 25;
forming a second spacer 26 adjacent to the first spacer (Fig. 4D); and
removing part of the gate dielectric layer (Fig. 5A).
Reclaim 2, Maekawa discloses that forming a gate material layer on the gate dielectric layer (Fig. 3A); and patterning the gate material layer to form the gate electrode (Fig. 3A).
Reclaim 4, Maekawa discloses that a sidewall of the gate dielectric layer comprises an inclined sidewall (Fig. 5A).
Reclaim 5, Maekawa discloses that a thickness of the gate dielectric layer under the second spacer is equal to a thickness of the gate dielectric layer under the gate electrode (Fig. 5A).
Reclaim 6, Maekawa discloses that a width of the LDD 21 is greater than a bottom surface of second spacer 46 (Fig. 5A).
Regarding claim 7, Maekawa discloses that a semiconductor device, comprising:
a gate dielectric layer 22 on a substrate 11;
a gate electrode 23 on the gate dielectric layer 21;
a first spacer 25 adjacent to the gate electrode 23;
a lightly doped drain (LDD) 21 in the substrate adjacent to the first spacer 25; and
a second spacer 46 adjacent to the first spacer 25 and on the gate dielectric layer 22 (Fig. 5A).
Reclaim 8, Maekawa discloses that a source/drain region 24 & 21 in the substrate 11 adjacent to two sides of the second spacer 46 (Fig. 5A).
Reclaim 9, Maekawa discloses that a sidewall of the gate dielectric layer comprises an inclined sidewall (Fig. 5A).
Reclaim 10, Maekawa discloses that a thickness of the gate dielectric layer under the second spacer is equal to a thickness of the gate dielectric layer under the gate electrode (Fig. 5A).
Reclaim 11, Maekawa discloses that a width of the LDD 21 is greater than a bottom surface of second spacer 46 (Fig. 5A).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Maekawa (US 20060151840) in view of Chang et al. (US 9922881).
Reclaim 3, Maekawa fails to teach that forming a source/drain region in the substrate after removing part of the gate dielectric layer.
However, Chang suggests that forming a source/drain region in the substrate after removing part of the gate dielectric layer (claim 1).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filing date of applicant(s) claimed invention was made to provide Maekawa with forming a source/drain region in the substrate after removing part of the gate dielectric layer as taught by Chang in order to enhance variation of process and also, the claim would have been obvious because a particular know technique was recognized as part of the ordinary capabilities of one skilled in the art.
Conclusion
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/SU C KIM/Primary Examiner, Art Unit 2899
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