Prosecution Insights
Last updated: October 25, 2026
Application No. 18/678,253

SENSOR PACKAGE STRUCTURE HAVING WIRELESS CONFIGURATION AND MANUFACTURING METHOD THEREOF

Non-Final OA §102§103
Filed
May 30, 2024
Priority
Feb 01, 2024 — TW 113103860
Examiner
DEGRASSE, IAN ISAAC
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Tong Hsing Electronic Industries Ltd.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
22 granted / 27 resolved
+13.5% vs TC avg
Minimal +3% lift
Without
With
+3.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 7m
Avg Prosecution
45 currently pending
Career history
94
Total Applications
across all art units

Statute-Specific Performance

§103
53.0%
+13.0% vs TC avg
§102
33.9%
-6.1% vs TC avg
§112
13.2%
-26.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 27 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group II: Claims 7-10 and 17-20 in the reply filed on 08/12/2026 is acknowledged. Claims 1-6 and 11-16 of non-elected Group I were withdrawn. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 7 and 17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2022/0328547 A1 to Lee et al. (hereinafter “Lee”). Regarding claim 7, Lee discloses a sensor package structure having a wireless configuration, comprising: a carrying base including: a substrate having a chip-bonding region and a molding region that surrounds the chip-bonding region (sensor package structure 100 capable of operating wirelessly and having carrying base defined by substrate 1 having chip-bonding region 111 and carrying region 212 where package body 52 surrounds region 111; Fig. 2; paragraphs [0017], [0020], [0022], [0030]); and a ring-shaped molding frame formed on the molding region of the substrate, wherein the ring-shaped molding frame has a connection end arranged away from the substrate (body 52 surrounding region 111 formed in molding region where body 52 has top surface defined as connection end and disposed away from substrate 1; Fig. 2; paragraph [0020]); a sensing module including an interposer stacked and mounted on the chip-bonding region and a sensor chip that is stacked and mounted on the interposer (sensing module defined as portion of structure 100 having interposer substrate disposed directly upon region 111, where region 111 has sensor chip 2 disposed thereon; Fig. 2; paragraph [0022]), wherein the sensing module and the substrate are jointly formed as a CoWoS component (sensing module and substrate 1 formed as a chip on wafer on substrate structure; Fig. 2); and a light-permeable sheet adhered and fixed to the connection end of the carrying base, wherein the carrying base and the light-permeable sheet jointly define an enclosed space that receives the sensing module therein (light permeable layer 4 affixed via colloid 5 to top surface of carrying base defined by substrate 1, where carrying base and layer 4 enclose space E that receives components of the sensing module; Fig. 2; paragraphs [0017], [0024]). Regarding claim 17, Lee discloses a sensor package structure having a wireless configuration, comprising: a substrate having a chip-bonding region and a connection region that surrounds the chip-bonding region (sensor package structure 100 capable of operating wirelessly and having carrying base defined by substrate 1 having chip-bonding region 111 and carrying region 212 where package body 52 surrounds region 111; Fig. 2; paragraphs [0017], [0020], [0022], [0030]); a sensing module including an interposer mounted on the chip-bonding region and a sensor chip that is stacked and mounted on the interposer (sensing module defined as portion of structure 100 having interposer substrate disposed directly upon region 111, where region 111 has sensor chip 2 disposed thereon; Fig. 2; paragraph [0022]), wherein the sensing module and the substrate are jointly formed as a CoWoS component (sensing module and substrate 1 formed as a chip on wafer on substrate structure; Fig. 2); and a cap including: a light-permeable sheet; and a ring-shaped molding frame formed on the light-permeable sheet, wherein the ring-shaped molding frame has a connection end arranged away from the light-permeable sheet (cap defined by light permeable layer 4 and a body 52 formed thereon, where body 52 has top surface defined as connection end and disposed away from layer 4; Fig. 2; paragraph [0020]); wherein the connection end of the light-permeable sheet is adhered and fixed to the connection region of the substrate, and wherein the substrate and the cap jointly define an enclosed space that receives the sensing module therein (light permeable layer 4 affixed via colloid 5 to top surface of carrying base defined by substrate 1, where carrying base and cap enclose space E that receives components of the sensing module; Fig. 2; paragraphs [0017], [0024]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee. Regarding claims 10 and 20, Lee discloses the sensor package structure according to claims 7 and 17, respectively. Lee further discloses wherein the carrying base defines a height direction perpendicular to the chip-bonding region, an inner side surface of the ring-shaped molding frame and the height direction have a slanting angle therebetween, and an outer side surface of the ring-shaped molding frame is coplanar with an outer edge of the substrate (height direction of carrying base and inner side surface of body 52 have angle alpha formed therebetween, with outer side surface coplanar with outer edge of substrate 1; Fig. 2; paragraphs [0027], [0029]). Lee fails to explicitly disclose a slanting angle therebetween that is within a range from 5 degrees to 7 degrees. However, Fig. 2 of Lee discloses angle alpha that varies depending upon where the angle is measured given that the slope of the body 52 is variable, which would provide an angle of between 5 and 7 degrees near an uppermost portion of the body 52 as shown in Fig. 2. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee in this manner in order to potentially provide easier mold release and assembly, better sealing and reduced overflow into the sensor’s active area, and self-alignment of structures during placing. Claims 8-9 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Lee in view of US 2023/0064356 A1 to Lin et al. (hereinafter “Lin”). Regarding claims 8 and 18, Lee discloses the sensor package structure according to claims 7 and 17. Lee fails to disclose wherein the sensing module includes a plurality of micro-bumps and an underfill layer, the micro-bumps and the underfill layer are arranged between the sensor chip and the interposer, the sensor chip and the interposer are electrically coupled to each other through the micro-bumps, and the micro-bumps are embedded in the underfill layer. However, Lin discloses wherein the sensing module includes a plurality of micro-bumps and an underfill layer, the micro-bumps and the underfill layer are arranged between the sensor chip and the interposer, the sensor chip and the interposer are electrically coupled to each other through the micro-bumps, and the micro-bumps are embedded in the underfill layer (image sensor die 110 bonded and electrically connected to interposer 130 via micro-bumps 114 embedded in underfill 117 disposed therebetween; paragraphs [0033], [0049]). Lee and Lin are both considered to be analogous to the claimed invention because they are in the same field sensor package structures. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee to incorporate the teaching of Lin in order to potentially provide mechanical reinforcement and structural reliability and protection of the interconnects from air, moisture and contaminants. Regarding claims 9 and 19, Lee discloses the sensor package structure according to claims 7 and 17. Lee further discloses wherein connection pads of the sensor chip and contacts of the interposer are fixed and electrically coupled to each other (connection pads 213 of sensor chip 2 and related contacts of interposer are fixed and electrically coupled together; Fig. 2; paragraphs [0022]-[0023]). Lee fails to disclose connection pads of the sensor chip and contacts of the interposer are fixed and electrically coupled to each other in a hybrid bonding manner. However, Lin discloses connection pads of the sensor chip and contacts of the interposer are fixed and electrically coupled to each other in a hybrid bonding manner (die 110 hybrid bonded to interposer 130; paragraph [0048]). Lee and Lin are both considered to be analogous to the claimed invention because they are in the same field sensor package structures. Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Lee to incorporate the teaching of Lin in order to potentially provide a significantly higher interconnect density, lower electrical parasitics and better electrical performance, and a thinner lower-profile overall structure. Conclusion The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2016/0013235 A1 to Yee et al. and US 6,140,144 A to Najafi et al. disclose related sensor package structures with similar bump and underfill arrangements between sensor chip and interposer. Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF NATALINI can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IAN DEGRASSE/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

May 30, 2024
Application Filed
Oct 02, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
85%
With Interview (+3.3%)
3y 7m (~1y 2m remaining)
Median Time to Grant
Low
PTA Risk
Based on 27 resolved cases by this examiner. Grant probability derived from career allowance rate.

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