DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The listing of references in the specification is not a proper information disclosure statement. 37 CFR 1.98(b) requires a list of all patents, publications, or other information submitted for consideration by the Office, and MPEP § 609.04(a) states, "the list may not be incorporated into the specification but must be submitted in a separate paper." Therefore, unless the references have been cited by the examiner on form PTO-892, they have not been considered.
Specification
The disclosure is objected to because of the following informalities:
General: Figures 5-8 are mentioned in the Brief Description of Drawings section, but are not specifically mentioned in the main part of the specification. The main part of the specification appears to describe features from Figures 5-8, so the amendment would add a specific reference to each of Figures 5-8.
Page 14, lines 6-14. Check the translation of this section. The current translation is awkward.
Appropriate correction is required.
Claim Objections
Claims 1-7 are objected to because of the following informalities:
Claim 1, line 5: Claim 1, line 3, refers to “a plurality of bit lines”, but line 5 refers to “the bit line”. Please provide antecedent basis for “the bit line”.
Claim 1, line 8: If needed, make any changes to “the bit line” in this line to make it consistent with the changes in line 5.
Claims 2-7 are objected to for depending from objected-to base claim 1.
Claim 3, line 2: The term “first horizontal direction” has already been defined in claim 1, lines 3-4. If this is a different direction than that of claim 1, please use a different term. If not, then change “a” to “the” before “first horizontal direction”.
Claim 4, line 3: Add “horizontal” after “third”. Compare with claim 1, lines 8-9.
Claim 5 is objected to for depending from objected-to base claim 4.
Claim 5, line 1: Change “the number” to “a number” to provide antecedent basis.
Claim 5, line 2: Change “the number” to “a number” to provide antecedent basis. This is a different “number” than the number on line 1.
Claim 7, line 1: Change “the number” to “a number” to provide antecedent basis.
Claim 7, line 2: Change “the number” to “a number” to provide antecedent basis. This is a different “number” than the number on line 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1: Claim 1 is rejected on three bases. First, claim 1 requires “a plurality of bit lines located on the substrate, and disposed parallel to each other in a first horizontal direction at predetermined intervals;….” (emphasis added). Line 7 also refers to “predetermined intervals”. However, there is no indication on how to determine “predetermined” intervals. Because the claim is vague on this point, claim 1 is rejected as indefinite.
Second, claim 1 refers to “the plurality of bit lines” in line 3, but then to “the bit line” in lines 5 and 8. However, antecedent basis has not been provided for “the bit line”. Because antecedent basis has not been provided, claim 1 is rejected as indefinite.
Lastly, the plurality of channel patterns are defined to be located on “the bit line”, but then are required to be spaced apart in third and fourth horizontal directions which are different from the first and second directions. Earlier in the claim, claim 1 defines “a plurality of bit lines located on the substrate, and disposed parallel to each other in a first horizontal direction at predetermined intervals;….” (emphasis added). This language is interpreted as the bit lines are parallel in the first horizontal direction. Combined with the language of claim 1, lines 5-7, which require “a plurality of word lines located on the bit line, and disposed parallel to each other in a second horizontal direction substantially perpendicular to the first horizontal direction…”, the bit lines would therefore extend in the second horizontal direction. If the bit line extends in the second direction, and all of the plurality of channel patterns are on this one bit line, then they are spaced apart in the second direction. They are not located on neighboring bit lines such that they are spaced apart in third and fourth horizontal directions. Because the requirements conflict within claim 1, claim 1 is rejected as indefinite.
Claims 2-7 are rejected for depending from rejected base claim 1.
Regarding claim 3, which depends from claim 1: This claim is rejected on four bases. First, as discussed above in the rejection of claim 1, claim 1 defines “a plurality of bit lines located on the substrate, and disposed parallel to each other in a first horizontal direction at predetermined intervals;….” (emphasis added). This language is interpreted as the bit lines are parallel in the first horizontal direction. Combined with the language of claim 1, lines 5-7, which require “a plurality of word lines located on the bit line, and disposed parallel to each other in a second horizontal direction substantially perpendicular to the first horizontal direction…”, the bit lines therefore extend in the second horizontal direction. Claim 3 requires the plurality of channel patterns located on a single bit line to be arranged in a straight line in the first horizontal direction. However, as claim 1 requires, the bit line extends in the second horizontal direction. Therefore, the channel patterns cannot be arranged in a straight line in the first horizontal direction on the bit line. Because claim 3’s requirements conflict with claim 1, claim 3 is rejected as indefinite.
Next, claim 1 defines the plurality of channel patterns that are located on the bit line and are spaced apart in a third horizontal direction that is different from the first and second horizontal directions, and in a fourth horizontal direction that is substantially perpendicular to the third horizontal direction. The question that arises from this language is whether the plurality of channel patterns are located on this one bit line, or a subset of channel patterns of the plurality of channel patterns are located on this one bit line. Because the claim language is confusing on this point, claim 3 is rejected as indefinite.
Third, claim 3, line 2, refers to “a single bit line”. However, the relationship between the single bit line of claim 3, and the plurality of bit lines of claim 1, line 3 or the bit line of claim 1, lines 5 and 8, is not clear. Because claim 3 is vague on this point, claim 3 is rejected as indefinite.
Lastly, claim 3, line 2, defines an additional first horizontal direction. (Claim 1, lines 3-4, define the first horizontal direction.) Because the language is unclear as to whether this the same or a different “first horizontal direction”, claim 3 is rejected as indefinite.
Regarding claim 5, which depends from claim 4, which depends from claim 1: Claim 5 is rejected on two bases. First, claim 5, line 1, refers to “the number”, but “the number” has not been defined in any of claims 1, 4, and 5. Because “the number” lacks antecedent basis, claim 5 is rejected as indefinite. Second, claim 5, line 2, also refers to “the number”, which is apparently a different number than the number on line 1. Because this “number” lacks antecedent basis, claim 5 is rejected as indefinite.
Regarding claim 7, which depends from claim 6, which depends from claim 1: Claim 7 is rejected on two bases. First, claim 7, line 1, refers to “the number”, but “the number” has not been defined in any of claims 1, 6, and 7. Because “the number” lacks antecedent basis, claim 7 is rejected as indefinite. Second, claim 7, line 2, also refers to “the number”, which is apparently a different number than the number on line 1. Because this “number” lacks antecedent basis, claim 7 is rejected as indefinite.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as being anticipated by Chung, U.S. Pat. Pub. No. 2011/0223731, Figures 1, 2, and 8A-17B.
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Regarding claim 1: Chung Figures 1, 2, and 8A-17B disclose a semiconductor device (1/1a), comprising: a substrate (100); a plurality of bit lines (170) located on the substrate (100), and disposed parallel to each other in a first horizontal direction (X) at predetermined intervals; a plurality of word lines (190) located on the bit line (170), and disposed parallel to each other in a second horizontal direction (Y) substantially perpendicular to the first horizontal direction (X) at predetermined intervals; a plurality of channel patterns (115) located on the bit line (170), spaced apart in a third horizontal direction different from the first and second horizontal directions (X, Y) and in a fourth horizontal direction substantially perpendicular to the third horizontal direction, and extending in a vertical direction (Z); and a gate insulating pattern (150) located between the plurality of channel patterns (115) and the plurality of word lines (190). Chung specification ¶¶ 42-45, 58-73.
Regarding claim 2, which depends from claim 1: Chung discloses an interval between adjacent word lines (190) and an interval between adjacent bit lines (170) are substantially the same. See Chung Figure 15A, where the interval, or spacing, is substantially the same.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(1)/(a)(2) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Wada, U.S. Pat. Pub. No. 2021/0082931, Figure 1-3 and 5.
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Regarding claim 1: Wada Figure 5, which incorporates aspects of Wada Figures 103, discloses a semiconductor device, comprising: a substrate (21); a plurality of bit lines ((BL(1)-BL(6); 11(BL)) located on the substrate (21), and disposed parallel to each other in a first horizontal direction (Y) at predetermined intervals; a plurality of word lines (WL(1)-WL(6); 14(WLu)) located on the bit line ((BL(1)-BL(6); 11(BL)), and disposed parallel to each other in a second horizontal direction (X) substantially perpendicular to the first horizontal direction (Y) at predetermined intervals; a plurality of channel patterns (13) located on the bit line ((BL(1)-BL(6); 11(BL)), spaced apart in a third horizontal direction different from the first and second horizontal directions (Y, X) and in a fourth horizontal direction substantially perpendicular to the third horizontal direction, and extending in a vertical direction (Z); and a gate insulating pattern (15) located between the plurality of channel patterns (13) and the plurality of word lines (WL(1)-WL(6); 14(WLu)). Wada specification ¶¶ 56-58; 22-46. To the extent that Wada Figure 5 does not incorporate by reference Wada Figures 1-3, one having ordinary skill in the art at a time before the effective filing date would be motivated to modify Wada Figure 5 to include the relevant subject matter of Wada Figures 1-3 because Wada Figure 5 is being used as a comparison to Wada Figures 1-3.
Regarding claim 2, which depends from claim 1: Wada discloses an interval between adjacent word lines (WL) and an interval between adjacent bit lines (BL) are substantially the same. See Wada Figure 5.
Regarding claim 3, which depends from claim 1: Wada discloses the plurality of channel patterns (13) located on a single bit line (BL) are arranged in a straight line in a first horizontal direction (X). See id.
Regarding claim 4, which depends from claim 1: Wada discloses when an interval between adjacent word lines (WL) is L1, an interval between adjacent bit lines (WL) is L2, and an angle between the first horizontal direction (Y) and the third direction is θ1, tan θ1 is L2/L1. See id.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 of copending Application No. 18/678,674 (reference application) [hereinafter “the ’674 application”]. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following:
Regarding claim 1: Claim 1 of the ’674 application discloses a semiconductor device, comprising (line 1): a substrate (line 2); a plurality of bit lines located on the substrate, and disposed parallel to each other in a first horizontal direction at predetermined intervals (lines 3-5); a plurality of word lines located on the bit line, and disposed parallel to each other in a second horizontal direction substantially perpendicular to the first horizontal direction at predetermined intervals (lines 6-9); a plurality of channel patterns located on the bit line, spaced apart in a third horizontal direction different from the first and second horizontal directions and in a fourth horizontal direction substantially perpendicular to the third horizontal direction, and extending in a vertical direction (lines 10-15); and a gate insulating pattern located between the plurality of channel patterns and the plurality of word lines (lines 16-17).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 3 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 6 of copending Application No. 18/678,674 (reference application) [hereinafter “the ’674 application”]. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following:
Regarding claim 3, which depends from claim 1: Claim 6 of the ’674 application, which depends from claim 1 of the ’674 application discloses the plurality of channel patterns located on a single bit line are arranged in a straight line in a first horizontal direction (claim 6, lines 1-4).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Claim 4 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 4 of copending Application No. 18/678,674 (reference application) [hereinafter “the ’674 application”]. Although the claims at issue are not identical, they are not patentably distinct from each other because of the following:
Regarding claim 4, which depends from claim 1: Claim 4 of the ’674 application, which depends from claim 1 of the ’674 application discloses when an interval between adjacent word lines is L1, an interval between adjacent bit lines is L2, and an angle between the first horizontal direction and the third direction is θ1, tan θ1 is L2/L1 (claim 4, lines 1-5).
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Allowable Subject Matter
Claims 5-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, if the Section 112(b) rejections and the informalities are addressed.
The following is a statement of reasons for the indication of allowable subject matter:
With regard to claim 5: The claim has been found allowable because the prior art of record does not disclose “when the number of total intersections of the word lines and the bit lines is n1, and the number of intersections at which the channel pattern is disposed is n2, n1/n2 is 2”, in combination with the remaining limitations of the claim.
With regard to claim 6: The claim has been found allowable because the prior art of record does not disclose “when an interval between adjacent word lines is L1, an interval between adjacent bit lines is L2, and an angle between the first horizontal direction and the third horizontal direction is θ1, tan θ1 is 2L2/L1”, in combination with the remaining limitations of the claim.
With regard to claim 7: The claim has been found allowable due to its dependency from claim 6 above.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTORIA KATHLEEN HALL whose telephone number is (571)270-7567. The examiner can normally be reached Monday-Friday, 8 a.m.-5 p.m.
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/Victoria K. Hall/Primary Examiner, Art Unit 2897
Prosecution Insights