DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
IDS
The IDS document(s) filed on February 19, 2026 has been considered. Copies of the PTO-1449 documents are herewith enclosed with this office action.
Response to Arguments
The previously issued 35 U.S.C. § 112(b) rejection is withdrawn in view of amended claim 23.
The Applicant’s remarks with respect to claims #1-4, 10, 11, 17, 18, 20, 21 in the reply filed on January 6, 2026 have been carefully considered, but are moot in view of a new grounds of rejection based on the IDS submitted February 19, 2026. This Non-Final Rejection replaces the previous Non-Final Rejection dated October 6, 2025.
Claims 23 and 24 are indicated as being allowable.
Claim Rejections - 35 U.S.C. § 103
The following is a quotation of 35 U.S.C. § 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. § 102(b)(2)(C) for any potential 35 U.S.C. § 102(a)(2) prior art against the later invention.
Claims 1-4, 10, 11, 17, and 18 are rejected under 35 U.S.C. § 103 as being unpatentable over Torimi et al. (U.S. Patent Publication No. 2017/0236905 A1), as cited in the IDS and hereafter “Torimi”, and further in view of Chiu et al. (U.S. Patent Publication No. 2022/0336203 A1), hereafter “Chiu”.
As to claim 1, Torimi teaches:
A method of processing a semiconductor workpiece to increase a fracture strength of the semiconductor workpiece. Torimi teaches a method of processing a silicon carbide wafer. Although Torimi does not explicitly teach increasing a fracture strength of the semiconductor workpiece, the Examiner submits that this intended result necessarily occurs as a result of Torimi in subsequent combination with Chiu, teaching the same claimed process. Furthermore, statements of intended use in the preamble are not given patentable weight when the body of the claim fully and intrinsically sets forth all the limitations of the claimed invention. See MPEP 2111.02(II).
Removing a semiconductor wafer 40 from a boule 4. See Torimi, FIG. 3. ¶¶ [0069], [0075].
Implementing a treatment process (“Thinning Step (Si Vapor Pressure Etching)”) on the semiconductor wafer removed from the boule, the treatment process comprising a thermal treatment process that includes heating the semiconductor wafer in an ambient gas. Torimi teaches a thinning step comprising heating the semiconductor wafer in Ar gas. Id. at FIG. 1, FIG. 3, ¶¶ [0060]-[0066], [0076].
Wherein heating the semiconductor wafer in the ambient gas comprises heating the semiconductor wafer at a temperature of about 1500 °C to about 2000 °C. Torimi teaches 1800 °C. Id. at ¶ [0066].
However, Torimi does not teach the ambient gas comprises an etchant or forming gas nor the heating increases the fracture strength of the semiconductor wafer to a range of about 17.5 Newtons or greater.
On the other hand, Chiu teaches an ambient gas comprises a forming gas such as a combination of an inert gas and hydrogen. See Chiu, ¶ [0037]. The combination of Torimi and Chiu therefore also teaches increasing the fracture strength of the semiconductor wafer to a range of about 17.5 Newtons or greater because the combination teaches a treatment process utilizing the same conditions as recited in the claim and Applicant’s specification paragraphs [0058]-[0059], and the combination therefore also necessarily teaches the same fracture strength outcome. Additionally, the Examiner notes that this wherein clause merely expresses the intended result of the preceding positively recited treatment process step and is not given patentable weight. See MPEP 2111.04(I).
It would have been obvious to one of ordinary skill in the art to substitute Torimi’s ambient gas comprising an inert (Ar) gas for Chiu’s ambient gas comprising a forming gas such as an inert (Ar) gas and hydrogen, in order to yield the predictable benefit of removing native oxide and other benefits. Id. at ¶ [0038].
As to claim 2, the Examiner notes that the limitation is directed to a method of testing for fracture strength and not a method of processing a semiconductor workpiece. Additionally, the limitation is a continuation of the “fracture strength” wherein clause of claim 1 and is not given patentable weight because it merely expresses the intended result of the previously positively recited treatment process step of claim 1. Lastly, the Examiner takes Official Notice that the claimed method of determining fracture strength is known in the prior art.
As to claim 3, the Examiner notes that the limitation is a continuation of the “fracture strength” wherein clause of claim 1 and is not given patentable weight because it merely expresses the intended result of the previously positively recited treatment process step of claim 1.
As to claim 4, Torimi teaches further comprising performing a surface processing operation (“Outer Circumferential Surface Processing Step”) on the semiconductor wafer, wherein implementing the treatment process is performing prior to perfomring the surface processing operation. See Torimi, FIG. 3.
As to claim 10, this claim limitation is considered because Torimi teaches a forming gas.
As to claim 11, Chiu teaches the additional use of hydrogen chloride (HCl) gas. See Chiu, ¶ [0037]. Hydrogen, in hydrogen chloride, is 2.76% by weight, which falls into the claimed 7% or less by weight.
As to claim 17, the Examiner notes that this wherein clause merely expresses the intended result of claim 1’s positively recited treatment process step and is not given patentable weight. See MPEP 2111.04(I). Additionally, because the combination of Torimi and Chiu teaches a treatment process utilizing the same conditions as recited in the claim and Applicant’s specification paragraphs [0058]-[0059], Torimi and Chiu therefore also necessarily teach the same fracture strength outcome.
As to claim 18, Torimi teaches SiC. See Torimi, Abstract.
Claim Rejections 35 U.S.C. § 102(a)(1)
The following is a quotation of the appropriate paragraphs of 35 U.S.C. § 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 20 and 21 are rejected under 35 U.S.C. § 102(a)(1) as being anticipated by Torimi.
As to claim 20, Torimi teaches:
A method of processing a silicon carbide semiconductor workpiece to increase a fracture strength of the silicon carbide semiconductor workpiece. Torimi teaches a method of processing a silicon carbide wafer. Although Torimi does not explicitly teach increasing a fracture strength of the silicon carbide semiconductor workpiece, the Examiner submits that this intended result necessarily occurs as a result of Torimi teaching the same claimed process. Furthermore, statements of intended use in the preamble are not given patentable weight when the body of the claim fully and intrinsically sets forth all the limitations of the claimed invention. See MPEP 2111.02(II).
Removing a silicon carbide semiconductor wafer 40 from a boule 4. See Torimi, FIG. 3. ¶¶ [0069], [0075].
Implementing a treatment process (“Thinning Step (Si Vapor Pressure Etching)”) on the silicon carbide semiconductor wafer removed from the boule, the treatment process comprising a thermal treatment process comprising heating the silicon carbide semiconductor wafer to a temperature of about 1500 °C to about 2000 °C. Torimi teaches a thinning step comprising heating the SiC semiconductor wafer in Ar gas. Id. at FIG. 1, FIG. 3, ¶¶ [0060]-[0066], [0076]. Torimi teaches 1800 °C. Id. at ¶ [0066].
Wherein the treatment process increases the fracture strength of the silicon carbide semiconductor wafer by about 15% or greater. The Examiner notes that this wherein clause merely expresses the intended result of the preceding positively recited treatment process step and is not given patentable weight. See MPEP 2111.04(I). Additionally, because Torimi teaches a treatment process utilizing the same conditions as recited in the claim and Applicant’s specification paragraph [0058], Torimi therefore also necessarily teaches the same fracture strength outcome.
As to claim 21, Torimi teaches removing the semiconductor wafer from the boule comprises implementing a saw-based removal process. See Torimi, ¶¶ [0068], [0075].
Indication of Allowable Subject Matter
The following is a statement of reasons for the indication of allowable subject matter: claims 23 and 24 are indicated as being allowable because Torimi does not teach performing a surface processing operation comprising one or more of a grinding operation etc… after implementing the treatment process because Torimi teaches the polishing step (“outer circumferential surface processing step”) is performed before the treatment process (“thinning step”).
Conclusion
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/SUBERR L CHI/Primary Examiner, Art Unit 2893
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