Prosecution Insights
Last updated: August 16, 2026
Application No. 18/683,042

TEMPORARILY BONDED WAFER AND METHOD FOR MANUFACTURING THE WAFER

Non-Final OA §103
Filed
Feb 12, 2024
Priority
Aug 17, 2021 — JP 2021-132721 +2 more
Examiner
ZABEL, ANDREW JOHN
Art Unit
2818
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Shin-Etsu Chemical Co., Ltd.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
10m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
29 granted / 34 resolved
+17.3% vs TC avg
Strong +22% interview lift
Without
With
+21.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
30 currently pending
Career history
73
Total Applications
across all art units

Statute-Specific Performance

§103
66.8%
+26.8% vs TC avg
§102
26.2%
-13.8% vs TC avg
§112
7.0%
-33.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 34 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions In the correspondence dated 05/05/2026, the applicant elected invention II, with traverse, which contains claims 23-32. The restriction is maintained as Invention I, claims 13-22, would require searches with different text searches and different classification searches as described in the restriction mailed March 23, 2026 would be a burden on the examiner. Thus claims 23-32, invention II, are examined upon the merits below. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 23-32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Yamada et al (JP 4715370, see attached translation). Regarding claim 23, Yamada et al teaches [claim 23] A method for manufacturing a temporarily bonded wafer, the method being a method for temporarily bonding an epitaxial substrate in which an epitaxial functional layer is grown on a starting substrate to a support substrate (figures 7 and 8, paragraphs 0019, 0027, and 0032, where element 24 within element 10 is the epitaxial functional layer grown on a substrate [element 70] for temporary bonding), the method comprising:(1) forming two or more electrodes with different polarities on one surface of the epitaxial functional layer of the epitaxial substrate (figures 7 and 8, paragraph 0026, where elements 9 and 15 are the two electrodes formed on the epitaxial functional layer [element 10] of the substrate [element 100] and have different polarities); and (2) temporarily bonding the support substrate to the surface on which the electrodes are formed via an uncured thermosetting bonding material (figures 7 and 8, paragraph 0044, where element 80 is the temporary substrate bonded to a surface of the electrodes and connected by an uncured thermosetting bond material [element 81]) However, Yamada et al does not specifically disclose [claim 23] [temporarily bonding the support substrate] via an uncured thermosetting bonding material. However, Yamada et al does teach [claim 23] [temporarily bonding the support substrate] via an uncured thermosetting bonding material (paragraph 0039, element 71 is a thermosetting bonding material [uncured epoxy resin] when applied to the original substrate, element 70 which is a type of substrate like element 80). It would have been obvious to one of ordinary skill in the art before the effective filing date of the present application to have modified the teachings of Yamada et al to incorporate the uncured epoxy resin on both substrates instead of just one as a means to bond the device to a substrate because the uncured epoxy resin can be cheaper as well as forming a more rigid and stable bond with the substrate, improving durability while keeping costs low. Regarding claims 24-32, Yamada et al further discloses, [claim 24] The method for manufacturing a temporarily bonded wafer according to claim 23, wherein the epitaxial functional layer is a light emitting element (figures 7-8, paragraph 0019, where element 10 has an epitaxial functional layer which is element 24, and is a light-emitting element). [claim 25] The method for manufacturing a temporarily bonded wafer according to claim 23, wherein the epitaxial functional layer contains an AlGaInP-based or InGaN-based material (paragraph 0022, where element 24 [light emitting functional layer] is a AlGaInP based layer). [claim 26] The method for manufacturing a temporarily bonded wafer according to claim 24, wherein the epitaxial functional layer contains an AlGaInP-based or InGaN-based material (paragraph 0022, where element 24 [light emitting functional layer] is a AlGaInP based layer). [claim 27] The method for manufacturing a temporarily bonded wafer according to claim 23, wherein the thermosetting bonding material is any of benzocyclobutene (BCB) resin, polyimide (PI) resin, fluororesin, and epoxy resin (figure 7, paragraph 0039, where element 70 [temporary bonded substrate] is bonded to the device via element 71 which is an uncured epoxy resin). [claim 28] The method for manufacturing a temporarily bonded wafer according to claim 24, wherein the thermosetting bonding material is any of benzocyclobutene (BCB) resin, polyimide (PI) resin, fluororesin, and epoxy resin (figure 7, paragraph 0039, where element 70 [temporary bonded substrate] is bonded to the device via element 71 which is an uncured epoxy resin). [claim 29] The method for manufacturing a temporarily bonded wafer according to claim 25, wherein the thermosetting bonding material is any of benzocyclobutene (BCB) resin, polyimide (PI) resin, fluororesin, and epoxy resin (figure 7, paragraph 0039, where element 70 [temporary bonded substrate] is bonded to the device via element 71 which is an uncured epoxy resin). [claim 30] The method for manufacturing a temporarily bonded wafer according to claim 26, wherein the thermosetting bonding material is any of benzocyclobutene (BCB) resin, polyimide (PI) resin, fluororesin, and epoxy resin (figure 7, paragraph 0039, where element 70 [temporary bonded substrate] is bonded to the device via element 71 which is an uncured epoxy resin). [claim 31] The method for manufacturing a temporarily bonded wafer according to claim 23, wherein the support substrate is comprised of any of the materials: silicon, sapphire, GaP, GaAs, InP, SiC, quartz, glass, LiTaO3, and LiNbO3 (figure 7, paragraph 0039, where element 70 which is the support substrate is made of GaP). [claim 32] The method for manufacturing a temporarily bonded wafer according to claim 23, the method further comprising: after (2),(3) removing the starting substrate from the epitaxial substrate (figures 7 and 8, where element 70 is removed from the new substrate, element 80, after bonding [step 2]). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kubota et al (US 20200227263), Hoshi et al (US 20100258814), and Hagimoto et al (JP 2007042664) as other methods of forming a temporary bonded wafer on a semiconductor device. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANDREW ZABEL whose telephone number is (703)756-4788. The examiner can normally be reached M-F 9-5PM ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff W Natalini can be reached at 572-272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ANDREW JOHN ZABEL/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
Read full office action

Prosecution Timeline

Feb 12, 2024
Application Filed
Feb 12, 2024
Response after Non-Final Action
Aug 03, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+21.7%)
3y 4m (~10m remaining)
Median Time to Grant
Low
PTA Risk
Based on 34 resolved cases by this examiner. Grant probability derived from career allowance rate.

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