DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1 to 3, 5 and 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jp 4313000 in view of GB 2540608 and Sato (6375738) .
The Jp 4313000 reference teaches a method of growing a silicon carbide layer, note entire translation. The base layer is a silicon subatrate, which is first cleaned to remove any native oxides, para 0023. Then a first layer of silicon carbide is deposited onto the silicon substrate at a temperature below 950c, note para 0015. Then a second layer of silicon carbide is deposited by chemical vapor deposition onto the first layer and substrate at a high temperature, note, para 0016. The differences between the instant claim and the prior art are the deposition pressure and separation of the grown layers. However, GB 2540608 reference teaches using low pressures under the limit claimed to deposit silicon carbide, note page 1. The Sato reference teaches separating a silicon carbide vapor grown layer from a silicon substrate at the boundary of the substrate, note embodiment 2. It would have been obvious to one of ordinary skill in the art before the filing date of the instant invention to modify the Jp 4313000 reference by the teachings of the GB 2540608 and Sato references to deposit at lower pressures and separate the substrate in order to create a free standing silicon carbide wafer for further uses in device formations.
With regards to claim 2, the Jp 4313000 reference teaches monomethyl silane, note para 0007.
With regards to claim 3, the Jp 4313000 reference teaches oxide removal step in hydrogen at a temperature of 1000c note para 0023.
With regards to claim 5, the Jp 4313000 reference teaches in the second deposition step a higher temperature, note para 0016 then the first deposition step.
With regards to claim 6, the Jp 4313000 reference teaches in the second deposition step a higher temperature, note para 0016 and at 1000c
Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jp 4313000 in view of GB 2540608 and Sato (6375738) .
The Jp 4313000, GB 2540608 and Sato references are relied on for the same reasons as stated, supra, and differ from the instant claim in the pressure of the third step. However, it would have been obvious to one of ordinary skill in the art before the filing date of the instant invention to determine through routine experimentation the optimum, operable pressure range of the third step, second deposition in the combined references in order to grow a uniform layer of silicon carbide.
Claim(s) 7 to 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jp 4313000 in view of GB 2540608 and Sato (6375738) .
The Jp 4313000, GB 2540608 and Sato references are relied on for the same reasons as stated, supra, and differ from the instant claims in the temperature change during the second and third steps. However, it would have been obvious to one of ordinary skill in the art before the filing date of the instant invention to determine through routine experimentation the optimum, operable temperature increase during the second and third steps in the combined references as the temperatures are within the range of the art in order to increase deposition rates after nucleation.
Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Jp 4313000 in view of GB 2540608,Sato (6375738) and Jp2010502023 .
The Jp 4313000, GB 2540608 and Sato references are relied on for the same reasons as stated, supra, and differ from the instant claims in the deposition of a GaN layer. However, the Jp 2010502023 reference teaches deposition of a layer on top of a deposited silicon carbide layer which can include GaN, note claim 15. It would have been obvious to one of ordinary skill in the art before the filing date of the instant invention to modify the Jp 4313000 reference by the teachings of the Jp2010502023 reference to further deposit GaN in order to manufacture of device.
Claims 11 to 14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The prior art does not teach nor render obvious a film in between the 3 and 4 step of depositing layers.
Examiner’s Remarks
The remaining references are merely cited of interest as showing the state of the art in SiC growth.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ROBERT M KUNEMUND whose telephone number is (571)272-1464. The examiner can normally be reached M-F 8:00 am to 4:30 pm.
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RMK
/ROBERT M KUNEMUND/ Primary Examiner, Art Unit 1714
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