DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1,2,5-6,10-11,15 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2006/0017371 A1 to Yamada, “Yamada”.
Regarding claim 1, Yamada discloses a display device (FIG. 2, display region FIG. 6, non-display region FIG. 8) comprising:
a substrate (2, ¶ [0062]);
a display region (21, ¶ [0063]) located on the substrate (2) and provided with a plurality of pixels each including a plurality of subpixels (FIG. 3 subpixels A1, A2, A3);
a non-display region (23, ¶ [0063]) located on the substrate (2), including a plurality of dummy subpixels (FIG. 5 subpixels “N”) provided along an end portion of the display region (21), and continued from the display region;
a plurality of lower electrodes (111, ¶ [0071]) provided in each of the display region and the non-display region;
a charge transfer layer (110a, ¶ [0077]-[0079]) which is one layer provided in the display region (FIG. 6) and the non-display region (FIG. 8); and
an upper electrode (12, ¶ [0083],[0084]) provided in the display region (FIG. 6) and the non-display region (FIG. 8), wherein the plurality of subpixels provided in the display region each include a light-emitting element including the lower electrode (111), the charge transfer layer (110a), a light-emitting layer (110b), and the upper electrode (12) in that order from the substrate (2) side, and the plurality of dummy subpixels (FIG. 8) provided in the non-display region each include a non-emitting charge transfer element including the lower electrode (111), the charge transfer layer (110a), and the upper electrode (12) in that order from the substrate (2) side.
Examiner’s Note: the term “layer” is not expressly defined in Applicant’s specification and is therefore interpreted under the doctrine of broadest reasonable interpretation (BRI), MPEP 2111, under the plain meaning as including both continuous and discontinuous layers, e.g. one having ordinary skill in the art would recognize a term such as an “electrode layer” as being able to describe a plurality of discontinuous individual electrodes formed from a same conductive layer, although forming shared carrier transport and light emission layers is known in the art, see e.g. citation of prior art in the Conclusion section at the end of the office action.
Regarding claim 2, Yamada disclose the display device according to claim 1, and Yamada further discloses wherein the charge transfer layer (110a) provided in the display region (e.g. FIG. 6) and the charge transfer layer (110a) provided in the non-display region (e.g. FIG. 8) are formed of an identical material (¶ [0082], formed in single inkjet step ¶ [0116]-[0129]).
Regarding claim 5, Yamada disclose the display device according to claim 1, and Yamada further discloses wherein the lower electrode (111) is an anode (¶ [0147]), the upper electrode (12) is a cathode (¶ [0147],[0060]-[0062]), and the charge transfer layer (110a) is at least one of a hole injection layer and a hole transport layer (¶ [0077]-[0079]).
Regarding claim 6, Yamada disclose the display device according to claim 5, and Yamada further discloses wherein at least one of an electron injection layer and an electron transport layer (12a, ¶ [0083]) is further provided between the light-emitting layer (110b) and the upper electrode (12) in the display region (FIG. 6) and between the charge transfer layer (110a) and the upper electrode (12) in the non-display region (FIG. 8).
Regarding claim 10, Yamada disclose the display device according to claim 1, and Yamada further discloses (e.g. FIG. 3) wherein the plurality of subpixels included in the pixel include a first subpixel (A1) including a first light-emitting element provided with a first light-emitting layer configured to emit light of a first color (red) as the light-emitting layer, a second subpixel (A2) including a second light-emitting element provided with a second light-emitting layer configured to emit light of a second color (green) different from the first color as the light-emitting layer, and a third subpixel (A3) including a third light-emitting element provided with a third light-emitting layer configured to emit light of a third color (blue) different from the first color (red) and the second color (green) as the light-emitting layer, and the plurality of dummy subpixels (FIG. 5) include at least one of a first dummy subpixel (A4 on left) formed in a shape identical to the shape of the first subpixel, a second dummy subpixel (middle A4) formed in a shape identical to the shape of the second subpixel, or a third dummy subpixel (A4 on right) formed in a shape identical to the shape of the third subpixel.
Regarding claim 11, Yamada disclose the display device according to claim 1, and Yamada further discloses wherein the substrate includes a subpixel circuit (FIG. 8 TFTs 123, ¶ [0060],[0061], FIG. 1 switching transistor 122 and driving transistor 123) provided corresponding to each subpixel (A4) of the plurality of subpixels and the plurality of dummy subpixels, and the subpixel circuit includes a selecting transistor (122) provided with an electrode electrically connected to a scanning signal line (FIG. 1 scanning line 101, ¶ [0070]), an electrode (103) electrically connected to a data signal line (¶ [0161],[0162]), and an electrode (pixel electrode in contact hole 145, ¶ [0070],[0071]) electrically connected to the light-emitting element or the non-emitting charge transfer element via a drive transistor (123).
Regarding claim 15, Yamada discloses a method for manufacturing a display device, the method comprising:
forming (FIG. 11) a plurality of lower electrodes (111, ¶ [0106]) in each of a display region (F(G. 6) located on a substrate (2) and a non-display region (FIG. 8) located on the substrate (2) and continued from the display region (in FIG. 2);
forming (FIG. 19) an upper electrode (12, ¶ [0148]) in the display region (FIG. 6) and the non-display region after the forming a plurality of lower electrodes (111);
forming a light-emitting layer (110b) only in the display region (FIG. 6) between the forming a plurality of lower electrodes (111) and the forming an upper electrode (12); and
forming a charge transfer layer (110a, ¶ [0077]-[0079]) made of one layer in the display region (FIG. 6) and the non-display region (FIG. 8) between the forming a plurality of lower electrodes (111) and the forming a light-emitting layer (110b).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over US 2006/0017371 A1 to Yamada, “Yamada”, in view of US 2020/0219944 A1 to Yi, “Yi”.
Regarding claim 3, although Yamada discloses the display device according to claim 1, Yamada fails to clearly state wherein a width of the non-display region is equal to or less than a length of a diagonal line of the pixel.
Yi teaches (e.g. FIG. 4) wherein a width of the non-display region (a width of dummy pixel “D”, see Examiner-annotated figure below) is equal to or less than (as pictured) a length of a diagonal line of a pixel (one of R,G,B, see Examiner-annotated figure below):
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493
594
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More generally, Yi teaches surrounding the display region (pixels Pe) with one or more dummy pixels (D) wherein the width of the single dummy pixel region may be equal to or less than the pixel diagonal.
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Yamada by adding single dummy pixel regions to the peripheral area as taught by Yi in order to lower the loading effect of the peripheral display pixel units and prevent a brightness decreasing issues (Yi Abstract, ¶ [0004]-[0007],[0036]).
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over US 2006/0017371 A1 to Yamada, “Yamada”, in view of US 2023/0044290 A1 to Kim et al., “Kim”.
Regarding claim 4, although Yamada yields the display device according to claim 1, Yamada fails to clearly teach wherein a width of the non-display region is formed to be 50 µm or less.
Kim teaches wherein a width of a non-display region (FIG. 3 non-display region “NA”) is 50 µm or less (¶ [0091]).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Yamada with an outer non-display region having a thickness within the claimed range as taught by Kim in order to desirably achieve a bezel-less display (Kim ¶ [0091]).
Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over US 2006/0017371 A1 to Yamada, “Yamada”, in view of US 2016/0293884 A1 to Zhang et al., “Zhang `884”.
Regarding claim 7, Yamada discloses the display device according to claim 1, and Yamada further teaches an additional charge transfer layer (12a) which is an electron injection layer (¶ [0083]).
Yamada fails to clearly teach wherein the lower electrode is a cathode, the upper electrode is an anode. Rather, Yamada teaches the reverse order wherein the lower electrode (111) is the anode, the upper electrode (12) is the cathode.
Zhang `884 teaches wherein the similar configuration to Yamada (i.e. anode 42, cathode 46) may be inverted (¶ [0047],[0048]), in which the cathode is the lower electrode (42), layers such as an electron transport layer, emissive material layer (44), hole transport layer, and hole injection layer may be stacked on top of the cathode and may be covered with an upper layer (46) that serves as the anode for the diode.
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Yamada with the order of the anode/emission/cathode inverted as taught by Zhang `884 since it has been held in KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007), MPEP 2143, that exemplary rationales that may support a conclusion of obviousness include:
(A) Combining prior art elements according to known methods to yield predictable results;
(B) Simple substitution of one known element for another to obtain predictable results;
(C) Use of known technique to improve similar devices (methods, or products) in the same way;
(D) Applying a known technique to a known device (method, or product) ready for improvement to yield predictable results;
(E) “Obvious to try” – choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success;
(F) Known work in one field of endeavor may prompt variations of it for use in either the same field or a different one based on design incentives or other market forces if the variations are predictable to one of ordinary skill in the art;
(G) Some teaching, suggestion, or motivation in the prior art that would have led one of ordinary skill to modify the prior art reference or to combine prior art reference teachings to arrive at the claimed invention,
wherein in the instant case one having ordinary skill in the art would have been capable of forming the inverted configuration and would have found the modification obvious on the basis of (B) Simple substitution of one known element for another to obtain predictable results, as both configurations can be selected to reflect and emit light in the desired direction (Zhang `884 ¶ [0047],[0046]).
Regarding claim 8, Yamada in view of Zhang `884 yields the display device according to claim 7, and Yamada as modified by Zhang `884 further yields wherein at least one of a hole injection layer and a hole transport layer (Yamada 110a, ¶ [0077]) is further provided between the light-emitting layer (Yamada 110b) and the upper electrode (111, upper in the inverted configuration when applying teachings of Zhang) in the display region (21) and between the charge transfer layer (Yamada either hole injection/transport 110a or electron injection 12a) and the upper electrode in the non-display region.
Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over US 2006/0017371 A1 to Yamada, “Yamada”, in view of US 2022/0310709 A1 to Zhang et al., “Zhang `709”, and further in view of US 2020/0219944 A1 to Yi, “Yi”.
Regarding claim 9, although Yamada discloses the display device according to claim 1, Yamada fails to clearly teach an imaging region configured to transmit image light is further provided inside the display region.
Zhang `709 teaches (e.g. FIG. 1) an imaging region (e.g. camera AA1, ¶ [0003],[0094]-[0096]) inside the display region.
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Yamada with an imaging region within the display region as exemplified by Zhang `709 in order to desirably incorporate an imaging device such as a camera in order to enhance the functionality of the display while also satisfying the desire to having a high screen-to-body ratio to achieve a good visual experience (Zhang `709 ¶ [0003],[0099]).
Yamada in view of Zhang `709 fails to clearly teach together: wherein the non-display region includes a first non-display region and a second non-display region, the first non-display region is provided to surround an outer perimeter of the display region, and the second non-display region is provided to surround the imaging region.
Yi teaches (e.g. FIG. 3,4) wherein a first non-display region (FIG. 4 dummy pixels D, ¶ [0051]) is provided to surround the outer periphery (101) of a display region, and (e.g. FIG. 8) wherein a second non-display region (dummy pixels D) is provided to surround an opening region (FIG. 9 region 101b, or FIG. 10 opening 100c, ¶ [0058],[0061],[0064]) which is capable of being used as an imaging region.
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Yamada in view of Zhang `709 by adding dummy pixel regions to the peripheral areas and internal openings as taught by Yi in order to lower the loading effect of the peripheral display pixel units and prevent a brightness decreasing issues (Yi Abstract, ¶ [0004]-[0007],[0036]).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over US 2006/0017371 A1 to Yamada, “Yamada”, in view of US 2022/0085135 A1 to Ukigaya, “Ukigaya”.
Regarding claim 14, although Yamada discloses the display device according to claim 1, Yamada fails to clearly teach wherein the non-display region is provided to surround the display region.
Ukigawa teaches (FIG. 6) wherein a non-display region (32, ¶ [0088]) is provided to surround the display region (20).
It would have been obvious before the effective filing date of the claimed invention to one having ordinary skill in the art to have formed the device of Yamada with the dummy pixels surrounding the display region as taught by Ukigawa in order to reduce reflection in an area outside of the display region or used as pixels for correcting an output image or as pixels for in-process inspection (Ukigawa ¶ [0025]).
Allowable Subject Matter
Claims 12 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Prior art e.g. Yamada teaches the display device as discussed above including a display area and a non-display area with dummy pixels as discussed above. Yamada further teaches wherein the dummy pixels may either not include driving transistors or may include both driving and switching transistors but current does not flow through the control circuit (¶ [0090]). Therefore, prior art fails to reasonably teach or suggest wherein a voltage in a range from 2 V to 8 V is applied to the data signal line of the subpixel circuit including the selecting transistor provided with an electrode electrically connected to the non-emitting charge transfer element via the drive transistor, as claimed in claim 12 together with all of the limitations of claim 11 and claim 1 as claimed. Claim 13 is objected to as being allowable for similar reasons to claim 12 together with all of the limitations of claim 11 and claim 1.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US 9,941,336 B2 to Kim et al. teaches wherein a hole transport layer (150) is continuous from a pixel (P11) to a dummy pixel (DP11);
US 8,237,357 B2 to Takei et al. teaches (FIG. 3B) wherein pixels (P) and dummy pixels (D) share a common hole injection layer (140A, column 9 lines 52-54).
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC A WARD whose telephone number is (571)270-3406. The examiner can normally be reached M-F 10-6 ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571)272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Eric A. Ward/Primary Examiner, Art Unit 2891
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