Prosecution Insights
Last updated: May 29, 2026
Application No. 18/702,522

Method of Producing a PCB, as well as a PCB, and a Circuit Board

Non-Final OA §102
Filed
Apr 18, 2024
Priority
Oct 28, 2021 — nonprovisional of PCTSE2021051081
Examiner
EGOAVIL, GUILLERMO J
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Telefonaktiebolaget Lm Ericsson (Publ)
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
582 granted / 648 resolved
+21.8% vs TC avg
Moderate +8% lift
Without
With
+8.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
18 currently pending
Career history
668
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
66.8%
+26.8% vs TC avg
§102
25.5%
-14.5% vs TC avg
§112
6.2%
-33.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 648 resolved cases

Office Action

§102
DETAILED ACTION This Office Action is in response to an application that was filed on 04/18/2024. Claims 19-36 are presented for examination consideration. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Examiner’s Note Concerning the Additional Reference in Independent Claims 19 and 25 MPEP § 2131.01 indicates that multiple references in a 102 rejection has been held to be proper when the extra references are cited to prove the primary reference contains an "enabled disclosure". Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claim 19 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Moore (US 5,790,376 and Moore hereinafter), as evidenced by NPL “Capillary Flow of Liquids in Open Microchannels_Kolliopoulos et al._pgs 1-6_2021” (NPL “Capillary”). Regarding claim 19, Moore discloses a method of producing a printed circuit board (item 40 of Fig. 3 and 3:24-30 & 4:34-67 shows and indicates the method of Fig. 3 to produce printed circuit board 40 {portable notebook computer 40}), wherein the printed circuit board comprises: a first substrate (item 14 of Figs. 1-3 and 31-50 & 4: 50-60 shows and indicates where printed circuit board 40 is comprised of first substrate 14 {metal heat receiving block 14}); a second substrate (item 42 of Fig. 3 and 4:34-54 shows and indicates where printed circuit board 40 is also comprised of second substrate 42 {bottom base housing wall 42}); a heat pipe tube with an open end (item 16 of Figs. 1-3 & items 16b, 16a, Q, 50 of Fig. 3 and 3:42-67 & 4:1-67 & 5:1-12 shows and indicates where printed circuit board 40 is also comprised of a heat pipe tube 16 with open end 16b {where the left longitudinal tube portions 16b is open ended capillary or “wicking” action returned rightward through such porous wall portions to their right ends 16a to again receive the main heat flow Q being generated by the processor 50; where capillary or “wicking” action from an open ended heat pipe tube/microchannel as evidence by NPL “Capillary” on page 1}); and wherein the method comprises the steps of: forming a recess in the first substrate (items 12a’, 20a, 12a of Fig. 2 and 3:50-54 & 4:34-54 shows and indicates where the method of Fig. 3 is comprised of the step of forming a recess 12a’_20a {recess form by the curved sections 12a' of the upper film layer 12a joined with the arcuate depressions 20a} in first substrate 14); placing the heat pipe tube in the recess of the first substrate such that the open end is exposed (Figs. 2-3 and 3:31-67 & 4:1-67 & 5:1-12 shows and indicates placing heat pipe tube 16 in the recess 12a’_20a of the first substrate 14 such that the open end is exposed, as shown in Fig. 3); and laminating the first substrate and the second substrate with the heat pipe tube embedded in the recess between the first substrate and the second substrate (Figs. 2-3 and 3:31-67 & 4:1-67 & 5:1-12 shows and indicates laminating first substrate 14 and second substrate 42 with heat pipe tube 16 embedded in the recess 12a’_20a between first substrate 14 and second substrate 42). Claim 25 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Moore), as evidenced by NPL “Capillary”. Regarding claim 25, Moore discloses a printed circuit board (item 40 of Fig. 3 and 3:24-30 & 4:34-67 shows and indicates printed circuit board 40 {portable notebook computer 40}) comprising: a first substrate with a recess (item 14 of Figs. 1-3 & items 12a’, 20a, 12a of Fig. 2 and 3:31-50 3:50-54 & & 4:50-604 shows and indicates first substrate 14 {metal heat receiving block 14} with recess 12a’_20a {recess form by the curved sections 12a' of the upper film layer 12a joined with the arcuate depressions 20a}); a second substrate (item 42 of Fig. 3 and 3:34-54 shows and indicates second substrate 42 {bottom base housing wall 42}); a heat pipe tube with an open end (item 16 of Figs. 1-3 & items 16b, 16a, Q, 50 of Fig. 3 and 3:42-67 & 4:1-67 & 5:1-12 shows and indicates heat pipe tube 16 with open end 16b {where the left longitudinal tube portions 16b is open ended capillary or “wicking” action returned rightward through such porous wall portions to their right ends 16a to again receive the main heat flow Q being generated by the processor 50; where capillary or “wicking” action from an open ended heat pipe tube/microchannel as evidence by NPL “Capillary” on page 1}), wherein the heat pipe tube is laminated and embedded in the recess between the first substrate and the second substrate, such that a part of said heat pipe tube with the open end is exposed (Figs. 2-3 and 3:31-67 & 4:1-67 & 5:1-12 shows and indicates where heat pipe tube 16 is laminated and embedded in recess 12a’_20a between first substrate 14 and second substrate 42, such that a part of heat pipe tube 16 with open end 16b is exposed, as shown in Fig. 3). Allowable Subject Matter Claims 20-24 and 26-36 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 20, the primary reason for allowance is due to a method of producing a printed circuit board, wherein a part of the heat pipe tube with the open end extends a distance (d1) from a face of the first substrate. Regarding claims 21-22, the primary reason for allowance is due to the allowance of claim 20. Regarding claim 23, the primary reason for allowance is due to a method of producing a printed circuit board, wherein the recess in the first substrate is formed by means of subtractive manufacturing. Regarding claim 24, the primary reason for allowance is due to a method of producing a printed circuit board, further comprising a step of providing pre-preg or sintering paste to at least a part of the recess, whereby the heat pipe tube is secured in the recess, prior to laminating the first substrate and the second substrate. Regarding claim 26, the primary reason for allowance is due to a printed circuit board, wherein a part of the heat pipe tube with the open end extends a distance (d1) from a face of the first substrate. Regarding claims 27-28, the primary reason for allowance is due to the allowance of claim 26. Regarding claim 29, the primary reason for allowance is due to a printed circuit board, providing a printed circuit board according to claim 25; placing at least one electronic component on the printed circuit board; reflowing the printed circuit board such that the placed at least one electronic component is electrically connected to the printed circuit board. Regarding claim 30, the primary reason for allowance is due to the allowance of claim 29. Regarding claims 31-32, the primary reason for allowance is due to the allowance of claims 30 and 29. Regarding claim 33, the primary reason for allowance is due to a circuit board comprising: a printed circuit board; at least one component electrically connected to the printed circuit board and wherein the at least one component is thermally connected to the heat pipe tube; and wherein the heat pipe tube of the printed circuit board is filled with a cooling medium and is sealed. Regarding claims 34-35, the primary reason for allowance is due to the allowance of claim 33. Regarding claim 36, the primary reason for allowance is due to the allowance of claims 35 and 33. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUILLERMO J EGOAVIL whose telephone number is (571)270-1325. The examiner can normally be reached Mon-Fri 8:00-5:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GUILLERMO J EGOAVIL/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Apr 18, 2024
Application Filed
Apr 01, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
98%
With Interview (+8.3%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 648 resolved cases by this examiner. Grant probability derived from career allowance rate.

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