CTNF 18/707,700 CTNF 90440 DETAILED ACTION 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15 AIA Claim s 1 and 8 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Im (U.S. PGPub 2018/0190748) . Regarding claim 1, Im teaches a display apparatus (Fig. 4E) comprising: a transistor (T, [0087]), a light-emitting device (150, [0062]), a first insulating layer (130, [0058]), a second insulating layer (140, [0060]), and a first conductive layer (135, [0059]), wherein the transistor comprises a semiconductor layer and a second conductive layer electrically connected to the semiconductor layer (ACT, SE, [0051], [0056]), wherein the light-emitting device comprises a pixel electrode (AE, [0062]), wherein the first insulating layer is provided over the transistor (Fig. 4E), wherein the first insulating layer comprises a first opening reaching the second conductive layer (CNT3, [0059]), wherein the first conductive layer covers the first opening (Fig. 4E), wherein the second insulating layer is provided over the first insulating layer (Fig. 4E), wherein the second insulating layer comprises a second opening in a region overlapping with the first opening (CNT4, [0062]), wherein the pixel electrode covers a top surface of the second insulating layer and the second opening (Fig. 4E), wherein the pixel electrode is electrically connected to the second conductive layer through the first conductive layer (Fig. 4E, [0062]), wherein in a cross-sectional view, an end portion of the first insulating layer on a first opening side is positioned over the second conductive layer, wherein in the cross-sectional view, an end portion of the second insulating layer on a second opening side is positioned over the first conductive layer, and wherein in the cross-sectional view, the end portion of the second insulating layer on the second opening side is positioned outward from the portion of the first insulating layer on the first opening side (see annotated Fig. 4E below, compare with Spec Fig. 3A). PNG media_image1.png 1630 1573 media_image1.png Greyscale Regarding claim 8 , Im teaches a fourth insulating layer, wherein the fourth insulating layer is provided in contact with a top surface of the first insulating layer, wherein the fourth insulating layer comprises an inorganic material, and wherein the first conductive layer comprises a region in contact with a top surface of the fourth insulating layer ([0058], first insulating layer may be a multilayer stack) . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries set forth in Graham v. John Deere Co. , 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-20-02-aia AIA This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 07-21-aia AIA Claim s 2 and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Im (U.S. PGPub 2018/0190748) in view of Kim (U.S. PGPub 2020/0044177) . Regarding claim 2 , Im teaches wherein the second insulating layer comprises an organic material ([0060]) but does not explicitly teach wherein the first insulating layer comprises an organic material. Kim teaches a display (Fig. 12B) comprising a transistor (200, [0049]), a light emitting device ([0047]), first and second insulating layers respectively comprising first and second openings (510/520, CH12/CH13, [0158]-[0160]), wherein the insulating layers may be an inorganic insulating material or an organic insulating layer ([0054]). Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Kim with Im such that the first insulating layer comprises an organic material because the prior art teaches an element which differs from the claim by substitution with a different element, the claimed element is known in the art, a person of ordinary skill could have substituted one known element for another, and the combination would have yielded predictable results to one of ordinary skill in the art before the time of the invention. See MPEP 2143 I.B. Regarding claim 4 , Im teaches wherein the pixel electrode comprises a third conductive layer which covers a top surface of the second insulating layer and the second opening, wherein the third conductive layer comprises a depressed portion along a shape of a side surface of the second insulating layer and a top surface of the second first conductive layer (Fig. 4E, AE), but does not explicitly teach wherein the pixel electrode comprises a layer and a fourth conductive layer over the third conductive layer, wherein the layer is provided to fill the depressed portion, wherein the fourth conductive layer covers a top surface of the third conductive layer and a top surface of the layer, and wherein the fourth conductive layer comprises a material having a property of reflecting visible light. Furuie teaches wherein a pixel electrode comprises a lower conductive layer covering a top surface of an insulating layer and opening in the insulating layer (Fig. 14, 225, 224, 381, [0053]), a layer provided to fill the depressed portion (326, [0055]), and an upper conductive layer over the lower conductive layer, wherein the upper conductive layer covers a top surface of the lower conductive layer and a top surface of the layer, wherein the upper conductive layer comprises a material having a property of reflecting visible light (223, [0055]). Therefore it would have been obvious to a person having ordinary skill in the art before the effective filing date to combine the teachings of Furuie with Im and Kim such that the pixel electrode comprises a layer and a fourth conductive layer over the third conductive layer, wherein the layer is provided to fill the depressed portion, wherein the fourth conductive layer covers a top surface of the third conductive layer and a top surface of the layer, and wherein the fourth conductive layer comprises a material having a property of reflecting visible light for the purpose of increasing reliability of the pixel electrode (Furuie, [0045]) . 07-21-aia AIA Claim s 3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Im (U.S. PGPub 2018/0190748) in view of Furuie (U.S. PGPub 2015/0053955) . Regarding claim 3 , Im teaches wherein the pixel electrode comprises a third conductive layer which covers a top surface of the second insulating layer and the second opening, wherein the third conductive layer comprises a depressed portion along a shape of a side surface of the second insulating layer and a top surface of the second first conductive layer (Fig. 4E, AE), but does not explicitly teach wherein the pixel electrode comprises a layer and a fourth conductive layer over the third conductive layer, wherein the layer is provided to fill the depressed portion, wherein the fourth conductive layer covers a top surface of the third conductive layer and a top surface of the layer, and wherein the fourth conductive layer comprises a material having a property of reflecting visible light. Furuie teaches wherein a pixel electrode comprises a lower conductive layer covering a top surface of an insulating layer and opening in the insulating layer (Fig. 14, 225, 224, 381, [0053]), a layer provided to fill the depressed portion (326, [0055]), and an upper conductive layer over the lower conductive layer, wherein the upper conductive layer covers a top surface of the lower conductive layer and a top surface of the layer, wherein the upper conductive layer comprises a material having a property of reflecting visible light (223, [0055]). Therefore it would have been obvious to a person having ordinary skill in the art before the effective filing date to combine the teachings of Furuie with Im such that the pixel electrode comprises a layer and a fourth conductive layer over the third conductive layer, wherein the layer is provided to fill the depressed portion, wherein the fourth conductive layer covers a top surface of the third conductive layer and a top surface of the layer, and wherein the fourth conductive layer comprises a material having a property of reflecting visible light for the purpose of increasing reliability of the pixel electrode (Furuie, [0045], [0052]). Regarding claim 5 , the combination of Im and Furuie teaches wherein the layer is an insulating layer (Furuie, [0045]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Im and Furuie for the reasons set forth in the rejection of claim 3 . 07-21-aia AIA Claim s 3 and 6 are rejected under 35 U.S.C. 103 as being unpatentable over Im (U.S. PGPub 2018/0190748) in view of Kishimoto ‘682 (U.S. PGPub 2020/0168682) . Regarding claim 3 , Im teaches wherein the pixel electrode comprises a third conductive layer which covers a top surface of the second insulating layer and the second opening, wherein the third conductive layer comprises a depressed portion along a shape of a side surface of the second insulating layer and a top surface of the second first conductive layer (Fig. 4E, AE), but does not explicitly teach wherein the pixel electrode comprises a layer and a fourth conductive layer over the third conductive layer, wherein the layer is provided to fill the depressed portion, wherein the fourth conductive layer covers a top surface of the third conductive layer and a top surface of the layer, and wherein the fourth conductive layer comprises a material having a property of reflecting visible light. Kishimoto ‘682 teaches wherein a pixel electrode comprises a lower conductive layer covering a top surface of an insulating layer and opening in the insulating layer (Fig. 1, 411, 31, [0039]), a layer provided to fill the depressed portion (412, [0039]), and an upper conductive layer over the lower conductive layer, wherein the upper conductive layer covers a top surface of the lower conductive layer and a top surface of the layer, wherein the upper conductive layer comprises a material having a property of reflecting visible light (413, [0055]-[0056]). Therefore it would have been obvious to a person having ordinary skill in the art before the effective filing date to combine the teachings of Kishimoto ‘682 with Im such that the pixel electrode comprises a layer and a fourth conductive layer over the third conductive layer, wherein the layer is provided to fill the depressed portion, wherein the fourth conductive layer covers a top surface of the third conductive layer and a top surface of the layer, and wherein the fourth conductive layer comprises a material having a property of reflecting visible light for the purpose of reducing the resistance of the pixel electrode (Kishimoto ‘682, [0044]-[0055]). Regarding claim 6 , the combination of Im and Kishimoto ‘682 teaches wherein the layer is a conductive layer (Kishimoto ‘682, [0054]). It would have been obvious to a person having ordinary skill in the art to further combine the teachings of Im and Kishimoto ‘682 for the reasons set forth in the rejection of claim 3 . 07-21-aia AIA Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Im (U.S. PGPub 2018/0190748) in view of Kishimoto ’617 (U.S. PGPub 2020/0411617) . Regarding claim 7 , Im does not explicitly teach a third insulating layer, wherein the third insulating layer is provided in contact with the top surface of the second insulating layer, wherein the third insulating layer comprises an inorganic material, and wherein the pixel electrode comprises a region in contact with a top surface of the third insulating layer. Kishimoto ‘617 teaches a display (Fig. 1) comprising a transistor (21, [0041]), a light emitting device comprising a pixel electrode (40/41, [0031]), first and second insulating layers respectively comprising first and second openings (31/32, [0031]; 24a/30a, [0057], [0062]), wherein the pixel electrode is electrically connected to the transistor via the first and second openings ([0058], [0063]), and a third insulating layer, wherein the third insulating layer is provided in contact with the top surface of the second insulating layer, wherein the third insulating layer comprises an inorganic material, and wherein the pixel electrode comprises a region in contact with a top surface of the third insulating layer (33, [0043]-[0044]). Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Kishimoto ‘617 with Im such that the device comprises a third insulating layer, wherein the third insulating layer is provided in contact with the top surface of the second insulating layer, wherein the third insulating layer comprises an inorganic material, and wherein the pixel electrode comprises a region in contact with a top surface of the third insulating layer for the purpose of protecting the second insulating layer (Kishimoto ‘617, [0043]) . 07-21-aia AIA Claim s 9-11 are rejected under 35 U.S.C. 103 as being unpatentable over Im (U.S. PGPub 2018/0190748) in view of Nitta (U.S. PGPub 2023/0380207) . Regarding claims 9-10 , Im teaches a sixth insulating layer, wherein the light-emitting device comprises the pixel electrode, a common electrode, and an EL layer interposed between the pixel electrode and the common electrode, wherein the sixth insulating layer covers a side surface and part of a top surface of the EL layer, wherein the common electrode covers the sixth insulating layer (bank 160, AE/EL/CE, [0068]-[0069]) but does not explicitly teach a fifth insulating layer, wherein the fifth insulating layer covers a side surface and part of a top surface of the EL layer, and wherein the sixth insulating layer covers a side surface and part of a top surface of the EL layer with the fifth insulating layer therebetween, wherein the fifth insulating layer comprises an inorganic material, and wherein the sixth insulating layer comprises an organic material. Nitta teaches an inorganic insulating layer formed over the side surface and part of the top surface of an electroluminescent layer of a light-emitting device (Fig. 15A, 50, 20/OR, [0141], [0110]), and an organic insulating layer which covers a side surface and part of a top surface of the EL layer with the fifth insulating layer therebetween (30, [0142]). Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Nitta with Im such that the device comprises a fifth insulating layer, wherein the fifth insulating layer covers a side surface and part of a top surface of the EL layer, and wherein the sixth insulating layer covers a side surface and part of a top surface of the EL layer with the fifth insulating layer therebetween, wherein the fifth insulating layer comprises an inorganic material, and wherein the sixth insulating layer comprises an organic material, for the purpose of preventing a short circuit (Nitta, [0143], [0114]). Regarding claim 11 , Im teaches wherein the light emitting device comprises the pixel electrode, a common electrode, and an EL layer interposed between the pixel electrode and the common electrode (AE/EL/CE, [0068]-[0069]) but does not explicitly teach a fifth insulating layer, wherein the fifth insulating layer covers a side surface and part of a top surface of the pixel electrode, wherein the EL layer comprises a region in contact with a top surface of the fifth insulating layer, and wherein the common electrode covers the fifth insulating layer. Nitta teaches an insulating layer covering a side surface and part of a top surface of the pixel electrode (Fig. 15A, 50, 20/E1, [0141]), wherein the EL layer comprises a region in contact with a top surface of the insulating layer, and wherein the common electrode covers the insulating layer (Fig. 15A, OR, E2, [0141]-[0142]). Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Nitta with Im such that the device comprises a fifth insulating layer, wherein the fifth insulating layer covers a side surface and part of a top surface of the pixel electrode, wherein the EL layer comprises a region in contact with a top surface of the fifth insulating layer, and wherein the common electrode covers the fifth insulating layer for the purpose of preventing a short circuit (Nitta, [0143], [0114]) . 07-21-aia AIA Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Im (U.S. PGPub 2018/0190748) in view of Yamazaki (CN111418073A, citations to U.S. PGPub 2021/0175361 for convenience) . Regarding claim 12 , Im teaches wherein the transistor comprises a gate insulating layer interposed between the semiconductor layer and a gate electrode (GI, [0053]) and wherein the transistor is a TFT ([0051]) but does not explicitly teach wherein the semiconductor layer comprises a metal oxide, and wherein the concentration of a metal element included in the metal oxide in the gate insulating layer is lower than or equal to 2×10 19 atoms/cm 3 . Yamazaki teaches wherein a TFT which may be used in a display device ([0190]), wherein the semiconductor layer comprises a metal oxide, and wherein the concentration of a metal element included in the metal oxide in the gate insulating layer is lower than or equal to 2×10 19 atoms/cm 3 ([0078]). Therefore it would have been obvious to a person having ordinary skill in the art before the time of the effective filing date to combine the teachings of Yamazaki with Im such that the semiconductor layer comprises a metal oxide, and wherein the concentration of a metal element included in the metal oxide in the gate insulating layer is lower than or equal to 2×10 19 atoms/cm 3 for the purpose of preventing negative affects to the transistor characteristics (Yamazaki, [0077]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALIA SABUR whose telephone number is (571)270-7219. The examiner can normally be reached M-F 9:30-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALIA SABUR/Primary Examiner, Art Unit 2812 Application/Control Number: 18/707,700 Page 2 Art Unit: 2812 Application/Control Number: 18/707,700 Page 3 Art Unit: 2812 Application/Control Number: 18/707,700 Page 4 Art Unit: 2812 Application/Control Number: 18/707,700 Page 5 Art Unit: 2812 Application/Control Number: 18/707,700 Page 6 Art Unit: 2812 Application/Control Number: 18/707,700 Page 7 Art Unit: 2812 Application/Control Number: 18/707,700 Page 8 Art Unit: 2812 Application/Control Number: 18/707,700 Page 9 Art Unit: 2812 Application/Control Number: 18/707,700 Page 10 Art Unit: 2812 Application/Control Number: 18/707,700 Page 11 Art Unit: 2812 Application/Control Number: 18/707,700 Page 12 Art Unit: 2812 Application/Control Number: 18/707,700 Page 13 Art Unit: 2812
Prosecution Insights