Prosecution Insights
Last updated: July 17, 2026
Application No. 18/710,069

NITRIDE SEMICONDUCTOR SUBSTRATE AND METHOD FOR MANUFACTURING NITRIDE SEMICONDUCTOR SUBSTRATE

Non-Final OA §112
Filed
May 14, 2024
Priority
Nov 17, 2021 — JP 2021-186815 +1 more
Examiner
RAHMAN, MOHAMMAD A
Art Unit
Tech Center
Assignee
Shin-Etsu Chemical Co., Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
480 granted / 553 resolved
+26.8% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
35 currently pending
Career history
580
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
63.0%
+23.0% vs TC avg
§102
17.9%
-22.1% vs TC avg
§112
15.7%
-24.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 553 resolved cases

Office Action

§112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1-6 are pending and have been examined. Priority Acknowledgment is made of applicant's claim for foreign benefit based on JP2021-186815 filed on 11/17/2021. The instant application is a 371 of PCT/JP2022/038552. Claim Rejections - 35 USC § 112 The following is a quotation of the second paragraph of 35 U.S.C. 112: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3-6 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 3 recites: “a nitride semiconductor substrate having the nitride semiconductor layer formed on the SOI layer”. There is insufficient antecedent basis for this limitation in the claim. Claim 3 further recites: “having a resistivity of 100 Ωcm or more is used as the single crystal silicon substrate serving as the bond wafer”. There is insufficient antecedent basis for this limitation in the claim. Claim 3 also recites: “a substrate having a resistivity of 50 mΩcm or less is used as the single crystal silicon substrate serving as the base wafer”. There is insufficient antecedent basis for this limitation in the claim. Claim 5 recites: “wherein the single crystal silicon substrate serving as the bond wafer is manufactured by an FZ method or an MCZ method and provided”. There is insufficient antecedent basis for this limitation in the claim. Claim 6 recites: “wherein the single crystal silicon substrate serving as the bond wafer is manufactured by an FZ method or an MCZ method and provided”. There is insufficient antecedent basis for this limitation in the claim. Claims 4-6 depend from claim 3. REASON FOR ALLOWANCE Claims 1-2 are allowed over prior art. The following is an examiner’s statement of reasons for allowance, which paraphrases and summarizes the claimed invention without intending to be limiting, wherein the legally defined scope of the claimed invention is defined by the allowed claims themselves in view of the written description under 35 USC 112. This statement is not intended to necessarily state all the reasons for allowance or all the details why the claims are allowed and has not been written to specifically or impliedly state that all the reasons for allowance are set forth (MPEP 1302.14). Regarding claim 1, the reference(s) of the Prior Art of record and considered pertinent to the applicant's disclosure and to the examiner’s knowledge do(es) not teach or render obvious, at least to the skilled artisan, the instant invention regarding a method in their entirety (the individual limitations may be found just not in combination with proper motivation). The most relevant prior art reference(s) (US 20150108502 A1 to Akiyama) substantially teach(es) a SOI substrate which obtained by providing a handle wafer which was a single crystal silicon wafer having silicon oxide film (see [0056]), but not the limitations of “a nitride semiconductor layer including a GaN layer formed on the SOI substrate, wherein the single crystal silicon thin film contains nitrogen at a concentration of 2.0 x 1014 atoms/cm3 or more and has a resistivity of 100 Ωcm or more, the single crystal silicon substrate has a resistivity of 50 mΩcm or less, and the silicon oxide layer has a thickness of 10 to 400 nm” as recited in claim 1. Therefore, the claim 1 is deemed patentable over the prior art. Regarding claim 2, is allowed due to its dependencies on claim 1. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD A. RAHMAN whose telephone number is (571) 270-0168 and email is mohammad.rahman5@uspto.gov. The examiner can normally be reached on Mon-Fri 8:00-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached on (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD A RAHMAN/ Primary Examiner, Art Unit 2898
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Prosecution Timeline

May 14, 2024
Application Filed
Jun 11, 2026
Non-Final Rejection mailed — §112 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+11.1%)
2y 8m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 553 resolved cases by this examiner. Grant probability derived from career allowance rate.

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