Prosecution Insights
Last updated: July 28, 2026
Application No. 18/712,671

SURROUNDING PATTERN AND PROCESS AWARE METROLOGY

Non-Final OA §101§102
Filed
May 22, 2024
Priority
Dec 09, 2021 — EU 21213572.7 +1 more
Examiner
PERSAUD, DEORAM
Art Unit
2882
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
ASML Holding N.V.
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
89%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allowance Rate
583 granted / 759 resolved
+8.8% vs TC avg
Moderate +12% lift
Without
With
+11.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
31 currently pending
Career history
798
Total Applications
across all art units

Statute-Specific Performance

§101
1.2%
-38.8% vs TC avg
§103
63.9%
+23.9% vs TC avg
§102
27.9%
-12.1% vs TC avg
§112
0.7%
-39.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 759 resolved cases

Office Action

§101 §102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Claims 1 and 17 recites a method / a computer program product comprising a non-transitory computer-readable medium for a mark design for use in imaging of a pattern on a substrate using a lithographic process in a lithographic apparatus comprising the steps of obtaining a mark construction, obtaining a spatial variation of a geometric parameter associated with the mark construction, and determining, by a hardware computer, a geometry design of individual patterns of a mark based on the spatial variation of the mark. These steps are a mental process of gathering and analyzing information so as to characterize a process and therefore recite the judicial exception of an abstract idea. Claims 1 and 17 recites a hardware computer system to perform the steps. This judicial exception is not integrated into a practical application because the generically recited computer element do not add a meaningful limitation to the abstract idea because they amount to simply implementing the abstract idea on a computer. Claims 1 and 17 does not include additional elements that are sufficient to amount to significantly more than the judicial exception because the generic computer elements only provide for the implementing of mental process on a computer. Dependent claims 2-16 and 18-20 fail to cure this deficiency of independent claims 1 and 17 (set forth above) and are rejected accordingly. Claims 2-16 and 18-20 recite limitations that represent (in addition to the limitations already noted above) either the abstract idea or an additional element that is merely extra-solution activity, mere use of instructions and/or generic computer component(s) as a tool to implement the abstract idea, and/or merely limits the abstract idea to a particular technological environment. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. [US 2015/0186581 A1]. Regarding claims 1 and 17, Chen et al. discloses a method for a mark design for use in imaging of a pattern on a substrate using a lithographic process in a lithographic apparatus (paragraphs [0005]-[0007] teaches design of a metrology target), the method comprising: obtaining a mark construction (paragraphs [0063]-[0064] teaches various metrology target designs in order to confirm the suitability and/or viability of one or more of the proposed target designs); obtaining a spatial variation of a geometric parameter associated with the mark construction, wherein the spatial variation is associated with a lithographic process (paragraphs [0067]-[0071] teaches model formulation describes the known physics and chemistry of the overall process, and each of the model parameters desirably corresponds to a distinct physical or chemical effect, including process parameters and one or more geometric dimensions can be defined for a particular target design such as pitch, critical dimension of a feature of the metrology target design); and determining, by a hardware computer (paragraphs [0113]-[0114] teaches computer programs), a geometry design of individual patterns of a mark based on the spatial variation of the mark (Figs. 7-9 and paragraphs [0067]-[0074], teaches one or more geometric dimensions can be defined for a particular target design such as pitch, critical dimension of a feature of the metrology target design, etc.). Regarding claims 2, 16 and 18, Chen et al. discloses wherein the geometry design is further determined based on surrounding patterns of the mark (paragraph [0074]). Regarding claims 3 and 19, Chen et al. discloses wherein determining the geometry design includes determining at least one selected from: a critical dimension, pitch, or sub-segmentation, of the individual patterns of the mark (paragraph [0070]). Regarding claims 4-6 and 20, Chen et al. discloses wherein determining the geometry design includes iteratively adjusting the geometry design based on predicted measurement performance, wherein each iteration includes: computing a cost function; determining whether the cost function satisfies a specified condition; and adjusting the geometry design based on a determination that the cost function does not satisfy the specified condition, wherein the cost function includes one or more performance indicators that are indicative of the optical measurement performance of the mark (paragraphs [0082]-[0083] teaches the cost function to define the parameter of the set of test patterns). Regarding claim 7, Chen et al. discloses wherein obtaining the mark construction includes: inputting a target design layout and design layout variables of the lithographic process to a simulation model that is configured to generate a three-dimensional (3D) representation of a design corresponding to the target design layout printed on the substrate using the lithographic process; and executing the simulation model to obtain simulation results, the simulation results including the 3D representation of the design (paragraph [0066]). Regarding claims 8 and 9, Chen et al. discloses wherein obtaining the spatial variation of the geometric parameter includes: identifying, in the target design layout, a grid having the mark, wherein a size of the grid is greater than a size of the mark; and obtaining, from the simulation results, the spatial variation of the geometric parameter on the grid, wherein obtaining the spatial variation includes interpolating the grid to obtain spatial variation of the geometrical parameter for each of the individual patterns of the mark (paragraphs [0067]-[0074], teaches one or more geometric dimensions can be defined for a particular target design). Regarding claims 10 and 11, Chen et al. discloses wherein determining the geometry design includes reconstructing, using a simulation model (paragraph [0063]), the individual patterns of the mark based on the spatial variation of the geometric parameter and a mark design layout, wherein the individual patterns are further reconstructed based on a characteristic of surrounding patterns of the mark (paragraphs [0067]-[0074]). Regarding claim 12, Chen et al. discloses wherein the spatial variation of the geometric parameter is obtained using at least one selected from: of measurement data, empirical data, or experimental data, and wherein the geometric parameter includes at least one selected from: a layer thickness, a chemical mechanical polishing dishing height, an etch sidewall angle, a litho-etch critical dimension bias, or an etch floor tilt (paragraphs [0067]-[0074]). Regarding claim 13, Chen et al. discloses wherein the geometric parameter varies within an individual pattern (paragraphs [0056] and [0061]). Regarding claim 14, Chen et al. discloses comprising: obtaining, using a first simulation model, a measurement performance of the mark; performing a measurement using a measurement tool to obtain a measurement signal, the measurement signal including a set of optical measurement parameters obtained using the mark; and adjusting the measurement signal based on the measurement performance (Fig. 7 and paragraphs [0063]-[0067] and [0085]-[0091]). Regarding claim 15, Chen et al. discloses wherein the mark includes at least one selected from: a metrology mark, an overlay mark or an alignment mark, and further comprising generating a mask pattern based on the mark, the mask pattern including patterns corresponding to a target design layout to be printed on the substrate (paragraphs [0035]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEORAM PERSAUD whose telephone number is (571)270-5476. The examiner can normally be reached M-F 8AM-5PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Minh-Toan Ton can be reached at 571-272-2303. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DEORAM PERSAUD/Primary Examiner, Art Unit 2882
Read full office action

Prosecution Timeline

May 22, 2024
Application Filed
Jan 20, 2026
Non-Final Rejection mailed — §101, §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
89%
With Interview (+11.8%)
2y 9m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 759 resolved cases by this examiner. Grant probability derived from career allowance rate.

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