Prosecution Insights
Last updated: October 02, 2026
Application No. 18/713,455

NITRIDE SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREFOR

Non-Final OA §103
Filed
May 24, 2024
Priority
Nov 30, 2021 — JP 2021-193940 +1 more
Examiner
MAZUMDER, DIDARUL A
Art Unit
Tech Center
Assignee
Shin-Etsu Chemical Co., Ltd.
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
94%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
647 granted / 748 resolved
+26.5% vs TC avg
Moderate +8% lift
Without
With
+7.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
41 currently pending
Career history
768
Total Applications
across all art units

Statute-Specific Performance

§103
58.7%
+18.7% vs TC avg
§102
25.1%
-14.9% vs TC avg
§112
11.5%
-28.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 748 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION This action is responsive to the application No. 18/713,455 filed on May 24, 2024. Priority 3. Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Information Disclosure Statement 4. Acknowledgement is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered. Claim Rejections - 35 USC § 103 5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 6. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 7. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 8. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: a. Determining the scope and contents of the prior art. b. Ascertaining the differences between the prior art and the claims at issue. c. Resolving the level of ordinary skill in the pertinent art. d. Considering objective evidence present in the application indicating obviousness or non-obviousness. 9. Claims 11-14, 21-24 are rejected under 35 U.S.C. 103 as being unpatentable over Kadono et al. (US 2016/0181313 A1). Regarding independent claim 11, Kadono et al. teaches a nitride semiconductor substrate, comprising (Fig. 2(D)): a silicon single-crystal substrate (10, para [0041]); and a nitride semiconductor thin film (18) formed on the silicon single-crystal substrate (10), wherein the silicon single-crystal substrate (10) has a carbon concentration of 5E16 atoms/cm3 or more and 2E17 atoms/cm3 or less (para [0045] which overlaps the claimed range). It would have been obvious to one of ordinary skill in the art before the effective filing date, to select the claimed carbon centration in the silicon single-crystal substrate within the quoted range to optimize the result effective variable to promote precipitation of oxygen in the semiconductor wafer in order to improve the device performance. In addition, to an ordinary artisan practicing the invention, absent evidence of disclosure of criticality for the range giving unexpected results, it is not inventive to discover optimal or workable ranges by routine experimentation. In re Aller, 220 F. 2d 454, 105 USPQ 233, 235 (CCPA 1955). Furthermore, the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen concentration of carbon in the silicon single-crystal substrate or upon another variable recited in a claim, the Applicant must show that the chosen concentration is critical. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990). Regarding claim 12, Kadono et al. teaches wherein (Fig. 2), the silicon single-crystal substrate (10) has an oxygen concentration of 5E17 atoms/cm3 or more and 5E18 atoms/cm3 or less (9×10.sup.17 atoms/cm.sup.3 or more. Further, the oxygen concentration is preferably 18×10.sup.17 atoms/cm.sup.3 or less, para [0047]), and a nitrogen concentration of 1E14 atoms/cm3 or more and 5E16 atoms/cm3 or less (5×10.sup.12 atoms/cm.sup.3 or more and 5×10.sup.14 atoms/cm.sup.3 or less, para [0046] which overlaps the claimed range). It would have been obvious to one of ordinary skill in the art before the effective filing date, to select the claimed oxygen centration in the silicon single-crystal substrate within the quoted range to optimize the result effective variable to suppress epitaxial defects on the surface in order to improve the device performance. In addition, to an ordinary artisan practicing the invention, absent evidence of disclosure of criticality for the range giving unexpected results, it is not inventive to discover optimal or workable ranges by routine experimentation. In re Aller, 220 F. 2d 454, 105 USPQ 233, 235 (CCPA 1955). Furthermore, the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen concentration of oxygen on the silicon single-crystal substrate surface or upon another variable recited in a claim, the Applicant must show that the chosen concentration is critical. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990). Regarding claim 13, Kadono et al. teaches wherein (Fig. 2), the silicon single-crystal substrate (10) is produced by a CZ method (para [0045]) (the limitation is a product-by-process). Regarding claim 14, Kadono et al. teaches wherein (Fig. 2), the silicon single-crystal substrate (10) is produced by a CZ method (para [0045]) (the limitation is a product-by-process). Regarding independent claim 21, Kadono et al. teaches a method for manufacturing a nitride semiconductor substrate comprising (Figs. 2(A)-2(D)) a silicon single-crystal substrate (10) and a nitride semiconductor thin film (18) formed on the silicon single-crystal substrate (10), the method comprising steps of: (1) preparing a silicon single-crystal substrate (10) having a carbon concentration of 5E16 atoms/cm3 or more and 2E17 atoms/cm3 or less (para [0045] which overlaps the claimed range); and (2) forming a nitride semiconductor thin film (18) on the silicon single-crystal substrate (10). It would have been obvious to one of ordinary skill in the art before the effective filing date, to select the claimed carbon centration in the silicon single-crystal substrate within the quoted range to optimize the result effective variable to promote precipitation of oxygen in the semiconductor wafer in order to improve the device performance. In addition, to an ordinary artisan practicing the invention, absent evidence of disclosure of criticality for the range giving unexpected results, it is not inventive to discover optimal or workable ranges by routine experimentation. In re Aller, 220 F. 2d 454, 105 USPQ 233, 235 (CCPA 1955). Furthermore, the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen concentration of carbon in the silicon single-crystal substrate or upon another variable recited in a claim, the Applicant must show that the chosen concentration is critical. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990). Regarding claim 22, Kadono et al. teaches wherein (Figs. 2(A)-2(D)), the silicon single-crystal substrate (10) prepared in the step (1) has an oxygen concentration of 5E17atoms/cm3 or more and 5E18atoms/cm or less (9×10.sup.17 atoms/cm.sup.3 or more. Further, the oxygen concentration is preferably 18×10.sup.17 atoms/cm.sup.3 or less, para [0047]), and a nitrogen concentration of 1E14 atoms/cm or more and 5E16 atoms/cm or less (5×10.sup.12 atoms/cm.sup.3 or more and 5×10.sup.14 atoms/cm.sup.3 or less, para [0046] which overlaps the claimed range). It would have been obvious to one of ordinary skill in the art before the effective filing date, to select the claimed oxygen centration in the silicon single-crystal substrate within the quoted range to optimize the result effective variable to suppress epitaxial defects on the surface in order to improve the device performance. In addition, to an ordinary artisan practicing the invention, absent evidence of disclosure of criticality for the range giving unexpected results, it is not inventive to discover optimal or workable ranges by routine experimentation. In re Aller, 220 F. 2d 454, 105 USPQ 233, 235 (CCPA 1955). Furthermore, the specification contains no disclosure of either the critical nature of the claimed dimensions or any unexpected results arising therefrom. Where patentability is said to be based upon particular chosen concentration of oxygen on the silicon single-crystal substrate surface or upon another variable recited in a claim, the Applicant must show that the chosen concentration is critical. See In re Woodruff, 919 F.2d 1575, 1578, 16 USPQ 2d 1934, 1936 (Fed. Cir. 1990). Regarding claim 23, Kadono et al. teaches wherein (Fig. 2), the silicon single-crystal substrate (10) prepared in the step (1) is produced by a CZ method (para [0045]). Regarding claim 24, Kadono et al. teaches wherein (Fig. 2), the silicon single-crystal substrate (10) prepared in the step (1) is produced by a CZ method (para [0045]). 10. Claims 15-18, 25-28 are rejected under 35 U.S.C. 103 as being unpatentable over Kadono et al. (US 2016/0181313 A1) as applied to claims 11, 21 above, and further in view of StauB et al. (US 2013/0200432 A1) and Umeda et al. (US 2015/0171173 A1). Regarding claim 15, Kadono et al. teaches all of the limitations of claim 11 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 16, Kadono et al. teaches all of the limitations of claim 12 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 17, Kadono et al. teaches all of the limitations of claim 13 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 18, Kadono et al. teaches all of the limitations of claim 14 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 25, Kadono et al. teaches all of the limitations of claim 21 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate prepared in the step (1) has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) prepared in the step (1) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 26, Kadono et al. teaches all of the limitations of claim 22 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate prepared in the step (1) has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) prepared in the step (1) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 27, Kadono et al. teaches all of the limitations of claim 23 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate prepared in the step (1) has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) prepared in the step (1) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). Regarding claim 28, Kadono et al. teaches all of the limitations of claim 24 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the silicon single-crystal substrate prepared in the step (1) has a crystal surface orientation of (111) and a resistivity of 1000 Ω-cm or more. StauB et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (3) prepared in the step (1) has a crystal surface orientation of (111) (para [0031]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by StauB et al., and modifying the surface of the silicon substrate of Kadono et al., in order to deposit of nitridic compound semiconductor material which provides suitable surface for nitrogen compound formation (para [0031]). Kadono et al. and StauB et al. are explicitly silent of disclosing wherein, the silicon single-crystal substrate has a resistivity of 1000 Ω-cm or more. Umeda et al. discloses wherein (Fig. 1), the silicon single-crystal substrate (101) has a resistivity of 1000 Ω-cm or more (para [0025]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to heighten in mechanical strength, so the layer is not cracked, thus, high product yield can be obtained (para [0025]). 11. Claims 19-20, 29-30 are rejected under 35 U.S.C. 103 as being unpatentable over Kadono et al. (US 2016/0181313 A1) as applied to claims 11, 21 above, and further in view of Umeda et al. (US 2015/0171173 A1). Regarding claim 19, Kadono et al. teaches all of the limitations of claim 11 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the nitride semiconductor thin film contains gallium nitride. Umeda et al. discloses wherein (Fig. 7), the nitride semiconductor thin film (102: 104) contains undoped gallium nitride layer (para [0058]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to provide high purity, enable high electron mobility, superior formation of high-density two-dimensional electron gas (2DEG) channels. Regarding claim 20, Kadono et al. teaches all of the limitations of claim 12 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the nitride semiconductor thin film contains gallium nitride. Umeda et al. discloses wherein (Fig. 7), the nitride semiconductor thin film (102: 104) contains undoped gallium nitride layer (para [0058]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to provide high purity, enable high electron mobility, superior formation of high-density two-dimensional electron gas (2DEG) channels. Regarding claim 29, Kadono et al. teaches all of the limitations of claim 21 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the nitride semiconductor thin film formed in the step (2) contains gallium nitride. Umeda et al. discloses wherein (Fig. 7), the nitride semiconductor thin film (102: 104) formed in the step (2) contains undoped gallium nitride layer (para [0058]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to provide high purity, enable high electron mobility, superior formation of high-density two-dimensional electron gas (2DEG) channels. Regarding claim 30, Kadono et al. teaches all of the limitations of claim 22 from which this claim depends. Kadono et al. is explicitly silent of disclosing wherein, the nitride semiconductor thin film formed in the step (2) contains gallium nitride. Umeda et al. discloses wherein (Fig. 7), the nitride semiconductor thin film (102: 104) formed in the step (2) contains undoped gallium nitride layer (para [0058]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the invention to apply the teaching as taught by Umeda et al., and modifying the surface of the silicon substrate of Kadono et al. and StubB et al., in order to provide high purity, enable high electron mobility, superior formation of high-density two-dimensional electron gas (2DEG) channels. Examiner’s Note 12. Applicant is reminded that the Examiner is entitled to give the broadest reasonable interpretation to the language of the claims. Furthermore, the Examiner is not limited to Applicants' definition which is not specifically set forth in the claims. See MPEP 2111, 2123, 2125, 2141.02 VI, and 2182. Examiner has cited particular paragraphs and/or columns/lines in the references applied to the claims above for the convenience of the applicant. Although the specified citations are representative of the teachings of the art and are applied to specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the references in their entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner. See MPEP 2141.02 VI. In the case of amending the claimed invention, Applicant is respectfully requested to indicate the portion(s) of the specification which dictate(s) the structure relied on for proper interpretation and also to verify and ascertain the metes and bounds of the claimed invention. Conclusion 13. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DIDARUL MAZUMDER whose telephone number is (571)272-8823. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. 14. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at 571-270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DIDARUL A MAZUMDER/Primary Examiner, Art Unit 2812
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Prosecution Timeline

May 24, 2024
Application Filed
Aug 25, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
94%
With Interview (+7.8%)
2y 1m (~0m remaining)
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