DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1, 3, 7-8, 10, 15-16, 20, and 23-25 are pending in this office action and presented for examination. Claims 1, 7, 15-16, and 20 are newly amended; claims 2, 4-6, 11-12, and 21 are newly cancelled; and claim 25 is newly added by the response received 27 August 2026.
Claim Objections
Claims 15-16, 20, and 23-24 are objected to because of the following informalities. Appropriate correction is required.
In claim 15, lines 49-55, “and allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding, comprises” should be “and allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding comprises”. (See, for example, claim 7, lines 13-14.)
In claim 15, lines 59-60, “group, , according” should be “group, according”.
Claims 16, 20, and 23-24 are objected to for failing to alleviate the objection of claim 15 above.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1, 3, 7-8, 10, 15-16, 20, and 23-25 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “the instruction position for performing decoder group switch” in line 9. However, the metes and bounds of this limitation are indefinite. For example, the antecedent basis for this limitation is unclear. For example, it is unclear as to which instruction position, of the instruction position(s) implicitly recited via the language in claim 1, lines 4-5 (“each of the at least one switch tag at least indicates an instruction position for performing decoder group switch”), is intended to provide antecedent basis for the instruction position of the aforementioned limitation of claim 1, line 9. Note that “the instruction position” is also recited in claim 1, lines 10-11 (“allocating the instruction stream to a plurality of decoder groups for parallel decoding according to the instruction position”); claim 1, lines 13-14 (“the target instruction is an instruction corresponding to the instruction position”); claim 3, line 3; claim 3, line 4; claim 7, line 2; claim 7, lines 4-5; claim 7, lines 29-31 (“in a case where the last instruction decoded by the decoder group does not have the instruction position indicated by the corresponding one of the at least one switch tag”); and claim 7, line 35.
Claim 1 recites the limitation “in the micro-op cache mode, determining a micro-op queue corresponding to a decoder group, according to whether a last instruction decoded by a decoder group has an instruction position indicated by the corresponding one of the at least one switch tag before the decoder mode is switched to the micro-op cache mode, to save an obtained micro-op read in the micro-op cache, wherein the last instruction is an instruction at an end of the instruction stream” in lines 28-33, which appears to convey that an instruction at the end of the instruction stream [fetched by an instruction fetching request] is decoded by a decoder group in a decoder mode. However, claim 1 also recites the limitation “in a micro-op cache mode, sending the instruction fetching request carrying the at least one switch tag to the micro-op cache, and outputting a micro-op corresponding to the instruction fetching request from the micro-op cache in a case where the instruction fetching request is hit in the micro-op cache” in lines 16-20. As such, it is indefinite as to whether the claim encompasses a possibility that the instruction fetching request is hit in the micro-op cache in a micro-op cache mode (see claim 1, lines 16-20), in view of the claim also reciting that the last instruction (which is an instruction at the end of the instruction stream that is fetched by the instruction fetching request) is decoded by a decoder group (see claim 1, lines 28-33).
Claims 3, 7-8, 10, and 25 are rejected for failing to alleviate the rejections of claim 1 above.
Claim 7 recites the limitation “for a respective non-first instruction group of one or more non-first instruction groups among the plurality of instruction groups, determining a decoder group” in lines 15-16. Claim 3, upon which claim 7 is dependent, recites the limitation “splitting the instruction stream according to the instruction position to obtain a plurality of instruction groups, and allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding” in lines 4-6. However, it is indefinite as to how an instruction stream, when split according to the instruction position (i.e., one boundary), results in more than two instruction groups (e.g., a non-first instruction group and multiple non-first instruction groups), which is a scenario encompassed by the claim language in view of the “or more” language.
Claim 7 recites the limitation “the switch tag corresponding to the target instruction grouped into the respective previous instruction group preceding a corresponding non-first instruction group of the one or more non-first instruction groups” in lines 18-20. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 25, lines 3-6, and, with minor differences, recited in claim 25, lines 9-11.
Claim 7 recites the limitation “the target instruction grouped into the respective previous instruction group preceding a corresponding non-first instruction group of the one or more non-first instruction groups” in lines 18-20. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 25, lines 4-6, and, with minor differences, recited in claim 25, lines 9-11.
Claim 7 recites the limitation “allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding comprises: for a respective non-first instruction group of one or more non-first instruction groups among the plurality of instruction groups, determining a decoder group from the plurality of decoder groups that is different from the decoder group allocated for a respective previous instruction group, according to the switch tag corresponding to the target instruction grouped into the respective previous instruction group preceding a corresponding non-first instruction group of the one or more non-first instruction groups, and saving the respective non-first instruction group of the one or more non-first instruction groups to a respective instruction queue corresponding to the respective determined decoder group” in lines 13-23 (also note surrounding context), which appears to convey that a first instruction group among the plurality of instruction groups of an instruction stream is allocated before non-first instruction groups of the instruction stream. However, claim 1 recites “the last instruction is an instruction at an end of the instruction stream” in lines 32-33, and claim 7 further recites “the first instruction group is allocated to an instruction queue corresponding to the decoder group decoding the last instruction” in lines 32-33, and claim 7 further recites “the first instruction group is allocated to an instruction queue corresponding to a decoder group indicated by the corresponding one of the at least one switch tag corresponding to the last instruction” in lines 37-39. Therefore, it is unclear, for example, as to whether the first instruction group is allocated before the non-first instruction group containing the last instruction of the instruction stream (see claim 7, lines 13-23, for example), or whether the first instruction group is allocated after (and based on) the non-first instruction group containing the last instruction of the instruction stream (see claim 7, lines 32-33, and claim 7, lines 37-39). Additionally, it is unclear, for example, as to whether the first instruction group and the non-first instruction group containing the last instruction originate from a same instruction stream from a same instruction fetching request, or different instruction streams (such that, for example, the first instruction group is in an instruction stream following the instruction stream comprising the non-first instruction group containing the last instruction).
Claim 25 is rejected for failing to alleviate the rejections of claim 7 above.
Claim 15 recites the limitation “the instruction position for performing decoder group switch” in lines 8-9. However, the metes and bounds of this limitation are indefinite. For example, the antecedent basis for this limitation is unclear. For example, it is unclear as to which instruction position, of the instruction position(s) implicitly recited via the language in claim 15, lines 3-4 (“each of the at least one switch tag at least indicates an instruction position for performing decoder group switch”), is intended to provide antecedent basis for the instruction position of the aforementioned limitation of claim 15, lines 8-9. Note that “the instruction position” is also recited in claim 15, lines 11-12 (“allocate the instruction stream to the plurality of decoder groups for parallel decoding according to the instruction position”); claim 15, lines 16-17 (“the target instruction is an instruction corresponding to the instruction position”); claim 15, line 27; claim 15, lines 28-29; claim 15, lines 31-32; claim 15, line 35; claim 16, lines 1-2 (“the instruction position is an end position of the target instruction”); claim 16, lines 3-4; and claim 16, lines 6-7.
Claim 15 recites the limitation “for a respective non-first instruction group of one or more non-first instruction groups among the plurality of instruction groups, determining, by the instruction allocating circuit, a decoder group from the plurality of decoder groups that is different from the decoder group allocated for a respective previous instruction group” in lines 56-59. Claim 15 also recites the limitation “splitting, by the instruction allocating circuit, the instruction stream according to the instruction position to obtain a plurality of instruction groups” in lines 31-32. However, it is indefinite as to how an instruction stream, when split according to the instruction position (i.e., one boundary), results in more than two instruction groups (e.g., a previous instruction group and multiple non-first instruction groups).
Claim 15 recites the limitation “the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group of the one or more non-first instruction groups” in lines 60-63. However, there is insufficient antecedent basis for this limitation in the claims.
Claim 15 recites the limitation “the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group of the one or more non-first instruction groups” in lines 61-63. However, there is insufficient antecedent basis for this limitation in the claims.
Claim 15 recites the limitation “determining, by the instruction allocating circuit, a decoder group from the plurality of decoder groups that is different from the decoder group allocated for a respective previous instruction group, , according to the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group of the one or more non-first instruction groups” in lines 57-63. It is indefinite as to whether a decoder group is determined for a respective previous instruction group according to a same switch tag corresponding to a same target instruction grouped into a same previous instruction group which precedes a corresponding non-first instruction group, or whether another interpretation is intended.
Claim 15 recites the limitation “in the micro-op cache mode, a micro-op queue is determined, according to whether a last instruction decoded by a decoder group has an instruction position indicated by the corresponding one of the at least one switch tag before the decoder mode is switched to the micro-op cache mode, to save an obtained micro-op read in the micro-op cache, wherein the last instruction is an instruction at an end of the instruction stream” in lines 74-79, which appears to convey that an instruction at the end of the instruction stream [fetched by an instruction fetching request] is decoded by a decoder group in a decoder mode. However, claim 15 also recites the limitation “in a micro-op cache mode, the branch predicting unit sends the instruction fetching request carrying the at least one switch tag to the micro-op cache, and the micro-op cache is configured to output a micro-op corresponding to the instruction fetching request, in the micro-op cache mode, in a case where the instruction fetching request is hit in the micro-op cache” in lines 19-24. As such, it is indefinite as to whether the claim encompasses a possibility that the instruction fetching request is hit in the micro-op cache in the micro-op cache mode (see claim 15, lines 19-24), in view of the claim also reciting that the last instruction (which is an instruction at the end of the instruction stream that is fetched by the instruction fetching request) is decoded by a decoder group (see claim 15, lines 74-79).
Claims 16, 20, and 23-24 are rejected for failing to alleviate the rejections of claim 15 above.
Claim 25 recites “determining a decoder group …. comprises: sequentially determining a decoder group allocated” in lines 1-7. Claim 7, upon which claim 25 is dependent, recites the limitation “allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding comprises: for a respective non-first instruction group of one or more non-first instruction groups among the plurality of instruction groups, determining a decoder group from the plurality of decoder groups that is different from the decoder group allocated for a respective previous instruction group” in lines 13-18. Therefore, it is indefinite as to whether allocation entails determining, or determining occurs after allocation.
Response to Arguments
Applicant on page 11 argues: ‘In claim 1, the term "output" is amended to be the correct term "outputting". Accordingly, the objections to claims 1-8 and 10-12 have been addressed, and Applicant respectfully requests withdrawal of the claim objections.’
In view of the aforementioned amendment, the previously presented objection to the claims is withdrawn.
Applicant on page 11 argues: “Claims 11-12 are rejected under 35 U.S.C. § 112(a. Applicant has deleted claims 11-12 in this filing. Accordingly, these rejections are now moot, and Applicant respectfully requests withdrawal of the rejections.”
In view of the aforementioned claim deletions, the previously presented written description rejections are withdrawn.
Applicant on pages 11-12 argues: ‘To address paragraphs 12-13 of the Office Action, Applicant has amended claim 1 to adjusts the position of the feature "according to the at least one switch tag carried by the instruction fetching request" in claim 1. This amendment finds support throughout the specification including, for example, paragraph [0043] of the description. No new matter has been added. Accordingly, the features relating to "instruction position for performing decoder group switch" and "the instruction position" in the amended claim 1 are clear, and amended claim 1 is definite.’
However, while one facet of the associated rejections is overcome, another facet remains — see the Claim Rejections - 35 USC § 112 section above.
Moreover, to address paragraphs 33-34 of the Office Action, Applicant has amended claim 15 in a manner similar to the amendments made to claim 1.
Similarly, in view of the aforementioned amendments, the associated previously presented rejections are withdrawn.
Applicant on page 12 argues: ‘To address paragraph 14 of the Office Action, Applicant has amended the feature "in response to the micro-ops being obtained through searching by the micro-op cache" of claim 1 to the new feature "in a micro-op cache mode, sending the instruction fetching request carrying the at least one switch tag to the micro-op cache", and Applicant has deleted the previously presented feature "in the micro-op cache mode, sending the instruction fetching request carrying the at least one switch tag to the micro-op cache; and." This amendment hinfs support throughout the specification including, for example, paragraph [0081] of the description. No new matter has been added, and amended claim 1 is definite.’
In view of the aforementioned amendment, the associated previously presented rejection is withdrawn.
Applicant on page 12 argues: “Moreover, to address paragraph 35 of the Office Action, Applicant has amended claim 15 in a manner similar to the amendments made to claim 1.”
Similarly, in view of the aforementioned amendments, the associated previously presented rejection is withdrawn.
Applicant on page 12 argues: ‘To address paragraph 15 and 37 of the Office Action, Applicant has added the feature "wherein the last instruction is an instruction at an end of the instruction stream" to claim 1, and Applicant has made a similar amendment to claim 15. This amendment finds support throughout the specification including, for example, paragraph [0087] of the description, and Fig. 5A of the present application. No new matter has been added. The amended claims 1 and 15 are clear.’
In view of the aforementioned amendments, the associated previously presented rejections are withdrawn. However, the aforementioned amendment appears to catalyze an indefinite issue — see the Claim Rejections - 35 USC § 112 section above.
Applicant on page 12 argues: ‘Moreover, to address paragraph 16, because Applicant deletes the claim 2, Applicant submits that the rejections regarding the claim 2 in the paragraph 16 of the Office Action have been addressed and respectfully requests withdrawal of the rejections.’
In view of the aforementioned claim cancellation, the associated previously presented rejection is withdrawn.
Applicant on page 12 argues: ‘To address paragraphs 17-29 of the Office Action, Applicant has delete claims 4-5 and amended the claim 7 according to the previous claims 4-5, paragraphs [0064, 0073, and 0092] of the description and Fig. 2C and Fig. 5A of the present application. Thus, amended claim 7 is clear, and the rejections regarding the claims 4-7 have been addressed. Applicant respectfully requests withdrawal of the rejections.’
In view of the aforementioned amendments, the previously presented rejections of paragraphs 17, 18, 19, 20, 21, 22, 23, 27, 28, and 29 are withdrawn. However, the previously presented rejections of paragraphs 24, 25, 26 appear to remain relevant — see the Claim Rejections - 35 USC § 112 section above.
Applicant on page 13 argues: “Moreover, to address paragraphs 38-50 of the Office Action, Applicant has amended claim 15 in a manner similar to this amendment. The amended claim 15 is also clear.”
In view of the aforementioned amendments, the previously presented rejections of paragraphs 38, 39, 40, 41, 42, 43, 44, 48, 50 are withdrawn. However, the previously presented rejections of paragraphs 45, 46, 47 and 49 appear to remain relevant — see the Claim Rejections - 35 USC § 112 section above.
Applicant on page 13 argues: ‘To address paragraph 30 of the Office Action, because Applicant has deleted claims 5-6, the feature "allocating a decoder group...comprises: determining a decoder group..." no longer exists in previous claim 5, and the feature "determining a decoder group... comprises: sequentially determining a decoder group allocated" no longer exists in the previous claim 6. Accordingly, this issue in the paragraph 30 of the Office Action has been overcome. In addition, Applicant has moved the limitations of claim 6 to new claim 25. New claim 25 is dependent on claim 7, and claim 7 does not recite "allocating a decoder group...comprises:.." but instead receites "allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding comprises." Thus, it can be understood therefrom that the overall allocating operation of allocating the plurality of instruction groups to the plurality of decoder groups can include the allocation of certain instruction groups and the determination of certain instruction groups, and there is no conflict. Moreover, in new claim 25, the phrase "sequentially determining a decoder group to be allocated for" is used to replace the previous terms "sequentially determining a decoder group allocated for", from which it is clearly apparent that, for a target instruction group, the determining operation occurs at least before the allocated action. Therefore, the new claim 25 is clear.’
However, claim 25 as amended does not appear to recite "sequentially determining a decoder group to be allocated for".
Applicant on page 13 argues: ‘To address paragraphs 31-32, because Applicant has cancelled claim 12, the rejections regarding the claim 12 in the paragraph 31-32 of the Office Action have been addressed, and Applicant respectfully requests withdrawal of the rejections.’
In view of the aforementioned claim cancellations, the associated previously presented rejections are withdrawn.
Applicant on page 13 argues: ‘To address paragraph 51, Applicant amends the feature "a corresponding switch tag" of claim 15 to the new feature "the corresponding one of the at least one switch tag", which makes this element of claim 15 definite.’
In view of the aforementioned amendment, the associated previously presented rejection is withdrawn.
Applicant on page 13 argues: ‘To address paragraphs 36 and 52, Applicant has deleted "each of the plurality of decoder groups is configured to decode allocated instructions to obtain micro-ops as decoded micro-ops" from claim 15, which makes claims 15 and 20 definite.’
In view of the aforementioned amendments, the associated previously presented rejections are withdrawn.
Applicant on page 14 argues: ‘To address paragraphs 53-54, Applicant amends the feature "the at least one switch tag attached to the target micro-op" of claim 20 to the new feature "the corresponding one of the at least one switch tag attached to the target micro-op", which makes the claim 20 definite.’
In view of the aforementioned amendments, the associated previously presented rejections are withdrawn.
Applicant on page 14 argues: ‘To address paragraphs 55-56, Applicant amends the feature "each of the plurality of decoder groups is further configured to save decoded micro-ops into a corresponding micro-op queue" of claim 20 to the new feature "micro-ops obtained as decoded by respective decoder groups are saved into corresponding micro-op queues", amends the feature "micro-op queues respectively corresponding to the plurality of decoder groups" of claim 20 to the new feature "the corresponding micro-op queues corresponding to the respective decoder groups", and amends the feature "according to the at least one switch tag" of claim 20 to the new feature "according to the corresponding one of the at least one switch tag". Thus, the amended claim 20 is clear.’
In view of the aforementioned amendments, the associated previously presented rejections are withdrawn.
Applicant on page 14 argues: ‘To address paragraphs 57-58, because Applicant deletes the claim 21, Applicant submits that the rejections regarding the claim 21 in the paragraphs 57-58 of the Office Action have been addressed and respectfully requests withdrawal of the rejections.’
In view of the aforementioned amendments, the associated previously presented rejections are withdrawn.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/KEITH E VICARY/ Primary Examiner, Art Unit 2183
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