DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on February 19, 2026, has been entered.
Claims 1-8, 10-12, 15-16, 20-21, and 23-24 are pending in this office action and presented for examination. Claims 1-2, 4-8, 10-12, 15-16, and 20-21 are newly amended by the response received February 19, 2026.
Claim Objections
Claims 1-8 and 10-12 are objected to because of the following informalities. Appropriate correction is required.
Claim 1 recites the limitation “output” in line 16; however, this verb does not appear to match the tense of the other steps of the claim.
Claims 2-8 and 10-12 are objected to for failing to alleviate the objection of claim 1 above.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 11-12 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claim 11 recites the limitation “in a case where a read micro-op as the target micro-op is attached with the corresponding one of the at least one switch tag, determining a next micro-op queue to be switched to for micro-op reading, according to the corresponding one of the at least one switch tag attached to the read micro-op, until the micro-ops saved in the corresponding micro-op queues of the respective decoder groups are read completely” in lines 8-12. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., FIG. 6) does not appear to provide support for determining a next micro-op queue to be switched to for micro-op reading, according to “the corresponding one of the at least one switch tag attached to the read micro-op”, “until the micro-ops saved in the corresponding micro-op queues of the respective decoder groups are read completely”. In other words, the original disclosure does not appear to provide support for a particular switch tag, after being used to determine a next micro-op queue to be switched to, still being used to determining a next micro-op queue to be switched to for micro-op reading until the micro-ops saved in the corresponding micro-op queues of the respective decoder groups are read completely.
Claim 12 is rejected for failing to alleviate the rejection of claim 11 above. Note that similar language is recited in claim 12, lines 1-5.
Claim 12 recites the limitation “sequentially switching the corresponding micro-op queues for micro-op reading, from the corresponding micro-op queues of the respective decoder groups in an order of the corresponding micro-op queues, according to the corresponding one of the at least one switch tag attached to the read micro-op” in lines 6-10. However, the original disclosure does not appear to provide support for this limitation. For example, the original disclosure (e.g., FIG. 6) does not appear to provide support for “sequentially switching the corresponding micro-op queues for micro-op reading, from the corresponding micro-op queues of the respective decoder groups in an order of the corresponding micro-op queue,” according to a particular one of the at least one switch tag attached to the read micro-op.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-8, 10-12, 15-16, 20-21 and 23-24 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites the limitation “the instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request” in lines 8-9. However, the metes and bounds of this limitation are indefinite. For example, the antecedent basis for this limitation is unclear. For example, an “instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request” was not previously recited. For example, it is unclear as to which (if any) instruction position, of the instruction position(s) implicitly recited via the language in claim 1, lines 4-5 (“each of the at least one switch tag at least indicates an instruction position for performing decoder group switch”), is intended to provide antecedent basis for the instruction position of the aforementioned limitation of claim 1, lines 8-9. Note that this limitation is also recited in claim 2, lines 3-4. Note that the limitation “the instruction position indicated by the at least one switch tag” is recited in claim 2, lines 5-6.
Claim 1 recites the limitation “the instruction position” in lines 10-11. However, it is indefinite as to whether the antecedent basis for this limitation is an instruction position of the instruction position(s) implicitly recited via the language in claim 1, lines 4-5 (“each of the at least one switch tag at least indicates an instruction position for performing decoder group switch”), an “instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request” in lines 8-9, or something else. Note that this limitation is also recited in claim 1, line 13; claim 3, line 3; claim 3, line 4; claim 4, line 2; and claim 4, lines 4-5.
Claim 1 recites the limitation “micro-ops obtained as decoded by the plurality of decoder groups are configured to be saved to a micro-op cache; and in response to the micro-ops being obtained through searching by the micro-op cache, output a micro-op corresponding to the instruction fetching request from the micro-op cache, in a case where the instruction fetching request is hit in the micro-op cache” in lines 13-19. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to what is means to obtain micro-ops through searching by the micro-op cache, given that the aforementioned micro-ops were previously obtained by the micro-op cache, and given that the recited outputting a micro-op appears to be a distinct step that is in response to the aforementioned obtaining micro-ops through searching.
Claim 1 recites the limitation “last instruction” in line 28. However, it is indefinite as to whether “last” is to be interpreted via the definition “following all the rest” or “most recent” or something else. Note that this limitation is also recited in claim 7, lines 7-8; claim 7, line 12; claim 7, lines 13-14; and claim 7, line 18.
Claims 2-8 and 10-12 are rejected for failing to alleviate the rejections of claim 1 above.
Claim 2 recites the limitation “The decoding method according to claim 1, wherein the instruction position is an end position of the target instruction; and the determining, in the instruction stream, the instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request is: determining the end position of the target instruction in the instruction stream according to the instruction position indicated by the at least one switch tag carried by the instruction fetching request” in lines 1-7. However, the metes and bounds of this limitation are indefinite. For example, claim 1 recites “the target instruction is an instruction corresponding to the instruction position” in lines 12-13, and it is unclear as to how claim 2’s recitation that “the instruction position is an end position of the target instruction” further limits the aforementioned subject matter of claim 1, and unclear as to what it means for the instruction position to be an “end position”. For example, it is unclear as to what it means for determining the instruction position to entail “determining … according to the instruction position”; it is unclear as to whether the instruction position is an input to or an output of the recited determining.
Claim 4 recites the limitation “the target instruction that serves as a boundary in two adjacent instruction groups is grouped into a previous instruction group” in lines 5-7. However, it is indefinite as to how a target instruction that is grouped “into” a previous instruction group can nevertheless be “in” two adjacent instruction groups.
Claim 4 recites the limitation “a decoder group for a next instruction” in line 10. However, it is indefinite as to whether this decoder group is the same as, or different from, “a decoder group” as recited in claim 1, lines 27-28. Note that this limitation is also recited claim 5, line 5. Note that “the decoder group allocated for the next instruction group” is recited in claim 4, line 14; and claim 5, lines 9-10. Note that “the decoder group for the next instruction group” is recited in claim 5, line 19.
Claim 4 recites the limitation “a decoder group allocated for the previous instruction group” in line 13. However, it is indefinite as to whether this decoder group is the same as, or different from, “a decoder group” as recited in claim 1, line 28. Note that this limitation is also recited in claim 5, lines 8-9. Note that the limitation “the decoder group allocated for the previous instruction group” is recited in claim 5, lines 11-12; claim 5, lines 18-19; and claim 6, lines 2-3.
Claims 5-7 are rejected for failing to alleviate the rejections of claim 4 above.
Claim 5 recites the limitation “a first instruction group” in line 3. However, it is indefinite as to whether this first instruction group is the same as, or different from “a previous instruction group” as recited in claim 4, lines 6-7.
Claim 5 recites the limitation “a default decoder group” in lines 4-5. However, it is indefinite as to whether this default decoder group is the same as, or different from, “a decoder group allocated for the previous instruction group” in claim 4, line 13.
Claim 5 recites the limitation “a decoder group” in line 11. However, it is indefinite as to whether this decoder group is the same as, or different from, “a decoder group for a next instruction group” as recited in claim 4, line 10. Note that this limitation is also recited in claim 6, line 2.
Claim 5 recite the limitation “the allocating a decoder group for a next instruction group according to a switch tag corresponding to the target instruction grouped into the previous instruction group, the switch tag corresponding to the target instruction being same as the corresponding one of the at least one switch tag, and a decoder group allocated for the previous instruction group being different from the decoder group allocated for the next instruction group, comprises: determining a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups, according to the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 5-15. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to how allocating a decoder group for a next instruction group can itself comprise determining a decoder group for “each of” non-first instruction groups. In other words, it is indefinite as to how allocating one decoder group for one instruction group can itself comprise allocating/determining multiple decoder groups for multiple instruction groups. Note that lines 11-15 of the aforementioned limitation in claim 5 are recited in claim 6, lines 1-6. Note that lines 12-15 of the aforementioned limitation in claim 5 are effectively recited in claim 6, lines 9-12.
Claim 5 recites the limitation “determining a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups” in lines 11-13. Claim 3, upon which claim 5 is indirectly dependent, recites the limitation “splitting the instruction stream according to the instruction position to obtain a plurality of instruction groups, and allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding” in lines 4-6. However, it is indefinite as to how an instruction stream, when split according to the instruction position (i.e., one boundary), results in more than two instruction groups (e.g., a previous instruction group and multiple non-first instruction groups). Note that this limitation is also recited in claim 6, lines 1-4. Note that a portion of this limitation is recited in claim 6, lines 11-12.
Claim 5 recites the limitation “the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 13-15. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 6, lines 4-6, and, with minor differences, recited in claim 6, lines 9-11.
Claim 5 recites the limitation “the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 13-15. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 6, lines 5-6. Note that this limitation is also recited in claim 6, lines 4-6, and, with minor differences, recited in claim 6, lines 9-11.
Claim 5 recites the limitation “the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 13-15. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 6, lines 5-6. Note that this limitation is also recited in claim 6, lines 4-6, and, with minor differences, recited in claim 6, lines 9-11.
Claim 5 recites the limitation “determining a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups, according to the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 11-15. It is indefinite as to whether a decoder group is determined for each of non-first instruction groups according to a same switch tag corresponding to a same target instruction grouped into a same previous instruction group which precedes each of the non-first instruction groups, or whether another interpretation is intended. Note that this limitation is also recited in claim 6, lines 1-6. Note that a portion of this limitation is recited in claim 6, lines 9-12.
Claim 5 recites the limitation “the decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group” in lines 18-19. However, it is indefinite as to which decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, of “a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups” (i.e., multiple decoder groups), the aforementioned limitation has antecedent basis to.
Claims 6-7 are rejected for failing to alleviate the rejections of claim 5 above.
Claim 6 recites “determining a decoder group …. comprises: sequentially determining a decoder group allocated” in lines 1-7. Claim 5, upon which claim 6 is dependent, recites the limitation “allocating a decoder group …. comprises: determining a decoder group” in lines 5-11. Therefore, it is indefinite as to whether allocation entails determining, or determining occurs after allocation.
Claim 12 recites the limitation “the case where the read micro-op as the target micro-op is attached with the at least one switch tag” in lines 2-3. However, there is insufficient antecedent basis for this limitation in the claims, and it is further indefinite as to whether the language of this limitation is intended to match the language of claim 11, lines 8-9.
Claim 12 recites the limitation “sequentially switching the corresponding micro-op queues for micro-op reading, from the corresponding micro-op queues of the respective decoder groups in an order of the corresponding micro-op queues, according to the corresponding one of the at least one switch tag attached to the read micro-op” in lines 6-10. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to what it means to “switch the corresponding micro-op queues … from the corresponding micro-op queues”.
Claim 15 recites the limitation “the instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request” in lines 7-9. However, the metes and bounds of this limitation are indefinite. For example, the antecedent basis for this limitation is unclear. For example, an “instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request” was not previously recited. For example, it is unclear as to which (if any) instruction position, of the instruction position(s) implicitly recited via the language in claim 15, lines 3-4 (“each of the at least one switch tag at least indicates an instruction position for performing decoder group switch”), is intended to provide antecedent basis for the instruction position of the aforementioned limitation of claim 15, lines 7-9. Note that this limitation is also recited in claim 16, lines 2-4. Note that the limitation “the instruction position indicated by the at least one switch tag” is recited in claim 16, lines 6-7.
Claim 15 recites the limitation “the instruction position” in line 12. However, it is indefinite as to whether the antecedent basis for this limitation is an instruction position of the instruction position(s) implicitly recited via the language in claim 15, lines 3-4 (“each of the at least one switch tag at least indicates an instruction position for performing decoder group switch”), an “instruction position for performing decoder group switch according to the at least one switch tag carried by the instruction fetching request” in lines 7-9, or something else. Note that this limitation is also recited in claim 15, line 19; claim 15, line 27; claim 15, line 30; claim 15, lines 33-34; and claim 15, line 38.
Claim 15 recites the limitation “micro-ops obtained as decoded by the plurality of decoder groups are configured to be saved to the micro-op cache; the micro-op cache is configured to output a micro-op corresponding to the instruction fetching request, in response to the micro-ops being obtained through searching by the micro-op cache, in a case where the instruction fetching request is hit in the micro-op cache” in lines 20-24. However, the metes and bounds of this limitation are indefinite. For example, it is unclear as to what is means to obtain micro-ops through searching by the micro-op cache, given that the aforementioned micro-ops were previously obtained by the micro-op cache, and given that the recited outputting a micro-op appears to be a distinct step that is in response to the aforementioned obtaining micro-ops through searching.
Claim 15 recites the limitation “the micro-ops” in line 23. However, it is indefinite as to whether the antecedent basis for this limitation is “micro-ops” in claim 15, line 16, or “micro-ops” in claim 15, line 20.
Claim 15 recites the limitation “last instruction” in line 71. However, it is indefinite as to whether “last” is to be interpreted via the definition “following all the rest” or “most recent” or something else.
Claim 15 recites the limitation “the target instruction that serves as a boundary in two adjacent instruction groups is grouped into a previous instruction group” in lines 39-40. However, it is indefinite as to how a target instruction that is grouped “into” a previous instruction group can nevertheless be “in” two adjacent instruction groups.
Claim 15 recites the limitation “a decoder group for a next instruction” in lines 41-42. However, it is indefinite as to whether this decoder group is the same as, or different from, “a decoder group” as recited in claim 15, line 70. Note that this limitation is also recited claim 15, line 50. Note that “the decoder group allocated for the next instruction group” is recited in claim 15, lines 45-46; claim 15, line 53. Note that “the decoder group for the next instruction group” is recited in claim 15, lines 62-63.
Claim 15 recites the limitation “a decoder group allocated for the previous instruction group” in lines 44-45. However, it is indefinite as to whether this decoder group is the same as, or different from, “a decoder group” as recited in claim 15, line 71. Note that this limitation is also recited in claim 15, line 52. Note that the limitation “the decoder group allocated for the previous instruction group” is recited in claim 15, lines 55-56; and claim 15, line 62.
Claim 15 recites the limitation “a first instruction group” in line 48. However, it is indefinite as to whether this first instruction group is the same as, or different from “a previous instruction group” as recited in claim 15, line 40.
Claim 15 recites the limitation “a default decoder group” in line 49. However, it is indefinite as to whether this default decoder group is the same as, or different from, “a decoder group allocated for the previous instruction group” in claim 15, lines 44-45.
Claim 15 recites the limitation “a decoder group” in line 54. However, it is indefinite as to whether this decoder group is the same as, or different from, “a decoder group for a next instruction group” as recited in claim 15, lines 41-42.
Claim 15 recite the limitation “allocating, by the instruction allocating circuit, a decoder group for a next instruction group according to a switch tag corresponding to the target instruction grouped into the previous instruction group, and a decoder group allocated for the previous instruction group being different from the decoder group allocated for the next instruction group, comprises: determining, by the instruction allocating circuit, a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups, according to the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 50-59. However, the metes and bounds of this limitation are indefinite. For example, it is indefinite as to how allocating a decoder group for a next instruction group can itself comprise determining a decoder group for “each of” non-first instruction groups. In other words, it is indefinite as to how allocating one decoder group for one instruction group can itself comprise allocating/determining multiple decoder groups for multiple instruction groups.
Claim 15 recites the limitation “determining, by the instruction allocating circuit, a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups” in lines 54-57. Claim 15 also recites the limitation “splitting, by the instruction allocating circuit, the instruction stream according to the instruction position to obtain a plurality of instruction groups, and allocating the plurality of instruction groups to the plurality of decoder groups for parallel decoding” in lines 29-32. However, it is indefinite as to how an instruction stream, when split according to the instruction position (i.e., one boundary), results in more than two instruction groups (e.g., a previous instruction group and multiple non-first instruction groups).
Claim 15 recites the limitation “the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 57-59. However, there is insufficient antecedent basis for this limitation in the claims.
Claim 15 recites the limitation “the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 57-59. However, there is insufficient antecedent basis for this limitation in the claims.
Claim 15 recites the limitation “the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 58-59. However, there is insufficient antecedent basis for this limitation in the claims.
Claim 15 recites the limitation “determining, by the instruction allocating circuit, a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups, according to the switch tag corresponding to the target instruction grouped into the previous instruction group preceding a corresponding non-first instruction group in the non-first instruction groups” in lines 54-59. It is indefinite as to whether a decoder group is determined for each of non-first instruction groups according to a same switch tag corresponding to a same target instruction grouped into a same previous instruction group which precedes each of the non-first instruction groups, or whether another interpretation is intended.
Claim 15 recites the limitation “the decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group” in lines 61-62. However, it is indefinite as to which decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, of “a decoder group from the plurality of decoder groups that is different from the decoder group allocated for the previous instruction group, for each of non-first instruction groups among the plurality of instruction groups” (i.e., multiple decoder groups), the aforementioned limitation has antecedent basis to.
Claim 15 recites the limitation “a corresponding switch tag” in line 72. However, it is indefinite as to whether this corresponding switch tag is the same as, or different from, “a corresponding one of the at least one switch tag” as recited in claim 15, lines 13-14.
Claims 16, 20-21 and 23-24 are rejected for failing to alleviate the rejections of claim 15 above.
Claim 20 recites the limitation “the micro-ops obtained as decoded by the plurality of decoder groups” in lines 2-3. However, it is indefinite as to whether the antecedent basis for this limitation is in the limitation “each of the plurality of decoder groups is configured to decode allocated instructions to obtain micro-ops as decoded micro-ops” in claim 15, lines 15-16, or “micro-ops obtained as decoded by the plurality of decoder groups” in claim 15, line 20. Note that this limitation is also recited in claim 20, lines 10-11; and claim 20, line 14.
Claim 20 recites the limitation “the at least one switch tag attached to the target micro-op” in lines 3-4. However, there is insufficient antecedent basis for this limitation in the claims. Note that this limitation is also recited in claim 20, line 16.
Claim 20 recites the limitation “merging, by the merging circuit, the micro-ops obtained as decoded by the plurality of decoder groups, in the decoder mode, according to the corresponding one of the at least one switch tag attached to the target micro-op, to obtain micro-ops corresponding to an instruction fetching order, is” in lines 10-13. However, it is indefinite as to whether this limitation is intended to further limit the limitation “merge the micro-ops obtained as decoded by the plurality of decoder groups, in the decoder mode, according to the ‘corresponding one of the’ at least one switch tag attached to the target micro-op, to obtain micro-ops corresponding to an instruction fetching order” in claim 20, lines 2-5.
Claim 20 recites the limitation “micro-op queues respectively corresponding to the plurality of decoder groups” in lines 15-16. However, it is indefinite as to whether the aforementioned micro-op queues are the same as, or different from, the micro-op queues of the limitation “each of the plurality of decoder groups is further configured to save decoded micro-ops into a corresponding micro-op queue” in claim 20, lines 7-9.
Claim 20 recites the limitation “merging, by the merging circuit, the micro-ops obtained as decoded by the plurality of decoder groups, in the decoder mode, according to the corresponding one of the at least one switch tag attached to the target micro-op, to obtain micro-ops corresponding to an instruction fetching order, is: merging the micro-ops obtained as decoded by the plurality of decoder groups in a switched manner between micro-op queues respectively corresponding to the plurality of decoder groups, according to the at least one switch tag attached to the target micro-op, to obtain the micro-ops corresponding to the instruction fetching order” in lines 10-17. However, it is indefinite as to how merging according to “the corresponding one of the at least one switch tag” can be merging according to “the at least one switch tag”, in the scenario in which “at least one” is “more than one”.
Claim 21 is rejected for failing to alleviate the rejections of claim 20 above.
Claim 21 recites the limitation “a default decoder group” in line 3. However, it is indefinite as to whether this default decoder group is the same as, or different from, “a default decoder group” of claim 15, line 49.
Claim 21 recites the limitation “the decoded micro-ops” in line 5. However, it is indefinite as to whether the antecedent basis for this limitation is “decoded micro-ops” in claim 15, line 16, or “decoded micro-ops” in claim 20, line 8.
Response to Arguments
Applicant on page 12 argues: “In Applicant's after-final response filed January 23, 2026, Applicant amended Figures 5A, 5B and 6 have been amended as required in the Office Action. In Figure 6, the height of the numbers and letters for the amended drawings meets requirements. The lines of Figures 5A and 5B also meet all requirements.”
In view of the replacement drawings received March 4, 2026, the previously presented objections to the drawings are withdrawn.
Applicant on page 13 argues: “Applicant respectfully submits that the objections to the drawings have been addressed and respectfully requests withdrawal of the claim objections.”
In view of associated amendments, the previously presented objections to the claims are withdrawn.
Applicant on page 14 argues: “Therefore, Applicant submits that the rejections regarding claims 15 and 20 under 35 U.S.C. §112 (pre-AIA ), 35 U.S.C. §112(f) have been addressed and respectfully requests withdrawal of the rejections.”
In view of associated amendments, previously presented rejections under 35 U.S.C. 112(a) and 35 U.S.C. 112(b) that were based upon interpretation under 35 U.S.C. §112(f) are withdrawn.
Applicant on page 18 argues: “Based on the above, Applicant submits that the rejections regarding 1-8, 10-12, 15-16, 20- 21 and 23-24 under 35 U.S.C.§112 (pre-AIA ), 35 U.S.C. §112(b) have been addressed and respectfully requests withdrawal of the rejections.”
Various previously presented rejections of the claims under 35 U.S.C. §112(b) are withdrawn in view of the amendments to the claims. However, other previously presented rejections of the claims under 35 U.S.C. §112(b) remain applicable, and in various cases the amendments to the claims introduce additional issues under 35 U.S.C. §112(b) — see the Claim Rejections - 35 USC § 112 section above.
Conclusion
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/KEITH E VICARY/ Primary Examiner, Art Unit 2183
Prosecution Insights