Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-19 are pending
Claims 20-31 are withdrawn due to restriction.
Election/Restrictions
Applicant’s election without traverse of Group I, claims 1-19 in the reply filed on 07/07/2026 is acknowledged.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 9 is rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter that the inventor or a joint inventor regards as the invention.
Claim 9 recites “the bias frequency is about 400 kHz.” However, claim 1, from which claim 9 depends, does not previously recite a bias frequency. Although claim 1 recites that “the substrate is biased,” claim 1 does not expressly identify a frequency associated with the substrate bias. Therefore, there is insufficient antecedent basis for “the bias frequency,” and the metes and bounds of claim 9 are unclear.
For purposes of examination and to advance prosecution, “the bias frequency” is interpreted as the frequency at which the substrate is biased.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-3, 7-8, 10-12, and 17-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Briggs et al. (US 9,673,058 B1).
Regarding claim 1, Briggs teaches a method of etching a feature in a substrate while fabricating an electronic device (Briggs teaches forming semiconductor devices on a semiconductor wafer, and more specifically etching a dielectric layer during the formation of memory, including etching layers to form memory holes or lines; column 1, lines 7–12).
Briggs teaches receiving the substrate on a substrate support in a reaction chamber (Briggs teaches an etch reactor 300 having an electrostatic chuck 308 within etch chamber 349, wherein substrate 204 is positioned on top of electrostatic chuck 308; column 2, lines 40–49).
Briggs teaches the substrate comprising a silicon and oxygen containing material under a mask layer having a pattern thereon (Briggs teaches silicon oxide-containing etch layer 208 disposed below patterned mask 212, wherein patterned mask 212 provides mask features 216 for high-aspect-ratio contacts; column 2, lines 22–39).
Briggs teaches exposing the substrate to a plasma in the reaction chamber to thereby etch the feature in the silicon and oxygen containing material (Briggs teaches forming the etch gas into a plasma and exposing silicon oxide-containing etch layer 208 to the plasma to etch contacts into the silicon oxide-containing etch layer; column 3, line 63 through column 4, line 16; see also column 4, lines 22–27).
Briggs teaches wherein the plasma is generated from a plasma generating gas comprising a metal containing gas, one or more fluorocarbons, and oxygen (Briggs teaches an etch gas comprising 0.1–5 sccm tungsten hexafluoride, 30–100 sccm C₄F₆ and/or C₄F₈, and 30–150 sccm oxygen, wherein tungsten hexafluoride is a metal-containing gas and C₄F₆ and C₄F₈ are fluorocarbons; column 3, line 63 through column 4, line 4).
Briggs teaches wherein the plasma is a capacitively-coupled plasma and the substrate is biased (Briggs teaches that the process chamber may be a capacitively coupled plasma reactor and that electrostatic chuck 308 may provide a bias from electrostatic chuck source 348; column 2, lines 45–50; column 3, lines 10–13).
Briggs teaches wherein the capacitively coupled plasma is generated at an excitation frequency between about 13-169 MHz at an RF power level of about 9 kW or less per substrate (Briggs teaches generating the plasma using an excitation radio-frequency power having a frequency of 60 MHz at 200–4000 watts, wherein 60 MHz falls within the claimed frequency range and 200–4000 watts (0.2–4 kilowatts) is within the range of about 9 kilowatts or less per substrate; column 4, lines 4–7).
Regarding claim 2, Briggs teaches wherein, while exposing the substrate to the plasma, the substrate is biased at a bias frequency between about 50 kHz and 10 MHz at an RF power level of about 40 kW or less per substrate (Briggs teaches providing a high substrate bias using a radio-frequency power having a frequency of 2 MHz at 2000 to 12,000 watts, wherein 2 MHz falls within the claimed frequency range and 2000 to 12,000 watts, or 2 to 12 kilowatts, is within the claimed range of about 40 kilowatts or less per substrate; column 4, lines 4–15).
Regarding claim 3, Briggs teaches wherein the capacitively coupled plasma is generated at an RF power level of about 0.2 kW or less per substrate (Briggs teaches generating the plasma using an excitation radio-frequency power of 200 to 4000 watts, wherein the disclosed lower endpoint of 200 watts is 0.2 kilowatts; column 4, lines 4–7).
Regarding claim 7, Briggs teaches wherein the plasma generating gas comprises about 0.01 to 10% by volume of a metal halide (Briggs teaches an etch gas comprising 0.1 to 5 sccm tungsten hexafluoride, 30 to 100 sccm C₄F₆ and/or C₄F₈, 0 to 25 sccm NF₃, and 30 to 150 sccm O₂, wherein tungsten hexafluoride is a metal halide; column 3, line 63 through column 4, line 4). For example, using disclosed flow rates of 5 sccm tungsten hexafluoride, 30 sccm fluorocarbon, 0 sccm NF₃, and 30 sccm O₂ results in a tungsten hexafluoride concentration of about 7.7% by volume, which falls within the claimed range.
Regarding claim 8, Briggs teaches wherein the plasma generating gas comprises C₄F₈ (Briggs teaches an etch gas comprising 30 to 100 sccm C₄F₆ and/or C₄F₈; column 3, line 63 through column 4, line 4).
Regarding claim 10, Briggs teaches wherein the substrate support is maintained at a temperature of about -100°C to 150°C while the substrate is exposed to the plasma (Briggs teaches an electrostatic chuck temperature controller connected to electrostatic chuck 308 to provide temperature control and teaches maintaining the substrate at a temperature of 10°C to 80°C while the silicon oxide-containing etch layer is exposed to the plasma, wherein 10°C to 80°C falls within the claimed range; column 2, lines 53–58; column 4, lines 4–15).
Regarding claim 11, Briggs teaches wherein the silicon and oxygen containing material comprises a silicon oxide (Briggs teaches silicon oxide-containing etch layer 208 disposed below patterned mask 212; column 2, lines 22–39).
Regarding claim 12, Briggs teaches wherein the mask layer comprises carbon, poly silicon, silicon nitride, silicon oxynitride, or any combination thereof (Briggs teaches patterned mask 212 comprising amorphous carbon or polysilicon; column 2, lines 22–39).
Regarding claim 17, Briggs teaches wherein the metal-containing gas comprises a metal fluoride (Briggs teaches tungsten hexafluoride as the metal-containing gas used in the plasma generating gas; column 3, line 63 through column 4, line 4).
Regarding claim 18, Briggs teaches wherein the metal fluoride comprises rhenium hexafluoride, tungsten hexafluoride, molybdenum hexafluoride, tantalum pentafluoride, vanadium pentafluoride, or any combination thereof (Briggs teaches tungsten hexafluoride; column 3, line 63 through column 4, line 4).
Regarding claim 19, Briggs teaches wherein the electronic device comprises a memory device (Briggs teaches etching a dielectric layer during the formation of memory, including etching layers to form memory holes or lines; column 1, lines 7–12). Briggs further teaches silicon oxide and silicon nitride ONON layers used for memory devices such as V-NAND memory and silicon oxide and polysilicon OPOP layers used for 3D memory devices (column 5, lines 39–59).
Claim Rejections - 35 USC § 103
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 5, 6, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Briggs et al., as applied to claim 1 above, and further in view of Nagatomo et al. (U.S 2019/0074191 A1).
Regarding claim 5, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the substrate is biased at an RF power level of about 0.5 kW or less per substrate.
Nagatomo teaches wherein the substrate is biased at an RF power level of about 0.5 kW or less per substrate (Nagatomo teaches a second radio frequency power supply configured to generate radio frequency power for ion attraction into processing target object W, which corresponds to the claimed substrate bias, and teaches supplying the second radio frequency power to lower electrode 18 while etching silicon-containing film SF, wherein the second radio frequency power may be set within a range of 0 to 15,000 watts, which overlaps and encompasses bias power levels of about 500 watts or less; paragraphs [0046], [0061]-[0062]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to operate the substrate bias at a power level of about 0.5 kW or less because Nagatomo teaches that substrate-bias power is supplied to the lower electrode for ion attraction during plasma etching of a silicon-containing film and may be selected from a range encompassing the claimed power level. Selecting a bias power within Nagatomo’s disclosed range would have been a routine selection of a workable operating condition for controlling ion attraction toward the substrate during plasma etching, with a reasonable expectation of successfully etching the silicon-containing material. See MPEP § 2144.05.
Regarding claim 6, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the substrate is biased at an RF power level of about 0.3 kW or less per substrate.
Nagatomo teaches wherein the substrate is biased at an RF power level of about 0.3 kW or less per substrate (Nagatomo teaches a second radio frequency power supply configured to generate radio frequency power for ion attraction into processing target object W, which corresponds to the claimed substrate bias, and teaches supplying the second radio frequency power to lower electrode 18 while etching silicon-containing film SF, wherein the second radio frequency power may be set within a range of 0 to 15,000 watts, which overlaps and encompasses bias power levels of about 300 watts or less; paragraphs [0046], [0061]-[0062]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to operate the substrate bias at a power level of about 0.3 kW or less because Nagatomo teaches that substrate-bias power is supplied to the lower electrode for ion attraction during plasma etching of a silicon-containing film and may be selected from a range encompassing the claimed power level. Selecting a bias power within Nagatomo’s disclosed range would have been a routine selection of a workable operating condition for controlling ion attraction toward the substrate during plasma etching, with a reasonable expectation of successfully etching the silicon-containing material. See MPEP § 2144.05.
Regarding claim 9, Briggs teaches the limitations of claim 1 as discussed above. Briggs further teaches wherein the excitation frequency is about 60 MHz (Briggs teaches generating the plasma using an excitation radio frequency having a frequency of 60 MHz; column 4, lines 4-7). Briggs does not expressly teach wherein the bias frequency is about 400 kHz.
Nagatomo teaches wherein the bias frequency is about 400 kHz (Nagatomo teaches a second radio frequency power supply configured to generate radio frequency power for ion attraction into processing target object W, which corresponds to the claimed substrate bias, wherein the frequency of the second radio frequency power is within a range of 400 kHz to 13.56 MHz and the second radio frequency power is supplied to lower electrode 18 while etching silicon-containing film SF; paragraphs [0046], [0061]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to use a bias frequency of about 400 kHz because Nagatomo teaches 400 kHz as a suitable substrate-bias frequency for attracting ions toward a processing target object during plasma etching of a silicon-containing film. Applying Nagatomo’s disclosed bias frequency of about 400 kHz to Briggs’ plasma etching method would have predictably provided ion attraction toward the substrate during etching. See MPEP §§ 2141 III(C) and 2144.05.
Claims 4, 13, and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Briggs et al., as applied to claim 1 above, and further in view of Dole et al. (US 2020/0126804 A1, hereinafter Dole ’804).
Regarding claim 4, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the capacitively coupled plasma is generated at an RF power level of about 0.1 kW or less per substrate.
Dole ’804 teaches wherein the capacitively coupled plasma is generated at an RF power level of about 0.1 kW or less per substrate (Dole ’804 teaches generating a capacitively coupled plasma at a power level between about 0 watts and 6.3 kilowatts per 300 millimeter substrate; paragraphs [0005] and [0025]-[0033]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to generate the capacitively coupled plasma at an RF power level of about 0.1 kW or less per substrate because Dole ’804 teaches that plasma-generation power may be selected from a range encompassing the claimed power level for substantially similar etching of dielectric material using tungsten hexafluoride, fluorocarbon, and oxidant plasma chemistry. Selecting a plasma-generation power within Dole ’804’s disclosed range would have been a routine selection of a workable operating condition, with a reasonable expectation of successfully generating the plasma and etching the dielectric material. See MPEP § 2144.05.
Regarding claim 13, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the feature has a critical dimension of about 200 nm or less in at least 1 direction.
Dole ’804 teaches wherein the feature has a critical dimension of about 200 nm or less in at least 1 direction (Dole ’804 teaches high aspect ratio feature 102 having a width or diameter between about 50 nanometers and 150 nanometers, for example between about 60 nanometers and 110 nanometers, and in some cases having a width of about 100 nanometers or less, wherein the disclosed width or diameter corresponds to a critical dimension in at least one direction; paragraph [0002] and [0016]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to etch a feature having a critical dimension of about 200 nm or less in at least 1 direction because Dole ’804 teaches such dimensions for high aspect ratio features etched into silicon-oxide-containing dielectric stacks during fabrication of a 3D NAND device. Using Dole ’804’s disclosed feature dimensions in Briggs’ dielectric-etching method would have predictably produced features suitable for increasingly small semiconductor memory-device structures. See MPEP § 2144.05.
Regarding claim 14, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the etching produces a plurality of features having a feature density of about 1/200 nm⁻¹ or greater in at least 1 direction.
Dole ’804 teaches wherein the etching produces a plurality of features having a feature density of about 1/200 nm⁻¹ or greater in at least 1 direction (Dole ’804 teaches a plurality of adjacent high aspect ratio features having a pitch between about 100 nanometers and 200 nanometers, for example between about 120 nanometers and 170 nanometers; paragraph [0016]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to form a plurality of features having a feature density of about 1/200 nm⁻¹ or greater in at least 1 direction because Dole ’804 teaches arranging adjacent high aspect ratio features at pitches of about 100–200 nanometers in a dielectric stack during fabrication of a 3D NAND device. A pitch of 200 nanometers corresponds to a linear feature density of 1/200 nm⁻¹, and a pitch below 200 nanometers corresponds to a linear feature density greater than 1/200 nm⁻¹. Applying Dole ’804’s disclosed feature spacing to Briggs’ dielectric-etching method would have predictably provided the feature density used for densely arranged memory-device structures. See MPEP § 2144.05.
Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Briggs et al. (U.S. Patent No. 9,673,058 B1), as applied to claim 1 above, and further in view of Dole et al. (US 2019/0393047 A1, hereinafter Dole ’047).
Regarding claim 15, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the feature is etched with a selectivity of the silicon and oxygen containing material to the mask of at least about 0.3.
Dole ’047 teaches wherein the feature is etched with a selectivity of the silicon and oxygen containing material to the mask of at least about 0.3 (Dole ’047 teaches a selectivity of at least about 3.0, defined as the etch rate of silicon oxide divided by the etch rate of the mask layer, wherein the mask layer comprises polysilicon; paragraph [0008]; see also paragraph [0035] and [0078]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to provide a selectivity of the silicon and oxygen containing material to the mask of at least about 0.3 because Dole ’047 teaches that increasing the selectivity of a silicon-oxide etch relative to a mask permits deeper features to be etched without increasing mask thickness and expressly achieves selectivity values well above the claimed threshold using tungsten hexafluoride-containing plasma etch chemistry. Applying Dole ’047’s high-selectivity etching conditions to Briggs’ closely related silicon-oxide etching method would have predictably preserved the mask relative to the silicon oxide while allowing continued feature etching. See MPEP § 2144.05.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Briggs et al. as applied to claim 1 above, and further in view of Shamma et al. (US 2016/0179005 A1).
Regarding claim 16, Briggs teaches the limitations of claim 1 as discussed above. Briggs does not expressly teach wherein the etching produces a plurality of features and the plurality of features have a local critical-dimension uniformity (LCDU) of at most about 100 Å, wherein LCDU is the sample standard deviation of the critical dimensions of the plurality of etched features.
Shamma teaches wherein the etching produces a plurality of features and the plurality of features have a local critical-dimension uniformity (LCDU) of at most about 100 Å, wherein LCDU is the sample standard deviation of the critical dimensions of the plurality of etched features (Shamma teaches obtaining low local critical-dimension uniformity by transferring and narrowing patterned features through a multilayer stack to a target layer; Shamma further teaches a target-layer LCDU of 2.38 nm (3σ), corresponding to a sample standard deviation of approximately 0.793 nm (7.93 Å), and a target-layer LCDU of 2.77 nm (3σ), corresponding to a sample standard deviation of approximately 0.923 nm (9.23 Å), both of which are less than the claimed local critical-dimension uniformity of at most about 100 Å; paragraphs [0037], [0084] - [0087]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Briggs to employ the pattern-transfer techniques taught by Shamma in order to improve the local critical-dimension uniformity of the etched features. Applying Shamma’s teachings to Briggs’ etching process would have predictably improved dimensional fidelity and uniformity of the etched semiconductor features while maintaining the desired feature dimensions. See MPEP § 2143.
Conclusion
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/JONATHAN L CARTER/Examiner, Art Unit 1713
/ERIN F BERGNER/Primary Examiner, Art Unit 1713
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