Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1 and 2 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yamazaki (20190006386).
Regarding claim 1, Yamazaki teaches a electronic device comprising: a first conductor (fig. 1: 701-1); a second conductor (fig. 1: 716); a first insulator (fig. 1: 721); a second insulator (fig. 1: 722_1); and a connection electrode (fig. 1: 706-1),
wherein the first insulator comprises a first opening (this opening is the gap between 721 segments) over the first conductor and overlapping with the first conductor (please see fig. 1 above which shows this limitation),
wherein the second conductor comprises a second opening (this opening is the gap between 716 segments) over the first conductor and overlapping with the first conductor (please see fig. 1 above which shows this limitation),
wherein the second insulator comprises a third opening (this opening is the gap between 722_1 segments) over the second conductor and overlapping with the first conductor,
wherein a width of a first region of the second opening is smaller than a width of the third opening (it can be seen that the gap between segments of 716 is smaller that gap between segments of 722_1),
wherein the connection electrode is positioned inside the first opening, the second opening, and the third opening (please see fig. 1 which shows this limitation),
wherein the connection electrode is in contact with a top surface of the first conductor (all elements seen in fig. 1 are in contact i.e. immediate proximity or association, of one another), and
wherein the connection electrode comprises a first region in contact with a top surface and a side surface of the second conductor ((all elements seen in fig. 1 are in contact i.e. immediate proximity or association, of one another).
Regarding claim 2, Yamazaki teaches a electronic device according to claim 1, wherein a width of a second region of the second opening (a smaller region between the gap between 716 segments) is smaller than a width of the first opening (this can be seen above), and wherein the connection electrode comprises a second region in contact with of a bottom surface of the second conductor (all elements seen in fig. 1 are in contact i.e. immediate proximity or association, of one another).
Claims 1-6 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Yamazaki (20200203339).
Regarding claim 1, Yamazaki teaches a electronic device comprising: a first conductor (fig. 54B: 138a); a second conductor (fig. 54B: 138b); a first insulator (fig. 54B:101C); a second insulator (fig. 54B: 101C); and a connection electrode (fig. 54B: 136),
wherein the first insulator comprises a first opening (please see vertical gap between segments of 101C) over the first conductor and overlapping with the first conductor (please see fig. 54B),
wherein the second conductor comprises a second opening (please see vertical gap between segments of 138b) over the first conductor and overlapping with the first conductor (please see fig. 54B),
wherein the second insulator comprises a third opening (please see vertical gap between segments of 101C) over the second conductor and overlapping with the first conductor (please see fig. 54B),
wherein a width of a first region of the second opening is smaller than a width of the third opening (please see fig. 54B),
wherein the connection electrode is positioned inside the first opening, the second opening, and the third opening (please see fig. 54B),
wherein the connection electrode is in contact with a top surface of the first conductor (all elements seen in fig. 54B are in contact i.e. immediate proximity or association, of one another), and
wherein the connection electrode comprises a first region in contact with a top surface and a side surface of the second conductor (all elements seen in fig. 54B are in contact i.e. immediate proximity or association, of one another).
Regarding claim 2, Yamazaki teaches a electronic device according to claim 1, wherein a width of a second region of the second opening (please see fig. 54B) is smaller than a width of the first opening, and wherein the connection electrode comprises a second region in contact with of a bottom surface of the second conductor (all elements seen in fig. 54B are in contact i.e. immediate proximity or association, of one another).
Regarding claim 3, Yamazaki teaches a electronic device according to claim 1, wherein the connection electrode comprises a third conductor (fig. 54B: 136a) and a fourth conductor (fig. 54B: 136b), wherein the third conductor is on an inner side of the first opening, an inner side of the second opening, and an inner side of the third opening (please se fig. 54B), wherein the fourth conductor is between the third conductor and the first insulator, between the third conductor and the second conductor, and between the third conductor and the second insulator (please see fig. 54B), and wherein the fourth conductor comprises the first region of the connection electrode (please note there are many segments not seen in fig. 54B).
Regarding claim 4, Yamazaki teaches a electronic device according to claim 3, wherein the third conductor comprises one of tantalum, tungsten, titanium, molybdenum, aluminum, and copper, (par. 197-199 and 220) and wherein the fourth conductor comprises one of tantalum nitride, tungsten nitride, and titanium nitride (par. 197-199 and 220).
Regarding claim 5, Yamazaki teaches a electronic device according to claim 3, wherein an inner wall of the first opening has a concave shape, and wherein a side surface of the third conductor comprises a first region having a convex shape (please see fig. 54B).
Regarding claim 6, Yamazaki teaches a electronic device according to claim 3, wherein a width of the first opening is smaller than a width of a second region of the second opening, wherein a width of a first region of the third conductor is smaller than a width of a second region of the third conductor, wherein the first region of the third conductor is provided inside the third opening, and wherein the second region of the third conductor is provided inside the first opening (please see fig. 54B).
Allowable Subject Matter
Claims 7-9 allowed.
The following is an examiner’s statement of reasons for allowance: claim 7 teaches a temporal ordering of steps novel in the art.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Claims 10-15 allowed.
The following is an examiner’s statement of reasons for allowance: claim 10 teaches a semiconductor device wherein… a first opening and a second opening, wherein the first insulator comprises a third opening overlapping with the first opening, wherein the first opening and the third opening each comprises a region overlapping with the oxide, wherein the third insulator and the third opening are in the first opening, wherein the third conductor comprises a region overlapping with the oxide with the third insulator therebetween, wherein the third insulator comprises a region in contact with a top surface of the oxide and a sidewall of the first opening…wherein, in a cross-sectional view of the transistor in a channel length direction, a distance between the first conductor and the second conductor is smaller than a width of the first opening.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CALEB E HENRY whose telephone number is (571)270-5370. The examiner can normally be reached Mon-Fri.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eva Montalvo can be reached at (571) 270-3829. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CALEB E HENRY/Primary Examiner, Art Unit 2818
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