Prosecution Insights
Last updated: October 01, 2026
Application No. 18/731,031

SEMICONDUCTOR DEVICE AND METHOD OF FORMING THEREOF

Non-Final OA §102§103
Filed
May 31, 2024
Examiner
LIU, BENJAMIN T
Art Unit
Tech Center
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
75%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
87%
With Interview

Examiner Intelligence

Grants 75% — above average
75%
Career Allowance Rate
541 granted / 721 resolved
+15.0% vs TC avg
Moderate +12% lift
Without
With
+12.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
36 currently pending
Career history
755
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
59.4%
+19.4% vs TC avg
§102
30.7%
-9.3% vs TC avg
§112
9.1%
-30.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 721 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of 1-13 and 21-27 in the reply filed on 8/10/2026 is acknowledged. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3-8, 10-13, 21-23, and 25-27 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsu (Us 2023/0120656). With regards to claim 1, figs. 26-33 of Hsu discloses a method comprising: forming source/drain recesses 428 on opposing sides of a channel region 408 over a substrate 401; forming anti-doping epitaxial (“semiconductor layer 436 may be deposited using vapor-phase epitaxy”, par [0058]) layers 4360 over the source/drain recesses 428, wherein the anti-doping epitaxial layers 4360 have a first conductivity type (“n-type dopant”, par [0058]); forming source/drain epitaxial regions 438 over the anti-doping epitaxial layers 4360, wherein the source/drain epitaxial regions 438 have a second conductivity type (“first epitaxial layer 438 may be in-situ doped with a p-type dopant”, par [0064]) different from the first conductivity type (“n-type dopant”, par [0058]); and forming a gate structure 450 over the channel region 4080. With regards to claim 3, figs. 26-33 of Hsu discloses etching sidewalls of the channel region 408 exposed from the source/drain recesses 428, wherein the anti-doping epitaxial layers 436 are formed along the etched sidewalls (sidewall of 408 in fig. 28) of the channel region 408. With regards to claim 4, figs. 26-33 of Hsu discloses an impurity concentration of the anti-doping epitaxial layers 4360 is less (4360 concentration of 5e18 atoms/cm.sup.3 is less than 438 boron doping concentration of 1e21 atoms/cm.sup.3, par [0058] and [0064]) than an impurity concentration of the source/drain epitaxial regions 438. With regards to claim 5, figs. 26-33 of Hsu discloses a thickness of each of the anti-doping epitaxial layers 4360 is less than 5 nm (“0.5nm”, par [0062]). With regards to claim 6, figs. 26-33 of Hsu discloses that the first conductivity type of the anti-doping epitaxial layers 4360 is n-type (“n-type dopant”, par [0058]), and the second conductivity type (p) of the source/drain epitaxial regions 438 is p-type (“first epitaxial layer 438 may be in-situ doped with a p-type dopant”, par [0064]). With regards to claim 7, figs. 26-33 of Hsu discloses that the first conductivity type of the anti-doping epitaxial layers 4360 is p-type (“diffusion stop layer 4360 may include boron (B)”, par [0060]), and the second conductivity type (n) of the source/drain epitaxial regions is n-type (“n-type MBC”, par [0060]). With regards to claim 8, figs. 26-33 of Hsu discloses that a method comprising: epitaxially growing a multilayer stack (408, 406, fig. 28) over a substrate 401, wherein the multilayer stack (408, 406, fig. 28) comprising first semiconductor layers 406 and second semiconductor layers 408 alternating with the first semiconductor layers 406; etching a source/drain recess 428 in the multilayer stack (408, 406); laterally recessing sidewalls 430 of the first semiconductor layers 406; forming inner spacers 434 over the recessed sidewalls 430 of the first semiconductor layers 406; forming anti-doping epitaxial layers 436 over sidewalls of the second semiconductor layers 408; forming a source/drain epitaxial structure 438 in the source/drain recess 428 and over the anti-doping epitaxial layers 4360; and replacing the first semiconductor layers 406 with a gate structure wrapping 450 around the second semiconductor layers 4080. With regards to claim 10, figs. 26-33 of Hsu discloses forming a plurality of recesses 430 on sidewalls of the second semiconductor layers 406, wherein the anti-doping epitaxial layers 436 are formed along the recesses 430 on the sidewalls of the second semiconductor layers 406. With regards to claim 11, figs. 26-33 of Hsu discloses a depth of each of the recesses 430 on the sidewalls of the second semiconductor layers 406 is less than a thickness of each of the inner spacers 434. With regards to claim 12, figs. 26-33 of Hsu discloses an impurity concentration of the anti-doping epitaxial layers 4360 is less (4360 concentration of 5e18 atoms/cm.sup.3 is less than 438 boron doping concentration of 1e21 atoms/cm.sup.3, par [0058] and [0064]) than an impurity concentration of the source/drain epitaxial regions 438. With regards to claim 13, figs. 26-33 of Hsu discloses a thickness of each of the anti-doping epitaxial layers 4360 is less than 5 nm (“0.5nm”, par [0062]). With regard to claim 21, figs. 26-33 of Hsu discloses a method comprising: etching a source/drain recess 428 adjacent a channel region 408 over a substrate 401; forming a first anti-doping epitaxial layer 436 in the source/drain recess 430, the first anti-doping epitaxial layer 436 having a first conductivity type (“n-type dopant”, par [0058]), wherein a surface of the substrate 402 exposed by the source/drain recess 428 is covered by the first anti-doping epitaxial layer 436; and forming a source/drain epitaxial region 438 over the first anti-doping epitaxial layer 4360, wherein the source/drain epitaxial region 438 has a second conductivity type (“first epitaxial layer 438 may be in-situ doped with a p-type dopant”, par [0064]) different from the first conductivity type (“n-type dopant”, par [0058]). With regards to claim 22, figs. 26-33 of Hsu discloses forming a second anti-doping epitaxial layer 436 along a sidewall of the channel region 408 exposed by the source/drain recess 428, the second anti-doping epitaxial layer 436 having the first conductivity type (“n-type dopant”, par [0058]). With regards to claim 23, figs. 26-33 of Hsu discloses forming a spacer 434 adjacent the source/drain recess 430 prior to forming the second anti-doping epitaxial layer 436, wherein the second anti-doping epitaxial layer 436 is laterally offset from the spacer 434 and protrudes from the spacer 434. With regards to claim 25, figs. 26-33 of Hsu discloses that the first anti-doping epitaxial layer 436 comprises: depositing an undoped semiconductor layer 436 along the surface of the substrate 402 exposed by the source/drain recess 428; implanting a dopant (“semiconductor layer 436 may be in-situ doped with phosphorus (P)“, par [0058]) into the undoped semiconductor layer 436; and annealing the implanted (“in-situ doped”, par [0058]) undoped semiconductor layer 436. With regards to claim 26, figs. 26-33 of Hsu discloses that the first anti-doping epitaxial layer 436 and the source/drain epitaxial region 438 are formed in a same processing chamber (“VPE”, par [0058] and [0064]). With regards to claim 27, figs. 26-33 of Hsu discloses that an impurity concentration of the first anti-doping epitaxial layer 4360 is less than (4360 concentration of 5e18 atoms/cm.sup.3 is less than 438 boron doping concentration of 1e21 atoms/cm.sup.3, par [0058] and [0064]) an impurity concentration of the source/drain epitaxial region 438. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Hsu (Us 2023/0120656) in view of More (US 2023/0114789). With regards to claim 2, Hsu does not disclose forming undoped semiconductor layers over the source/drain recesses before forming the anti-doping epitaxial layers, wherein the anti-doping epitaxial layers are formed over the undoped semiconductor layers. However, figs. 9-11 of More discloses undoped semiconductor layers 236 over the source/drain recesses 228. Therefore, it would have been obvious to one of ordinary skill in the art to form the source/drain trench of Hsu with the undoped silicon as taught in More in order to provide a leakage reduction feature to reduce leakage current through the substrate. See par [0031] of More. With regards to claim 24, Hsu does not disclose forming dopant-free semiconductor layers over the source/drain recesses before forming the anti-doping epitaxial layers, wherein the anti-doping epitaxial layers are formed over the dopant-free semiconductor layers. However, figs. 9-11 of More discloses dopant-free semiconductor layers 236 over the source/drain recesses 228. Therefore, it would have been obvious to one of ordinary skill in the art to form the source/drain trench of Hsu with the undoped silicon as taught in More in order to provide a leakage reduction feature to reduce leakage current through the substrate. See par [0031] of More. Allowable Subject Matter Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 9, Hsu (Us 2023/0120656) and More (US 2023/0114789) do not disclose that the source/drain epitaxial structure comprises a plurality of protruding portions extending between the ant -doping epitaxial layers. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN T LIU whose telephone number is (571)272-6009. The examiner can normally be reached Monday-Friday 11:00am-7:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara J Green can be reached at 571 270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BENJAMIN TZU-HUNG LIU/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

May 31, 2024
Application Filed
Sep 14, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12751292
PACKAGE STRUCTURE INCLUDING RING STRUCTURE ATTACHED BY HYBRID ADHESIVE AND METHODS OF FORMING THE SAME
3y 6m to grant Granted Sep 29, 2026
Patent 12745683
MULTI-CHIP HIGH MEMORY BANDWIDTH CONFIGURATION
4y 9m to grant Granted Sep 22, 2026
Patent 12721141
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
4y 1m to grant Granted Aug 25, 2026
Patent 12713979
SEMICONDUCTOR PACKAGES AND METHODS OF MANUFACTURING THE SEMICONDUCTOR PACKAGES
3y 5m to grant Granted Aug 18, 2026
Patent 12713947
VIA ARRAY IN A REDISTRIBUTION LAYER STRUCTURE FOR STRESS RELIEF
3y 1m to grant Granted Aug 18, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
75%
Grant Probability
87%
With Interview (+12.3%)
2y 11m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 721 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month