DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
As to claim 1, a broad range or limitation together with a narrow range or limitation that falls within the broad range or limitation (in the same claim) may be considered indefinite if the resulting claim does not clearly set forth the metes and bounds of the patent protection desired. See MPEP § 2173.05(c).
In the present instance, claim 1 recites the broad recitation “amorphous carbon”, and the claim also recites “SOC” which is the narrower statement of the range/limitation. The claim(s) are considered indefinite because there is a question or doubt as to whether the feature introduced by such narrower language is (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claims.
Claims 2-10 are rejected as being dependent upon claim 1, and failing to cure the deficiency thereof.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (US 20230036420 A1) in view of Huang et al. (US 20230095970 A1).
As to claim 1, Jeong discloses a method for etching a mandrel structure [Abstract], comprising:
As to step 1: Jeong discloses forming a stack of materials comprising an etching object layer 110, hardmask silicon material 120, amorphous carbon 130, another hardmask silicon layer 140, and another amorphous carbon 150 [Fig. 2, para. 0018-19].
Further as to step 1: Jeong discloses forming a photoresist layer [Fig. 2, para. 0018-19] (which one of ordinary skill in the art would immediately envisage forming by spin-coating because it is the conventional photoresist application process), performing a photolithography process to form photoresist trench patterns [Fig. 3], which can fairly be construed to have dense pattern area 170, and sparse pattern area (unpatterned area adjacent to 165), and would inherently exhibit a load effect due to the pattern disparity.
As to step 2: Jeong discloses pretreating the photoresist trench pattern in the dense pattern area and the sparse pattern area by exposing the substrate to an ultraviolet baking process [Fig. 4-5, para. 0028-29], and a cleansing process [para. 0032-33].
As to steps 3-6: Jeong discloses patterning the stack of materials to form a mandrel structure 115 in the object layer 110, and removing the above layers of the patterned stack (all layers except the layer 125 immediately above 115) [Fig. 6, para. 0035-36].
In view of the above, Jeong fails to disclose each element of claim 1 because the particular stack of layers of Jeong do not anticipate the claimed layers.
However, Huang discloses a patterning stack for forming a mandrel structure on a target substrate 102 [Abstract, Fig. 1A], comprising:
providing a semiconductor structure, forming, from bottom to top, a tetraethyl orthosilicate (TEOS) layer 110, an a-Si layer 110, an amorphous carbon (SOC) layer 120 and a hard mask layer 130 stacked on the semiconductor structure [Fig. 1A; para. 0031, “under layer 110 can be or include an oxide layer or a silicon-containing layer, such as silicon oxide, amorphous silicon, a tetraethoxysilane (TEOS) layer, or any combination thereof”].
Therefore, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of forming a pattern in a target layer using a silicon hardmask and amorphous carbon stack structure, of Jeong, to include the stack structure for forming a pattern in a target layer, of Huang, because it is a conventional patterning stack to form a pattern in an underlying target layer, as taught by Huang [Abstract; para. 0031].
As to claim 2, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 1, the load effect of the photoresist trench pattern in the dense pattern area comprises photoresist residues 167 at a bottom of the photoresist trench pattern formed after photoresist development during the photolithography process [Jeong, Fig. 4, para. 0026], and a sidewall tilting of the photoresist trench pattern formed after the development during the photolithography process, wherein the photoresist residues and the sidewall tilting result in a deviation of a photoresist trench linewidth from a designed trench linewidth [Jeong, Fig. 4, para. 0026].
As to claim 3, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 2, wherein in step 1, the load effect of the photoresist trench pattern in the sparse pattern area further comprises photoresist residues at the bottom of the photoresist trench pattern formed after photoresist development during the photolithography process [Jeong, Fig. 4, para. 0026], and the sidewall tilting of the photoresist trench pattern formed after the development during the photolithography process, wherein the photoresist residues and the sidewall tilting result in the deviation of the photoresist trench linewidth from the designed trench linewidth [Jeong, Fig. 4, para. 0026].
As to claim 4, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 3, wherein in step 1, the deviation of the photoresist trench linewidth from the designed trench linewidth in the sparse pattern area is greater than the deviation of the photoresist trench linewidth from the designed trench linewidth in the dense pattern area [Jeong, Fig. 4, para. 0026].
As to claim 5, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 1, the hard mask layer is a dielectric antireflection layer [Huang, para. 0031, “130 can be… dielectric ARC (DARC)”].
As to claim 9, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 2, wherein in step 2, the method for pretreating the photoresist trench pattern of the dense pattern area comprises:
cleaning the photoresist residues from the bottom of the photoresist trench pattern in the dense pattern area [para. 0032-33], and eliminating the sidewall tilting of the photoresist trench pattern by applying an ultraviolet light, so as to mitigate the deviation of the photoresist trench linewidth from the designed trench linewidth [Fig. 4-5, para. 0028-29].
As to claim 10, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 2, wherein in step 2, the method for pretreating the photoresist trench pattern of the sparse pattern area comprises:
cleaning the photoresist residues from the bottom of the photoresist trench pattern in the sparse pattern area [para. 0032-33], and eliminating the sidewall tilting of the photoresist trench pattern by applying an ultraviolet light. so as to mitigate the deviation of the photoresist trench linewidth from the designed trench linewidth [Fig. 4-5, para. 0028-29].
Claims 1-10 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (US 20230036420 A1) in view of Yatsuda et al. (US 20110104901 A1).
As to claim 1, Jeong discloses a method for etching a mandrel structure [Abstract], comprising:
As to step 1: Jeong discloses forming a stack of materials comprising an etching object layer 110, hardmask silicon material 120, amorphous carbon 130, another hardmask silicon layer 140, and another amorphous carbon 150 [Fig. 2, para. 0018-19].
Further as to step 1: Jeong discloses forming a photoresist layer [Fig. 2, para. 0018-19] (which one of ordinary skill in the art would immediately envisage forming by spin-coating because it is the conventional photoresist application process), performing a photolithography process to form photoresist trench patterns [Fig. 3], which can fairly be construed to have dense pattern area 170, and sparse pattern area (unpatterned area adjacent to 165), and would inherently exhibit a load effect due to the pattern disparity.
As to step 2: Jeong discloses pretreating the photoresist trench pattern in the dense pattern area and the sparse pattern area by exposing the substrate to an ultraviolet baking process [Fig. 4-5, para. 0028-29], and a cleansing process [para. 0032-33].
As to steps 3-6: Jeong discloses patterning the stack of materials to form a mandrel structure 115 in the object layer 110, and removing the above layers of the patterned stack (all layers except the layer 125 immediately above 115) [Fig. 6, para. 0035-36].
In view of the above, Jeong fails to disclose each element of claim 1 because the particular stack of layers of Jeong do not anticipate the claimed layers.
However, Yatsuda discloses a patterning stack for forming a mandrel structure on a target substrate 102 [Abstract, Fig. 10A], comprising:
providing a semiconductor structure, forming, from bottom to top, a tetraethyl orthosilicate (TEOS) layer 111 [para. 0381], an a-Si layer 112 [para. 0382], an amorphous carbon (SOC) layer 113 [para. 0383] and a hard mask layer 114 [para. 0384] stacked on the semiconductor structure [Fig. 10A].
Therefore, it would have been prima facie obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of forming a pattern in a target layer using a silicon hardmask and amorphous carbon stack structure, of Jeong, to include the stack structure for forming a pattern in a target layer, of Yatsuda, because it is a conventional patterning stack to form a pattern in an underlying target layer, as taught by Yatsuda [Abstract; Fig. 10A, para. 0381-383].
As to claim 2, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 1, the load effect of the photoresist trench pattern in the dense pattern area comprises photoresist residues 167 at a bottom of the photoresist trench pattern formed after photoresist development during the photolithography process [Jeong, Fig. 4, para. 0026], and a sidewall tilting of the photoresist trench pattern formed after the development during the photolithography process, wherein the photoresist residues and the sidewall tilting result in a deviation of a photoresist trench linewidth from a designed trench linewidth [Jeong, Fig. 4, para. 0026].
As to claim 3, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 2, wherein in step 1, the load effect of the photoresist trench pattern in the sparse pattern area further comprises photoresist residues at the bottom of the photoresist trench pattern formed after photoresist development during the photolithography process [Jeong, Fig. 4, para. 0026], and the sidewall tilting of the photoresist trench pattern formed after the development during the photolithography process, wherein the photoresist residues and the sidewall tilting result in the deviation of the photoresist trench linewidth from the designed trench linewidth [Jeong, Fig. 4, para. 0026].
As to claim 4, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 3, wherein in step 1, the deviation of the photoresist trench linewidth from the designed trench linewidth in the sparse pattern area is greater than the deviation of the photoresist trench linewidth from the designed trench linewidth in the dense pattern area [Jeong, Fig. 4, para. 0026].
As to claim 5, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 1, the hard mask layer is a dielectric antireflection layer [Yatsuda, para. 0384, “ a SOG (Spin On Glass) film, a SiON film, or a composite film of a LTO (Low Temperature Oxide) film and BARC”].
As to claim 6, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 4, the SOC layer is etched by applying a dry etching method to form the SOC pattern structure [Jeong, para. 0036; Yatsuda, para. 0385-392].
As to claim 7, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 5, the a-Si layer is etched by applying a dry etching method to form the mandrel structure [Jeong, para. 0036; Yatsuda, para. 0415].
As to claim 8, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 1, wherein in step 6, the SOC pattern structure is removed by applying ashing dry etching [Yatsuda, para. 0418].
As to claim 9, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 2, wherein in step 2, the method for pretreating the photoresist trench pattern of the dense pattern area comprises:
cleaning the photoresist residues from the bottom of the photoresist trench pattern in the dense pattern area [para. 0032-33], and eliminating the sidewall tilting of the photoresist trench pattern by applying an ultraviolet light, so as to mitigate the deviation of the photoresist trench linewidth from the designed trench linewidth [Fig. 4-5, para. 0028-29].
As to claim 10, Modified Jeon discloses the method for adjusting linewidth due to the load effect in SADP mandrel etching according to claim 2, wherein in step 2, the method for pretreating the photoresist trench pattern of the sparse pattern area comprises:
cleaning the photoresist residues from the bottom of the photoresist trench pattern in the sparse pattern area [para. 0032-33], and eliminating the sidewall tilting of the photoresist trench pattern by applying an ultraviolet light. so as to mitigate the deviation of the photoresist trench linewidth from the designed trench linewidth [Fig. 4-5, para. 0028-29].
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: The additionally cited references are cited to show patterning sparse and/or dense line patterns comprising stack schemes comprising TEOS, amorphous silicon, amorphous carbon, and/or a hardmask layer [Abstracts].
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/CHRISTOPHER REMAVEGE/Examiner, Art Unit 1713
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