Prosecution Insights
Last updated: July 17, 2026
Application No. 18/736,590

SEMICONDUCTOR INTERCONNECT STRUCTURE AND METHOD FOR MANUFACTURING THE SAME

Non-Final OA §102
Filed
Jun 07, 2024
Priority
Apr 19, 2024 — TW 113114753
Examiner
CHAMBLISS, ALONZO
Art Unit
Tech Center
Assignee
United Microelectronics Corp.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
65%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
1068 granted / 1186 resolved
+30.1% vs TC avg
Minimal -25% lift
Without
With
+-24.7%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
23 currently pending
Career history
1208
Total Applications
across all art units

Statute-Specific Performance

§101
3.9%
-36.1% vs TC avg
§103
52.3%
+12.3% vs TC avg
§102
12.8%
-27.2% vs TC avg
§112
9.1%
-30.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1186 resolved cases

Office Action

§102
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 6/7/2024 was filed before the mailing date of the Non-final rejection on 6/27/2026. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Drawings The formal drawings filed on 6/7/2024 have been approved by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Ting et al. (US 9,991,200). With respect to Claim 1, Ting teaches a first conductive element 205 and a dielectric layer 302 on the first conductive element. A second conductive element 307 in the dielectric layer 302. A via element 309 in the dielectric layer 302 and extending from the first conductive element 205 to the second conductive element. A third conductive element 314 or 324 in the dielectric layer, wherein a lower surface of the third conductive element is higher than a lower surface of the second conductive element 307 (see col. 3 lines 28-67, col. 4 lines 1-67, col. 5 lines 50-67, and col. 6 lines 1-67; Figs. 1 and 4-17). With respect to Claim 2, Ting teaches an upper surface of the dielectric layer 302, an upper surface of the second conductive element 307 and an upper surface of the third conductive element are coplanar (see Figs. 1, 11, and 12). With respect to Claim 3, Ting teaches a first etch stop layer 250 between the first conductive element 205 and the dielectric layer 302 (see Figs. 1, 11, and 12-17). With respect to Claim 4, Ting teaches a second etch stop layer 260 (i.e. made of Al) between the first etch stop layer 250 (i.e. made of Ti) and the dielectric layer. The first etch stop layer 250 and the second etch stop layer 260 comprise different materials (see col. 7 lines 54-60 and col. 8 lines 55-65; Figs. 1 and 15-17). With respect to Claim 5, Ting teaches the via element 309 pass through the first etch stop layer 250 (see Figs. 1 and 17). With respect to Claim 6, Ting teaches a fourth conductive element 214 below the dielectric layer 302 and separated from the first conductive element 205. The third conductive element 314 is at least partially aligned with the fourth conductive element 214 (see Figs. 1 and 17). With respect to Claims 7 and 20, Ting teaches the third conductive element 314 is electrically isolated from the fourth conductive element 214 (see Figs. 1 and 17). With respect to Claims 8 and 12, Ting teaches a distance (i.e. height) between the lower surface of the third conductive element 314 and an upper surface of the fourth conductive element 214 is greater than a distance between the lower surface of the second conductive element 307 and an upper surface of the first conductive element 205 (see Figs. 1 and 17). With respect to Claim 9, Ting teaches a height of the third conductive element 314 is smaller than a height of the second conductive element 307 (see Figs. 1 and 17). With respect to Claim 10, Ting teaches an upper surface of the dielectric layer 302, an upper surface of the second conductive element 307 and an upper surface of the third conductive element 314 are coplanar (see Figs. 1 and 17). With respect to Claim 11, Ting teaches a first conductive element 205 and a second conductive 307 disposed on the first conductive element along a first direction. A via element 309 extending from the first conductive element 205 to the second conductive element 307, wherein the first conductive element is electrically connected to the second conductive element through the via element 309. A third conductive element 314, wherein the third conductive element and the second conductive element 307 are disposed along a second direction perpendicular to the first direction. A fourth conductive element 214, wherein the fourth conductive element and the first conductive element 205 are disposed along the second direction. The third conductive element 314 is electrically isolated from the fourth conductive element 214. A dielectric material 302 between the first conductive element 205 and the second conductive element 307 and between the third conductive element 314 and the fourth conductive element 214. The dielectric material 302 has a varied height along the first direction (see col. 3 lines 28-67, col. 4 lines 1-67, col. 5 lines 50-67, and col. 6 lines 1-67; Figs. 1 and 3-17). With respect to Claim 13, Ting teaches forming a first conductive element 205 and a dielectric layer 302 on the first conductive element. Forming a first opening 305 in the dielectric layer 202, 302 forming a via opening 602, 702 exposing the first conductive element 205. Forming a second opening 303 in the dielectric layer 302, wherein the second opening is connected to the via opening. A bottom of the first opening is higher than a bottom of the second opening. Forming a second conductive element 307, a via element 309 and a third conductive element 314 in the second opening 303. The via opening and the first opening respectively (see col. 5 lines 25-47 and col. 6 lines 34-44; Figs. 3-17). With respect to Claim 14, Ting teaches forming a photoresist layer on the dielectric layer 302. Forming a third opening in the photoresist layer, wherein the third opening exposes an upper surface of the dielectric layer. Filling the third opening with a photoresist material 502 and forming a trench passing through the photoresist material and the dielectric layer. A width of the trench is smaller than a width of the third opening (see col. 5 lines 25-45 and col. 6 lines 17-55; Figs. 4-8). With respect to Claim 15, Ting teaches forming a first etch stop layer 250 on the first conductive element 205 and a second etch stop layer 350 on the first etch stop layer. The first etch stop layer and the second etch stop layer comprise different materials(see Figs. 1, 11, and 12-17). With respect to Claim 16, Ting teaches forming a photoresist layer on the dielectric layer 30. Forming a third opening in the photoresist layer, wherein the third opening exposes an upper surface of the dielectric layer. Filling the third opening with a photoresist material. Forming a trench passing 602 through the photoresist material 502 and the dielectric layer 302, wherein the trench exposes the second etch stop layer (see Figs. 4-8). With respect to Claim 17, Ting teaches performing an etching process to the trench 602, 702 to form the via opening an the second opening above the via opening 702 (see Figs. 4-8). With respect to Claim 18, Ting teaches the via element 309 extends from the first conductive element 205 to the second conductive element 307 (see Figs. 1 and 17). With respect to Claim 19, Ting teaches forming a fourth conductive element 214 below the dielectric layer 302, wherein the fourth conductive element 214 is separated from the first conductive element 205 and the third conductive element 314 is at least partially aligned with the fourth conductive element 214 (see Figs. 1 and 17). The prior art made of record and not relied upon is cited primarily to show the product of the instant invention. Conclusion 7. Any inquiry concerning the communication or earlier communications from the examiner should be directed to Alonzo Chambliss whose telephone number is (571) 272-1927. If attempts to reach the examiner by telephone are unsuccessful, the examiner's supervisor, Jacob Y. Choi can be reached on (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system Status information for published applications may be obtained from either Private PMR or Public PMR. Status information for unpublished applications is available through Private PMR only. For more information about the PMR system see hittp://pair-dkect.usptol gov. Should you have questions on access to the Private PMR system contact the Electronic Center (EBC) at 866-217-9197 (toll-free). AC/June 27, 2026 /Alonzo Chambliss/ Primary Examiner, Art Unit 2897
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Prosecution Timeline

Jun 07, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
65%
With Interview (-24.7%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1186 resolved cases by this examiner. Grant probability derived from career allowance rate.

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