DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 11, 16, and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (2023/0111574, hereafter Lee ‘574) in view of Chang et al. (2016/0293687, hereafter Chang).
Regarding claim 1, Lee ‘574 discloses display panel comprising: a base layer (110, Fig. 4A, par. 0071) including a display area (1000A, Fig. 1, par. 0068) and a non-display area (1000N, Fig. 1, par. 0068) adjacent to the display area; a light shielding pattern (BMLa, Fig. 4A, par. 0127) on the base layer; a first insulating layer (10bf, Fig. 4A, par. 0129) covering the light shielding pattern; a transistor (TFT, Fig. 4A, par. 0125) overlapping the light shielding pattern and including a semiconductor pattern (DE1/SE1, Fig. 4A, par. 0133) on the first insulating layer and a gate (GT1, Fig. 4A, par. 0137) on the semiconductor pattern; a second insulating layer (10, Fig. 4A, par. 0134) between the semiconductor pattern and the gate; a third insulating layer (20, Fig. 4A, par. 0138) covering the transistor; a first connection electrode (CNE1, Fig. 4A, par. 0139) on the third insulating layer and connected to the semiconductor pattern through a contact hole (par. 0139) defined in the third insulating layer; a fourth insulating layer (40, Fig. 4A, par. 0140) covering the first connection electrode; a pixel defining layer (PDL, Fig. 4A, par. 0093) including a display opening (OP1, Fig. 4A, par. 0093) and on the fourth insulating layer; and a light emitting element (LD1-B, Fig. 4A, par. 0087) on the fourth insulating layer and including a first electrode (AE, Fig. 4A, par. 0142) and a second electrode (CE, Fig. 4A, par. 0142), which are exposed by the display opening and connected to the first connection electrode, and a light emitting layer (EL, Fig. 4A, par. 0142) between the first electrode and the second electrode.
Lee ‘574 fails to disclose a display area including a transmissive area; a display opening not overlapping the transmissive area; wherein the fourth insulating layer includes a first insulating opening overlapping the transmissive area, and the pixel defining layer includes a transmissive opening overlapping the first insulating opening.
However, Chang teaches a display area (par. 0045) including a transmissive area (W, Fig. 1, par. 0045); a display opening (160 gap right, Fig. 2) not overlapping the transmissive area; wherein the fourth insulating layer (150, Fig. 2) includes a first insulating opening (150 gap, Fig. 2) overlapping the transmissive area, and the pixel defining layer (160, Fig. 2) includes a transmissive opening (160 gap, Fig. 2) overlapping the first insulating opening.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with Chang by providing a transmissive area and a display opening wherein the insulating layer includes an opening in order for sensors to receive light while the insulating layer’s opening maximizes transparency and minimizes optical interference.
Regarding claim 2, Lee ‘574 fails to disclose a display panel wherein a width of the first insulating opening is greater than a width of the transmissive opening on a plane.
However, Chang teaches a display panel wherein a width of the first insulating opening (150 gap, Fig. 2) is greater than a width of the transmissive opening (160 gap, Fig. 2) on a plane.
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with Chang by providing a first insulating opening with a greater width than a transmissive opening in order to seal its exposed edges against moisture and degradation while smoothing coverage to prevent defects.
Regarding claim 3, Lee ‘574 fails to disclose a display panel wherein a side surface of the fourth insulating layer, which defines the first insulating opening, contacts the pixel defining layer.
However, Chang teaches a display panel wherein a side surface of the fourth insulating layer (150), which defines the first insulating opening (150 gap), contacts the pixel defining layer (160) (Fig. 2).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with Chang by having the side surface of the first insulating opening contacting the pixel defining layer in order to seal its exposed edges against moisture and degradation while smoothing coverage to prevent defects.
Regarding claim 11, Lee ‘574 fails to disclose a display panel wherein an area of the display opening is smaller than an area of the transmissive opening.
However, Chang teaches a display panel wherein an area of the display opening (160 gap) is smaller than an area of the transmissive opening (W) (Fig. 2).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with Chang by providing a display opening smaller than a transmissive opening in order to maintain fine resolution and balanced emission while creating a wise window that maximizes light sensing.
Regarding claim 16, Lee ‘574 discloses a display panel wherein the first insulating layer (10bf, Fig. 4A) includes a first layer including silicon nitride (par. 0129) and a second layer including silicon oxide (par. 0129), the second insulating layer (10, Fig. 4A) includes silicon oxide (par. 0134-0135).
Lee ‘574 fails to explicitly disclose the third insulating layer includes silicon oxy nitride.
However, Lee ‘574 teaches an insulating layer includes silicon oxy nitride (par. 0134-0135).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with by providing a third insulating layer with silicon oxy nitride because of exceptionally dense structure which provides strong barrier against contaminants while contributing stability to structure.
Regarding claim 18, Lee ‘574 discloses a display panel wherein the first electrode includes a first layer including indium tin oxide (ITO), a second layer including silver, and a third layer including ITO (par. 0142).
Regarding claim 19, Lee ‘574 discloses a display panel further comprising: an encapsulation layer (140, Fig. 4A, par. 0149) covering the light emitting element (LD1-B, Fig. 4A) and including inorganic layers and an organic layer between the inorganic layers (par. 0149).
Regarding claim 20, Lee ‘574 fails to disclose a display panel wherein a virtual object on a rear surface of the display panel is transparent and visible from a front surface of the display panel.
However, Chang teaches a display panel wherein a virtual object on a rear surface of the display panel is transparent and visible from a front surface of the display panel (par. 0048).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with Chang by implementing a device such that a virtual object is visible from the front in order to create multi-layered depth and visual effects while allowing unobstructed light transmission across display.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘574 in view of Chang as applied to claim 1 above, and further in view of Choi et al. (2023/0055469, hereafter Choi).
Regarding claim 4, Lee ‘574, discussed above, fails to explicitly disclose a display panel wherein the fourth insulating layer includes silicon nitride.
However, Lee ‘574 teaches a display panel wherein an insulating layer includes silicon nitride (par. 0134-0135).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 by providing a fourth insulating layer of silicon nitride because of exceptionally dense structure which provides strong barrier against contaminants while contributing stability to structure.
Lee ‘574 and Chang discussed above fail to disclose the pixel defining layer includes photosensitive polyimide (PSPI).
However, Choi teaches the pixel defining layer includes photosensitive polyimide (PSPI) (par. 0070).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Choi by providing a pixel defining layer including PSPI material in order to enable precision patterning with smooth profiles while offering stability to protect layers.
Claims 5-9, 12, 13, and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘574 in view of Chang as applied to claim 1 above, and further in view of Chung et al. (2021/0066648, hereafter).
Regarding claim 5, Lee ‘574 and Chang discussed above fail to disclose a display panel wherein, in the transmissive area, the third insulating layer is exposed from the pixel defining layer through the transmissive opening.
However, Chung teaches a display panel wherein, in the transmissive area (TA, Fig. 5), the third insulating layer (135, Fig. 5) is exposed from the pixel defining (160, Fig. 5) layer through the transmissive opening (TW, Fig. 5).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Chung by providing an insulating layer exposed in the transmissive area in order to act as a protective barrier that seals the substrate against contamination while allowing light transmittance.
Regarding claim 6, Lee ‘574 and Chang fail to disclose a display panel wherein the third insulating layer includes a second insulating opening overlapping the first insulating opening, and a side surface of the fourth insulating layer, which defines the first insulating opening, and a side surface of the third insulating layer, which defines the second insulating opening, are in contact with the pixel defining layer.
However, Chung teaches a display panel wherein the third insulating layer (1125) includes a second insulating opening (OP6) overlapping the first insulating opening (OP5), and a side surface of the fourth insulating layer (1135), which defines the first insulating opening, and a side surface of the third insulating layer, which defines the second insulating opening, are in contact with the pixel defining layer (1160) (Fig. 14).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Chung by providing insulating openings such that their layers’ sides are in contact with the pixel defining layer in order to seal its exposed edges against moisture and degradation while smoothing coverage to prevent defects.
Regarding claim 7, Lee ‘574 fails to disclose a display panel wherein, in the transmissive area, the first insulating layer is exposed from the pixel defining layer through the transmissive opening.
However, Chang teaches a display panel wherein, in the transmissive area (W), the first insulating layer (120) is exposed from the pixel defining layer (160) through the transmissive opening (W) (Fig. 4).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 with Chang by providing an insulating layer exposed in the transmissive area in order to act as a protective barrier that seals the substrate against contamination while allowing light transmittance.
Regarding claim 8, Lee ‘574 and Chang fail to disclose a display panel wherein the first insulating layer includes a third insulating opening overlapping the second insulating opening, and a side surface of the first insulating layer, which defines the third insulating opening, is in contact with the pixel defining layer.
However, Chung teaches a display panel wherein the first insulating layer (1125) includes a third insulating opening (OP6) overlapping the second insulating opening (OP5), and a side surface of the first insulating layer, which defines the third insulating opening, is in contact with the pixel defining layer (1160) (Fig. 14).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Chung by providing an insulating opening such that the side surface of the layer is in contact with the pixel defining layer in order to seal its exposed edges against moisture and degradation while smoothing coverage to prevent defects.
Regarding claim 9, Lee ‘574 and Chang fail to disclose a display panel wherein, in the transmissive area, the base layer is exposed from the pixel defining layer through the transmissive opening.
However, Chung teaches a display panel wherein, in the transmissive area (TA), the base layer (110) is exposed from the pixel defining layer (1160) through the transmissive opening (TW) (Fig. 14).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Chung by providing a transmissive area where the base layer is exposed in order to maximize light transmission and minimize interference by subsequent layers.
Regarding claim 12, Lee ‘574 discloses display panel further comprising: a fifth insulating layer (50) between the fourth insulating layer (40) and the pixel defining layer (PDL) (Fig. 4A).
Lee ‘574 and Chang fail to disclose the fifth insulating layer includes an upper insulating opening overlapping the first insulating opening, and a side surface of the fifth insulating layer, which defines the upper insulating opening, is in contact with the pixel defining layer.
However, Chung teaches the fifth insulating layer (145) includes an upper insulating opening (OP4) overlapping the first insulating opening (OP5), and a side surface of the fifth insulating layer, which defines the upper insulating opening, is in contact with the pixel defining layer (160) (Fig. 14).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Chung by providing openings such that the side surface of the layers are in contact with the pixel defining layer in order to seal its exposed edges against moisture and degradation while smoothing coverage to prevent defects.
Regarding claim 13, Lee ‘574 and Chang fail to disclose a display panel wherein an upper surface of the fourth insulating layer, which is adjacent to a side surface of the fourth insulating layer, which defines the first insulating opening, is exposed from the fifth insulating layer through the upper insulating opening, and the upper surface is in contact with the pixel defining layer.
However, Chung teaches a display panel wherein an upper surface of the fourth insulating layer (1135), which is adjacent to a side surface of the fourth insulating layer, which defines the first insulating opening (OP5), is exposed from the fifth insulating layer (145) through the upper insulating opening (OP4), and the upper surface is in contact with the pixel defining layer (1160) (Fig. 14).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Chung by providing openings such that the side surface of the layers are in contact with the pixel defining layer in order to seal its exposed edges against moisture and degradation while smoothing coverage to prevent defects.
Regarding claim 15, Lee ‘574 discloses a display panel further comprising: a second connection (CNE2) electrode on the fourth insulating layer (40), covered by the fifth insulating layer (50), and connected to the first connection electrode (CNE1) through a contact hole (par. 0140) defined in the fourth insulating layer (Fig. 4A).
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘574 in view of Chang as applied to claim 1 above, and further in view of Lee et al. (2023/0217712, hereafter Lee ’712).
Regarding claim 10, Lee ‘574 and Chang discussed above fail to disclose a display panel further comprising: a data line connected to the transistor, wherein the data line is on a same layer as the light shielding pattern.
However, Lee ‘712 teaches a display panel further comprising: a data line (DL) connected to the transistor (T1, par. 0041), wherein the data line is on a same layer as the light shielding pattern (105, par. 0078).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Lee ‘712 by providing a data line connected to the transistor and on the same layer as the light shielding pattern in order to simplify manufacturing while maximizing aperture ratio and shortening electrical connections.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘574 in view of Chang and Chung as applied to claim 12 above, and further in view of Jung et al. (2023/0180537, hereafter Jung).
Regarding claim 14, Lee ‘574, Chang, and Chung discussed above fail to disclose a display panel wherein the fifth insulating layer includes photosensitive polyimide (PSPI).
However, Jung teaches a display panel wherein the fifth insulating layer includes photosensitive polyimide (PSPI) (par. 0121).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574, Chang, and Chung with Jung by providing an insulating layer of PSPI material in order to enable direct patterning of vias without etching while providing a planar surface and high insulation.
Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Lee ‘574 in view of Chang as applied to claim 1 above, and further in view of Lee ‘712 and Jung.
Regarding claim 17, Lee ‘574 discloses display panel wherein each of the light shielding pattern and the gate includes a first layer including titanium and a second layer including copper (par. 0127, 0137).
Lee ‘574 and Chang discussed above fail to disclose a light shielding pattern second layer including copper and the semiconductor pattern includes indium gallium zinc oxide (IGZO) and the first connection electrode includes a first layer including titanium, a second layer including copper and a third layer including indium tin oxide (ITO).
However, Jung teaches the first connection electrode (CL, Fig. 3) includes a first layer including titanium, a second layer including copper and a third layer (par. 0099).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Jung by providing titanium for a first layer, copper for a second layer, and a third layer in order to combine strong layer adhesion and barrier with low electrical resistance and also with oxidation protection and contact reliability.
Further, Lee ‘712 teaches a light shielding pattern having copper (par. 0060) and the semiconductor pattern includes indium gallium zinc oxide (IGZO) (par. 0043) and a connection electrode third layer including indium tin oxide (ITO) (par. 0068).
It would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify Lee ‘574 and Chang with Lee ‘712 by providing copper in the light shielding layer, IGZO in the semiconductor pattern, and ITO in the connection electrode in order to implement low signal resistance and high optical blocking, and IGZO has high electron mobility and low current leakage.
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/C.M.B./ Examiner, Art Unit 2817
/MARLON T FLETCHER/ Supervisory Primary Examiner, Art Unit 2817