DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Status of Claims
3. This action is in response to Applicant’s RCE dated 12/01/2025.
4. Claims 1-7 and 9-15 are currently pending.
5. Claims 1-2 and 9-10 have been amended.
6. Claims 8 and 16-20 have been cancelled.
Continued Examination Under 37 CFR 1.114
7. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 12/01/2025 has been entered.
Claim Rejections - 35 USC § 112
8. The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
9. Claims 7 and 15 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 7:
Claim 7 recites “a distance between the first electrode and the edge ring in the vertical direction is same as a distance between the second electrode and the outer ring in the vertical direction”. Nothing in the specification indicates that applicant had possession of this claimed invention. To the extent that applicant may attempt to rely on the drawings, it is noted that nothing indicates that the drawings are to scale. For example, a difference of 0.0001 cm means that the distances are not the same. Examiner suggests claiming “substantial the same”.
Regarding claim 15:
Claim 15 recites “a distance between the first electrode and the edge ring in the vertical direction is same as a distance between the second electrode and the outer ring in the vertical direction”. Nothing in the specification indicates that applicant had possession of this claimed invention. To the extent that applicant may attempt to rely on the drawings, it is noted that nothing indicates that the drawings are to scale. For example, a difference of 0.0001 cm means that the distances are not the same. Examiner suggests claiming “substantial the same”.
Claim Rejections - 35 USC § 102
10. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
11. Claim(s) 1-4 and 9-12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cui et al (US 2019/0013184).
Regarding claim 1:
Cui teaches a plasma processing apparatus (100) [fig 1 & 0032] comprising: a chamber (101/102) [fig 1 & 0032]; a substrate support (104) [fig 1, 4A & 0033, 0059] including: a conductive base (baseplate, 405) [fig 1, 4A & 0033, 0060]; and an electrostatic chuck (240/109) having a substrate placing region (central region of 240) and an edge ring placing region (edge region of 240) [fig 4A & 0041]; an edge ring (edge ring, 106) disposed on the edge ring placing region (edge region of 240) so as to surround a substrate (105) on the substrate placing region (central region of 240) [fig 4A & 0032]; a radio frequency power source (second RF power source, 170) electrically connected to the conductive base (405) [fig 4A & 0033, 0060]; a bias power source (110) configured to periodically apply a pulsed direct-current voltage (pulsed DC source) to the conductive base (405) [fig 4A & 0033, 0037, 0060]; a first electrode (edge ring electrode, 111) disposed in the edge ring placing region of the electrostatic chuck (edge region of 240) [fig 4A & 0033, 0060]; and a first impedance adjuster (420) electrically connected between the conductive base (405) and the first electrode (111) [fig 4A & 0062].
Regarding claim 2:
The claim limitations “wherein the pulsed direct-current voltage has a negative polarity” are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Regarding claims 3-4:
Cui teaches the first impedance adjuster (420) includes one or more variable impedance elements (C5) [fig 4A & 0062]; and wherein the one or more variable impedance elements (C5) include a variable capacitor (variable capacitor) [fig 4A & 0062].
Regarding claim 9:
Cui teaches a plasma processing apparatus (100) [fig 1 & 0032] comprising: a chamber (101/102) [fig 1 & 0032]; a substrate support (104) having a substrate placing surface (central region of 240) and a ring placing surface (edge region of 240) [fig 1, 4A & 0033, 0059]; an edge ring (edge ring, 106) disposed on the ring placing surface (edge region of 240) so as to surround a substrate (105) on the substrate placing surface (central region of 240) [fig 4A & 0032, 0059]; a substrate electrode (baseplate, 405) disposed below the substrate placing surface (central region of 240) in the substrate support (104) [fig 1, 4A & 0033, 0060]; a ring electrode (edge ring electrode, 111) disposed below the ring placing surface (edge region of 240) in the substrate support (104) [fig 4A & 0033, 0060]; a radio frequency power source (second RF power source, 170) [fig 4A & 0033, 0060]; a bias power source (110) configured to periodically apply a pulsed direct-current voltage (pulsed DC source) to the substrate electrode (405) [fig 4A & 0033, 0037, 0060]; and a first impedance adjuster (420) electrically connected between the substrate electrode (405) and the ring electrode (111) [fig 4A & 0062].
Although taught by the cited prior art, the claim limitations “configured to generate a radio frequency power to generate a plasma in the chamber” are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Regarding claim 10:
The claim limitations “wherein the pulsed direct-current voltage has a negative polarity” are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Regarding claims 11-12:
Cui teaches the first impedance adjuster (420) includes one or more variable impedance elements (C5) [fig 4A & 0062]; and wherein the one or more variable impedance elements (C5) include a variable capacitor (variable capacitor) [fig 4A & 0062].
Claim Rejections - 35 USC § 103
12. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
13. Claim(s) 5-6 and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cui et al (US 2019/0013184) as applied to claims 1-4 and 9-12 above, and further in view of Zhao et al (US 2019/0206703).
The limitations of claims 1-4 and 9-12 have been set forth above.
Regarding claims 5-6:
Cui does not specifically disclose the first impedance adjuster includes a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series; and wherein the fixed impedance element is a fixed capacitor.
Zhao teaches the first impedance adjuster (124) includes a plurality of series circuits (branch circuits) connected in parallel (parallel connected), and each of the plurality of series circuits (branch circuits) includes a fixed impedance element (C1-C4) and a switching element (switches, RL1-RL4) connected in series (serially coupled) [fig 6A & 0026]; and wherein the fixed impedance element (C1-C4) is a fixed capacitor (fixed capacitors) [fig 6a & 0026].
It would have been obvious to one skilled in the art before the effective filing date to modify the first impedance adjuster of Cui to include a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series, as in Zhao, because such a structure allows for the capacitance to be tuned in multiple levels [Zhao – 0026].
Regarding claims 13-14:
Cui does not specifically disclose the first impedance adjuster includes a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series; and wherein the fixed impedance element is a fixed capacitor.
Zhao teaches the first impedance adjuster (124) includes a plurality of series circuits (branch circuits) connected in parallel (parallel connected), and each of the plurality of series circuits (branch circuits) includes a fixed impedance element (C1-C4) and a switching element (switches, RL1-RL4) connected in series (serially coupled) [fig 6A & 0026]; and wherein the fixed impedance element (C1-C4) is a fixed capacitor (fixed capacitors) [fig 6a & 0026].
It would have been obvious to one skilled in the art before the effective filing date to modify the first impedance adjuster of Cui to include a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series, as in Zhao, because such a structure allows for the capacitance to be tuned in multiple levels [Zhao – 0026].
14. Claim(s) 1-4 and 9-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishimura et al (US 2015/0079790) in view of Cui et al (US 2019/0013184).
Regarding claim 1:
Nishimura teaches a plasma processing apparatus (plasma etching apparatus, 310) [fig 3 & 0064] comprising: a chamber (processing chamber, 311) [fig 3 & 0064]; a substrate support (mounting unit, 312) including: a conductive base (base material made of a conductive metal) [fig 3 & 0065]; and an electrostatic chuck (electrostatic chuck, 323) having a substrate placing region (central region of 323) and an edge ring placing region (edge region of 323) [fig 3 & 0069]; an edge ring (focus ring, 326) disposed on the edge ring placing region (edge region of 323) so as to surround a substrate (W) on the substrate placing region (central region of 323) [fig 3 & 0065]; a radio frequency power source (318) electrically connected to the conductive base (base material) [fig 3 & 0067]; and a bias power source (320) [fig 3 & 0067].
Nishimura does not specifically disclose a bias power source configured to periodically apply a pulsed direct-current voltage to the conductive base; a first electrode disposed in the edge ring placing region of the electrostatic chuck; and a first impedance adjuster electrically connected between the conductive base and the first electrode.
Cui teaches a bias power source (110) configured to periodically apply a pulsed direct-current voltage (pulsed DC source) to the conductive base (405) [fig 4A & 0033, 0037, 0060]; a first electrode (edge ring electrode, 111) disposed in the edge ring placing region of the electrostatic chuck (edge region of 240) [fig 4A & 0033, 0060]; and a first impedance adjuster (420) electrically connected between the conductive base (405) and the first electrode (111) [fig 4A & 0062].
It would have been obvious to one skilled in the art before the effective filing date to modify the bias power source of Nishimura to periodically apply a pulsed direct-current voltage, as in Cui, because such is a functional equivalent effective to bias [Cui – 0033, 0037]. Furthermore, it would have been obvious to one skilled in the art before the effective filing date to modify the apparatus of Nishimura to comprise a first electrode and first impedance adjuster, as in Cui, to adjust the location of the plasma sheath in order to increase device yield per substrate [Cui – 0047, 0056].
Regarding claim 2:
The claim limitations “wherein the pulsed direct-current voltage has a negative polarity” are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Regarding claims 3-4:
Modified Nishimura teaches the first impedance adjuster (420) includes one or more variable impedance elements (C5) [Cui - fig 4A & 0062]; and wherein the one or more variable impedance elements (C5) include a variable capacitor (variable capacitor) [Cui - fig 4A & 0062].
Regarding claim 9:
Nishimura teaches a plasma processing apparatus (plasma etching apparatus, 310) [fig 3 & 0064] comprising: a chamber (processing chamber, 311) [fig 3 & 0064]; a substrate support (mounting unit, 312) having a substrate placing surface (top surface of central region of 323) and a ring placing surface (top surface of edge region of 323) [fig 3 & 0065, 0069]; an edge ring (focus ring, 326) disposed on the ring placing surface (top surface of edge region of 323) so as to surround a substrate (W) on the substrate placing surface (top surface of central region of 323) [fig 3 & 0065]; a substrate electrode (lower electrode) disposed below the substrate placing surface (top surface of central region of 323) in the substrate support (312) [fig 3 & 0065, 0069]; a radio frequency power source (318) configured to generate a radio frequency power to generate a plasma (for use in generating plasma) in the chamber (311) [fig 3 & 0067]; and a bias power source (320) [fig 3 & 0067].
Nishimura does not specifically disclose a ring electrode disposed below the ring placing surface in the substrate support; a bias power source configured to periodically apply a pulsed direct-current voltage to the substrate electrode; and a first impedance adjuster electrically connected between the substrate electrode and the ring electrode.
Cui teaches a ring electrode (edge ring electrode, 111) disposed below the ring placing surface in the substrate support (edge region of 240) [fig 4A & 0033, 0060]; a bias power source (110) configured to periodically apply a pulsed direct-current voltage (pulsed DC source) to the substrate electrode (405) [fig 4A & 0033, 0037, 0060]; and a first impedance adjuster (420) electrically connected between the substrate electrode (405) and the ring electrode (111) [fig 4A & 0062].
It would have been obvious to one skilled in the art before the effective filing date to modify the bias power source of Nishimura to periodically apply a pulsed direct-current voltage, as in Cui, because such is a functional equivalent effective to bias [Cui – 0033, 0037]. Furthermore, it would have been obvious to one skilled in the art before the effective filing date to modify the apparatus of Nishimura to comprise a ring electrode and first impedance adjuster, as in Cui, to adjust the location of the plasma sheath in order to increase device yield per substrate [Cui – 0047, 0056].
Regarding claim 10:
The claim limitations “wherein the pulsed direct-current voltage has a negative polarity” are merely intended use and are given weight to the extent that the prior art is capable of performing the intended use. A claim containing a “recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus” if the prior art apparatus teaches all the structural limitations of the claim. Ex parte Masham, 2 USPQ2d 1647 (Bd. Pat. App. & Inter. 1987).
Regarding claims 11-12:
Modified Nishimura teaches the first impedance adjuster (420) includes one or more variable impedance elements (C5) [Cui - fig 4A & 0062]; and wherein the one or more variable impedance elements (C5) include a variable capacitor (variable capacitor) [Cui - fig 4A & 0062].
15. Claim(s) 5-6 and 13-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishimura et al (US 2015/0079790) in view of Cui et al (US 2019/0013184) as applied to claims 1-4 and 9-12 above, and further in view of Zhao et al (US 2019/0206703).
The limitations of claims 1-4 and 9-12 have been set forth above.
Regarding claims 5-6:
Modified Nishimura does not specifically disclose the first impedance adjuster includes a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series; and wherein the fixed impedance element is a fixed capacitor.
Zhao teaches the first impedance adjuster (124) includes a plurality of series circuits (branch circuits) connected in parallel (parallel connected), and each of the plurality of series circuits (branch circuits) includes a fixed impedance element (C1-C4) and a switching element (switches, RL1-RL4) connected in series (serially coupled) [fig 6A & 0026]; and wherein the fixed impedance element (C1-C4) is a fixed capacitor (fixed capacitors) [fig 6a & 0026].
It would have been obvious to one skilled in the art before the effective filing date to modify the first impedance adjuster of modified Nishimura to include a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series, as in Zhao, because such a structure allows for the capacitance to be tuned in multiple levels [Zhao – 0026].
Regarding claims 13-14:
Modified Nishimura does not specifically disclose the first impedance adjuster includes a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series; and wherein the fixed impedance element is a fixed capacitor.
Zhao teaches the first impedance adjuster (124) includes a plurality of series circuits (branch circuits) connected in parallel (parallel connected), and each of the plurality of series circuits (branch circuits) includes a fixed impedance element (C1-C4) and a switching element (switches, RL1-RL4) connected in series (serially coupled) [fig 6A & 0026]; and wherein the fixed impedance element (C1-C4) is a fixed capacitor (fixed capacitors) [fig 6a & 0026].
It would have been obvious to one skilled in the art before the effective filing date to modify the first impedance adjuster of modified Nishimura to include a plurality of series circuits connected in parallel, and each of the plurality of series circuits includes a fixed impedance element and a switching element connected in series, as in Zhao, because such a structure allows for the capacitance to be tuned in multiple levels [Zhao – 0026].
16. Claim(s) 7 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Nishimura et al (US 2015/0079790) in view of Cui et al (US 2019/0013184) as applied to claims 1-4 and 9-12 above, and further in view of Selwyn et al (US 5,716,486).
The limitations of claims 1-4 and 9-12 have been set forth above.
Regarding claim 7:
Modified Nishimura teaches an outer ring (327) disposed so as to surround the edge ring (326) [Nishimura – fig 3 & 0065]; and an insulating member (side protecting member, 325) disposed so as to surround the substrate support (312), wherein the outer ring (327) is disposed on the insulating member (325) [Nishimura – fig 3 & 0065].
Modified Nishimura does not specifically disclose a second electrode disposed below the outer ring; an additional radio frequency power source electrically connected to the second electrode; and the second electrode is disposed in the insulating member and directly under the outer ring in a vertical direction, and a distance between the first electrode and the edge ring in the vertical direction is same as a distance between the second electrode and the outer ring in the vertical direction.
Selwyn teaches a second electrode (active buried element, 90) [fig 13 & col 8, lines 8-26]; and an additional radio frequency power source (92a) electrically connected to the second electrode (90) [fig 13 & col 8, lines 8-26; claim 5].
Furthermore, although Selwyn does not specifically disclose the claimed location of the second electrode, Selwyn teaches the location and/or configuration of electrodes is a result-effective variable [col 6-7, lines 45-6 and col 10, lines 10-31]. It would have been obvious to a person of ordinary skill in the art before the effective filing date to discover the optimum location for the second electrode through routine experimentation in order to equalize and regulate the plasma uniformity [Selwyn - col 10, lines 1010-31]. It has been held that discovering an optimum value of a result-effective variable involves only routine skill in the art [MPEP 2144.05].
Regarding claim 15:
Modified Nishimura teaches an outer ring (327) disposed so as to surround the edge ring (326) [Nishimura – fig 3 & 0065]; and an insulating member (side protecting member, 325) disposed so as to surround the substrate support (312), wherein the outer ring (327) is disposed on the insulating member (325) [Nishimura – fig 3 & 0065].
Modified Nishimura does not specifically disclose an additional ring electrode disposed below the outer ring; an additional radio frequency power source electrically connected to the additional ring electrode; and the additional ring electrode is disposed in the insulating member and directly under the outer ring in a vertical direction, and a distance between the ring electrode and the edge ring in the vertical direction is same as a distance between the additional ring electrode and the outer ring in the vertical direction.
Selwyn teaches an additional ring electrode (active buried element, 90) [fig 13 & col 8, lines 8-26]; and an additional radio frequency power source (92a) electrically connected to the additional ring electrode (90) [fig 13 & col 8, lines 8-26; claim 5].
Furthermore, although Selwyn does not specifically disclose the claimed location of the additional ring electrode, Selwyn teaches the location and/or configuration of electrodes is a result-effective variable [col 6-7, lines 45-6 and col 10, lines 10-31]. It would have been obvious to a person of ordinary skill in the art before the effective filing date to discover the optimum location for the additional ring electrode through routine experimentation in order to equalize and regulate the plasma uniformity [Selwyn - col 10, lines 1010-31]. It has been held that discovering an optimum value of a result-effective variable involves only routine skill in the art [MPEP 2144.05].
Response to Arguments
17. Applicant's arguments, see Remarks, filed 12/01/2025, with respect to the rejection of claim(s) 1-6, 9-14, and 17-18 under 35 USC 103 have been fully considered but are moot.
18. Applicant’s arguments, see Remarks, filed 12/01/2025, with respect to the objection(s) of claim(s) 7, 15, and 19 have been fully considered. However, upon further search and/or consideration, a new ground(s) of rejection is made in view of Selwyn et al (US 5,716,486).
Conclusion
19. Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN R KENDALL whose telephone number is (571)272-5081. The examiner can normally be reached Mon - Thurs 9-5 EST.
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/Benjamin Kendall/Primary Examiner, Art Unit 2896