Prosecution Insights
Last updated: August 18, 2026
Application No. 18/740,331

DISPLAY APPARATUS

Non-Final OA §102§103§112
Filed
Jun 11, 2024
Priority
Oct 27, 2023 — RE 10-2023-0145930
Examiner
LEE, ALVIN LYNGHI
Art Unit
Tech Center
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
1y 0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
69 granted / 79 resolved
+27.3% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
39 currently pending
Career history
122
Total Applications
across all art units

Statute-Specific Performance

§103
52.7%
+12.7% vs TC avg
§102
19.4%
-20.6% vs TC avg
§112
24.4%
-15.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 79 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the -first-1 shielding portion located between at least one of the plurality of data lines and the first-1 pixel electrode, the at least one of the plurality of data lines overlapping with the first-1 pixel electrode in a plan view of claim 9 -second-1 shielding portion located between at least one of the plurality of data lines and the second-1 pixel electrode, the at least one of the plurality of data lines overlapping with the second-1 pixel electrode in a plan view of claim 12 -third-1 shielding portion located between at least one of the plurality of data lines and the third-1 pixel electrode, the at least one of the plurality of data lines overlapping with the third-1 pixel electrode in a plan view of claim 15 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered. Regarding claim 9, Examiner notes that claim 9 appears to be drawn to either Fig 6 or Fig 9 and the first-1 shield portion appears to be drawn to SH1 within those Figures. Fig 6 does not show any data lines that overlap or would place the first-1 shielding portion between the first-1 pixel electrode and at least one of the plurality of data lines. Fig 9 does show horizontal data lines which would read on the limitations. However, the plurality of data lines as declared in claim 1 appear to be drawn to the vertical data lines, as claim 16, while not related on dependency, further limits the plurality of data lines to have vertical data lines around the plurality of data lines. While the limitation of “the first-1 shielding portion located between at least one of the plurality of data lines and the first-1 pixel electrode” could be interpreted as vertically diagonal; the other limitation of “the at least one of the plurality of data lines overlapping with the first-1 pixel electrode in a plan view” could not be interpreted in the same way since the pixel electrodes are not shown. Regarding claims 12 and 15, Examiner notes the limitations appear to be drawn to Figs 6 and 8. However, the pixel electrodes contained in the limitations is not shown in those Figures. Figs 4, 5, and 18 show the pixel electrodes but do not show their relationship to the plurality of data lines. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 6 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 6, the limitation in lines 3-4 claim a third-1 shielding portion is located between the first conductive layer and the second-1 pixel electrode. This reads the same as the limitation in lines 3-4 of claim 3 for the second-1 shielding portion. Since claim 6 is dependent on claim 3, it is not clear where the third-1 shield portion is supposed to be located. The limitation can be interpreted by Examiner as 1) the second-1 shielding portion and third-1 shielding portion are the same structure, 2) there is an additional third-1 shielding portion layer on/under a second-1 shielding portion layer, or 3) there is a typo and the third-1 shielding portion should be located between the first conductive layer and the third-1 pixel electrode. For purposes of Examination, Examiner will use the third interpretation of the limitation of the third-1 shielding portion should be located between the first conductive layer and the third-1 pixel electrode. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Cho et. al. (US 20200013337 A1), hereinafter Cho. Regarding claim 1, Cho teaches a display apparatus (Fig 1 unlabeled display apparatus, [0066]) comprising: a substrate (Fig 10 substrate 110, [0095]); a pixel circuit layer (Fig 10 layer from buffer layer 111 to insulating layer 150) on the substrate (Fig 10 substrate 110, [0095]); a first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) on the pixel circuit layer (Fig 10 layer from buffer layer 111 to insulating layer 150), and comprising a plurality of data lines (Fig 7 data line 171, [0120]; Examiner notes the data line shown is for one pixel so the apparatus would have a plurality of data lines); a first-1 pixel electrode (Figs 9 and 10 pixel electrode 210, [0134]) on the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]); a second conductive layer (Figs 8 and 10 conductive layer 178, [0127]) between the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) and the first-1 pixel electrode (Figs 9 and 10 pixel electrode 210, [0134]), and comprising: a plurality of power lines (Fig 8 wiring portion 178a, [0128]; Examiner notes the wiring portion shown is for one pixel so the apparatus would have a plurality of power lines; Also, the conductive layer may be connected to wiring with constant voltage, [0129]); and a first-1 shielding portion (Fig 8 extending portion 178b, [0128]) overlapping with (Fig 12) the first-1 pixel electrode (Figs 9 and 10 pixel electrode 210, [0134]) in a plan view; and a first-1 light-emitting element (Fig 10 emission layer 220, [0143]) on the first-1 pixel electrode (Figs 9 and 10 pixel electrode 210, [0134]), wherein the plurality of power lines (Fig 8 wiring portion 178a, [0128]) and the first-1 shielding portion (Fig 8 extending portion 178b, [0128]) are integrated with each other (Fig 8). Regarding claim 2, Cho teaches a second-1 pixel electrode (Fig 13 pixel electrode 212 for PX2, [0158]) on the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) and at a same layer as that of the first-1 pixel electrode (Figs 9 and 10 pixel electrode 210 corresponds to pixel electrode 211 for PX1, [0134]); a second-1 light-emitting element (Fig 13 not shown but correlates to emitting region EM2) on the second-1 pixel electrode (Fig 13 pixel electrode 212 for PX2, [0158]); a third-1 pixel electrode (Fig 13 pixel electrode 213 for PX3, [0158]) on the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) and at a same layer as that of the second-1 pixel electrode (Fig 13 pixel electrode 212 for PX2, [0158]); and a third-1 light-emitting element (Fig 13 not shown but correlates to emitting region EM3) on the third-1 pixel electrode (Fig 13 pixel electrode 213 for PX3, [0158]). Regarding claim 3, Cho teaches the second conductive layer (Figs 8 and 10 conductive layer 178, [0127]) further comprises a second-1 shielding portion (Fig 13 extending portion 178b-2, [0159]) at a same layer ([0160])as that of the first-1 shielding portion (Fig 8 extending portion 178b corresponds to 178b-1, [0159]), and located between the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) and the second-1 pixel electrode (Fig 13 pixel electrode 212 for PX2, [0158]). Regarding claim 4, Cho teaches the plurality of power lines (Fig 13 wiring portion 178a-1, 178a-2, 178a-3, [0159]), the first-1 shielding portion (Fig 8 extending portion 178b, [0128]), and the second-1 shielding portion (Fig 13 extending portion 178b-2, [0159]) are integrated with each other ([0161]). Regarding claim 5, Cho teaches the plurality of power lines (Fig 13 wiring portion 178a-1, 178a-2, 178a-3, [0159]) comprises: a first vertical power line (Fig 13 wiring portion 178a-1, [0159]) extending in a first direction (Fig 13 y direction); and a first horizontal power line (Fig 13 extending potion 178b-1, 178b-2, 178b-3, [0159]; since wiring portions are integrated with the extending portions and power they are also power lines) extending in a second direction (Fig 13 x direction) crossing the first direction (Fig 13 y direction), and integrated with ([0161]) the first vertical power line (Fig 13 wiring portion 178a-1, [0159]). Regarding claim 6, Cho teaches the second conductive layer (Figs 8 and 10 conductive layer 178, [0127]) further comprises a third-1 shielding portion (Fig 13 extending portion 178b-3, [0159]) at a same layer as that of the first-1 shielding portion (Fig 8 extending portion 178b, [0128]), and located between the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) and the second-1 pixel electrode (Fig 13 pixel electrode 213 for PX3, [0158]). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 7-16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Cho et. al. (US 20200013337 A1), hereinafter Cho. Regarding claim 7, Cho teaches in a plan view, a shape of the first-1 shielding portion (Fig 16 extending portion 178b, [0173]) corresponds to a shape of (Fig 16) the first-1 light-emitting element (Fig 16 emitting region EM, [0173]). Regarding claim 8, Cho teaches in a plan view, an area of the first-1 light-emitting element (Fig 16 emitting region EM, [0173]) is less than an area ([0173]) of the first-1 shielding portion (Fig 16 extending portion 178b, [0173]). Regarding claim 9, Cho fails to teach the first-1 shielding portion is located between at least one of the plurality of data lines and the first-1 pixel electrode, the at least one of the plurality of data lines overlapping with the first-1 pixel electrode in a plan view. However, Cho teaches a data line 171 on a side of an extending portion 178 (Fig 3). Further, Cho teaches multiple extending portions with a space in between (Fig 19). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that the data line 171 would be located in the space between the extending portions 178a-1 and 178a-2 in Fig 19 of Cho. Thus, the first-1 shielding portion (Fig 19 extending portion 178b-1, [0184]) would be located between at least one of the plurality of data lines (Fig 19 not shown data line 171 between vertical extending portions) and the first-1 pixel electrode (Fig 19 pixel electrode 211’, [0184]), the at least one of the plurality of data lines (Fig 19 not shown data line 171 between vertical extending portions) overlapping with the first-1 pixel electrode (Fig 19 pixel electrode 211’, [0184]) in a plan view. Regarding claim 10, Cho teaches in a plan view, a shape of the second-1 shielding portion (Fig 16 extending portion 178b-2, [0186]) corresponds to a shape (Fig 19) of the second-1 light-emitting element (Fig 16 unlabeled emitting region EM in 178b-2, [0186]). Regarding claim 11, Cho teaches in a plan view, an area of the second-1 light-emitting element (Fig 16 unlabeled emitting region EM in 178b-2, [0186]) is less than an area ([0186]) of the second-1 shielding portion (Fig 16 extending portion 178b-2, [0186]). Regarding claim 12, Cho fails to teach the second-1 shielding portion is located between at least one of the plurality of data lines and the second-1 pixel electrode, the at least one of the plurality of data lines overlapping with the second-1 pixel electrode in a plan view. However, Cho teaches a data line 171 on a side of an extending portion 178 (Fig 3). Further, Cho teaches multiple extending portions with a space in between (Fig 19). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that the data line 171 would be located in the space between the extending portions 178a-2 and a third wiring portion not shown in Fig 19 of Cho. Thus, the second-1 shielding portion (Fig 19 extending portion 178b-2, [0184]) is located between at least one of the plurality of data lines (Fig 19 not shown data line 171 between vertical extending portions) and the second-1 pixel electrode (Fig 17 pixel electrode 212’, [0184]), the at least one of the plurality of data lines (Fig 19 not shown data line 171 between vertical extending portions) overlapping with the second-1 pixel electrode (Fig 17 pixel electrode 212’, [0184]) in a plan view. Regarding claim 13, Cho teaches in a plan view, a shape of the third-1 shielding portion (Fig 19 extending portion 178b-1 of adjacent pixel in x-direction as shown in Fig 20, [0186]) corresponds to a shape (Fig 19) of the third-1 light-emitting element (Fig 19 emitting region EM, [0173] of adjacent pixel in x-direction as shown in Fig 20, [0186]). Regarding claim 14, Cho teaches in a plan view, an area of the third-1 light-emitting element (Fig 19 emitting region EM, [0173] of adjacent pixel in x-direction as shown in Fig 20, [0186]) is less than an area (Fig 19) of the third-1 shielding portion (Fig 19 extending portion 178b-1 of adjacent pixel in x-direction as shown in Fig 20, [0186]). Regarding claim 15, Cho fails to teach the third-1 shielding portion is located between at least one of the plurality of data lines (Fig 7 data line 171, [0120]) and the third-1 pixel electrode, the at least one of the plurality of data lines (Fig 7 data line 171, [0120]) overlapping with the third-1 pixel electrode in a plan view. However, Cho teaches a data line 171 on a side of an extending portion 178 (Fig 3). Further, Cho teaches multiple extending portions with a space in between (Fig 19). One having ordinary skill in the art before the effective filing date of the claimed invention would recognize that the data line 171 would be located in the space between the extending portions 178a-1 and a third wiring portion not shown in Fig 19 of Cho. Thus, the third-1 shielding portion (Fig 19 extending portion 178b-1 of adjacent pixel in x-direction as shown in Fig 20, [0186]) is located between at least one of the plurality of data lines (Fig 19 not shown data line 171 between vertical extending portions) and the third-1 pixel electrode (Fig 19 pixel electrode 211’, [0184] of an adjacent pixel in the x-direction as shown in Fig 20, [0186]), the at least one of the plurality of data lines (Fig 19 not shown data line 171 between vertical extending portions) overlapping with the third-1 pixel electrode (Fig 19 pixel electrode 211’, [0184] of an adjacent pixel in the x-direction as shown in Fig 20, [0186]) in a plan view. Regarding claim 16, Cho teaches the first conductive layer (Fig 7 and 10 layer from insulating layer 141 to insulating layer 160, [0092]) further comprises: a first vertical data line (Examiner considers a left portion of data line 171 to be a first vertical data line) around the plurality of data lines (Fig 7 data line 171, [0120]), and extending in a first direction (Fig 7 y direction); and a first horizontal data line (Fig 5 scan line 121, [0069]) extending in a second direction (Fig 5 x direction) crossing the first direction (Fig 7 y direction), and electrically connected (data line 171 is connected through contact hole 154 to semiconductor layer with channel region 131b [0121];131b corresponds to 125b of scan line 121, [0109]]) to the first vertical data line (Examiner considers a left portion of data line 171 to be a first vertical data line). Regarding claim 20, Cho teaches in a plan view, an area of the first-1 pixel electrode (Fig 16 pixel electrode 210, [0173]) is greater than an area of the first-1 shielding portion (Fig 16 extending portion 178b, [0173]). Allowable Subject Matter Claims 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 17, the closest art is Cho et. al. (US 20200013337 A1), hereinafter Cho. Cho fails to teach the first horizontal data line comprises a first-1 horizontal data line, and a first-2 horizontal data line spaced from the first-1 horizontal data line, and wherein the first-1 horizontal data line and the first-2 horizontal data line are electrically connected to each other by a first-1 bridge line at a same layer as that of the second conductive layer. Claims 18 and 19 would also be allowable because they are dependent on claim 17. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Fang et. al. (US 20250246135 A1) teaches auxiliary electrodes placed under pixel electrodes. The auxiliary electrodes are the same shape as the pixel electrodes and are connected to each other. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALVIN L LEE whose telephone number is (703)756-1921. The examiner can normally be reached Monday - Friday 8:30 am - 5 pm (ET). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN GAUTHIER can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALVIN L LEE/Examiner, Art Unit 2813 /STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
Read full office action

Prosecution Timeline

Jun 11, 2024
Application Filed
Aug 04, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+10.8%)
3y 2m (~1y 0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 79 resolved cases by this examiner. Grant probability derived from career allowance rate.

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