Prosecution Insights
Last updated: October 02, 2026
Application No. 18/742,136

DISPLAY DEVICE

Non-Final OA §103
Filed
Jun 13, 2024
Priority
Nov 14, 2023 — RE 10-2023-0157097
Examiner
MARUF, SHEIKH
Art Unit
Tech Center
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
492 granted / 567 resolved
+26.8% vs TC avg
Moderate +9% lift
Without
With
+9.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
33 currently pending
Career history
588
Total Applications
across all art units

Statute-Specific Performance

§101
4.2%
-35.8% vs TC avg
§103
72.4%
+32.4% vs TC avg
§102
13.7%
-26.3% vs TC avg
§112
7.5%
-32.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 567 resolved cases

Office Action

§103
DETAILED ACTION The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-22 are rejected under 35 U.S.C. 103 as being unpatentable over Kang et al. (US PGpub: 2025/0068019 A1), herein after Kang, in view of Kang. Regarding claim 1, Kang teaches a display device comprising: a first conductive layer (consisting of GE and CE3 having ML1 and also ML2, ML3) disposed on a substrate (101) and comprising at least two metal layers (GE and CE3, A material of the first metal layer may include metals (such as molybdenum, aluminum, copper, nickel, chromium), alloys, nitrides of metal materials, oxides of the metal materials, oxynitrides of the metal materials, other suitable materials, or a stacked layer of the metal materials and other conductive materials as in Paragraph [0040]); a first insulating film (insulation layer 110) on the first conductive layer; a transistor (T) on the first insulating film (110); a pixel electrode (PE) on the transistor; an emissive layer (liquid crystal layer LCL) on the pixel electrode (PE); a common electrode (CEL) on the emissive layer (LCL). Kang does not explicitly teach a first blocking film disposed on a side surface of one of the at least two metal layers of the first conductive layer. However, difference could be easily derived by a person skilled in the art from the feature in Kang wherein gate GE is electrically connected to one of the corresponding scan lines GL (FIG. 1, 4A, 5C). More specifically, an extended portion of the scan line GL corresponding to the pixel structure PX may be used as the gate GE of the active device T, and an extended portion of the data line DL corresponding to the pixel structure PX may be used as the source SE of the active device T. So, from FIG.4A, GL which is considered blocking film which is disposed on the side surface of GE. See FIG. 5C as well. Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to use Kang’s display device with teachings by Kang so that the capacitive coupling effect between the second common electrode CE2 and the signal line (such as the data line DL or the scan line GL) may be effectively reduced. Therefore, a range of configuration of the second common electrode CE2 may be further expanded. For example, as shown in FIGS. 1, 4A, 4C, and 4F, the second common electrode CE2 may overlap and cover the scan line GL and the data line DL electrically connected to the pixel structure PX in the direction Z. Regarding claim 2, Kang teaches the display device of claim 1, wherein the at least two metal layers comprise: a first metal layer on the substrate (ML1 consisting of GE and CE3, FIG. 2); a second metal layer (ML2 consisting of DE, SE, CPE and DL) on the first metal layer; and a third metal layer (ML3) on the second metal layer. Regarding claim 3, Kang teaches the display device of claim 2, wherein the first blocking film (GL which is considered blocking film) is disposed on a side surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) in FIG. 5C and FIG.1. Regarding claim 4, Kang teaches the display device of claim 3, wherein the first blocking film (GL which is considered blocking film) surrounds the side surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) in a plan view of FIG. 5C and FIG.1. Regarding claim 5, Kang teaches the display device of claim 3, wherein the first blocking film (GL which is considered blocking film) is disposed on the side surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) between edges of the first metal layer and edges of the third metal layer (ML3 consisting of DME and CE1) in FIG. 5C and FIG.1. Regarding claim 6, Kang teaches the display device of claim 3, wherein the second metal layer (ML2 consisting of DE, SE, CPE and DL) is surrounded by the first metal layer (ML1 consisting of GE and CE3, FIG. 2), the third metal layer (ML3 consisting of DME and CE1), and the first blocking film (GL) in FIG. 5C and FIG.1. Regarding claim 7, Kang teaches the display device of claim 2, wherein each of the first metal layer and the third metal layer includes titanium, and the second metal layer includes aluminum (such as molybdenum, aluminum, copper, nickel, chromium), alloys, nitrides of metal materials, oxides of the metal materials, oxynitrides of the metal materials, other suitable materials, or a stacked layer of the metal materials and other conductive materials as in Paragraph [0040]). Regarding claim 8, Kang teaches the display device of claim 1, wherein the at least two metal layers comprise: a first metal layer (ML1 consisting of GE and CE3, FIG. 2) on the substrate (101); and a second metal layer (ML2 consisting of DE, SE, CPE and DL) on the first metal layer in the Z direction in FIG. 1. And CPE is on GE in Y direction in FIG. 5C Regarding claim 9, Kang teaches the display device of claim 8, wherein the first blocking film (GL) is disposed on a side surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) in FIG. 5C and FIG.1. Regarding claim 10, Kang teaches the display device of claim 9, wherein the first blocking film (GL) is further disposed on an upper surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) in X direction. Regarding claim 11, Kang teaches the display device of claim 10, wherein the first blocking film surrounds the side surface of the second metal layer in a plan view (GL which is considered blocking film surrounds the side surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) in a plan view of FIG. 5C and FIG.1.). Regarding claim 12, Kang teaches the display device of claim 10, wherein the first blocking film (GL) is disposed on the side surface of the second metal layer (ML2 consisting of DE, SE, CPE and DL) at edges of the first metal layer in FIG. 5C and FIG.1. Regarding claim 13, Kang teaches the display device of claim 10, wherein the second metal layer (ML2 consisting of DE, SE, CPE and DL) is surrounded by the first metal layer (ML1 consisting of GE and CE3, FIG. 2) and the first blocking film (GL) in FIG. 5C and FIG.1. Regarding claim 14, Kang teaches the display device of claim 1, wherein the at least two metal layers comprise: a first metal layer a first metal layer (ML1 consisting of GE and CE3, FIG. 2) on the substrate (101); and a second metal layer (ML2 consisting of DE, SE, CPE and DL) on the first metal layer in the Z direction in FIG. 1. And CPE is on GE in Y direction in FIG. 5C. Regarding claim 15, Kang teaches the display device of claim 14, wherein the first blocking film (GL) is disposed on a side surface of the first metal layer (ML1 consisting of GE and CE3, FIG. 2) in FIG. 5C and FIG.1. Regarding claim 16, Kang teaches the display device of claim 15, wherein the first blocking film (GL) surrounds the side surface of the first metal layer (ML1 consisting of GE and CE3, FIG. 2) in a plan view of FIG. 5C and FIG.1. Regarding claim 17, Kang teaches the display device of claim 15, wherein the first blocking film (GL) is disposed on the side surface of the first metal layer ML1 consisting of GE and CE3, FIG. 2) at edges of the second metal layer (ML2 consisting of DE, SE, CPE and DL) in FIG. 5C and FIG.1. Regarding claim 18, Kang teaches the display device of claim 15, further comprising: a second insulating film (121) disposed between the substrate (101) and the first conductive layer (CE3 is a part of first conductive layer), wherein the first metal layer (ML1 consisting of GE and CE3, FIG. 2) is surrounded by the second insulating film(121), the second metal layer (ML2 consisting of DE, SE, CPE and DL), and the first blocking film (GL). In FIG. 1 and 5C Regarding claim 19, Kang teaches the display device of claim 1, further comprising: a second conductive layer (CE2) on the first insulating film (110) in FIG. 2. Regarding claim 20, Kang teaches the display device of claim 19, wherein the second conductive layer (CE2) overlaps the first conductive layer (CPE) in a plan view in FIG. 1. Regarding claim 21, Kang teaches the display device of claim 19, wherein the second conductive layer (CE2) comprises at least two metal layers (common electrode layer CEL may include a transparent conductive material, and the transparent conductive material may, for example, include metal oxides (e.g., indium tin oxide, indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or other suitable oxides, or a stacked layer of at least two of the above as in Paragraph [0039]). Regarding claim 22, Kang teaches the display device of claim 21, further comprising: a second blocking film (passivation material layer 124) disposed on a side surface of one of the at least two metal layers of the second conductive layer (CE2), in FIG. 2. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHEIKH MARUF whose telephone number is (571)270-1903. The examiner can normally be reached M-F, 8am-6pm EDT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Chad Dicke can be reached on 571-270-7996. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHEIKH MARUF/Primary Examiner, Art Unit 2897
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Prosecution Timeline

Jun 13, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
96%
With Interview (+9.2%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 567 resolved cases by this examiner. Grant probability derived from career allowance rate.

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