DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 4 – 8, and 10 - 15 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Group, there being no allowable generic or linking claim. Election was made with traverse in the reply filed on June 3, 2026. The Restriction still stands for reasons as set forth in the Requirement for Restriction/Election dated April 22, 2026.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 – 3 and 16 – 21 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wang et al. (U.S. Patent No. 11,259,403).
Regarding claim 1, in Figure 2, Wang discloses an apparatus, comprising: a power source (130) for providing electrical power; a point-of-load (internal power regulators/host device 50, Figs. 1 – 2) for receiving the electrical power from the power source via a power circuit (140); and a sense circuit (150) directly connecting the power source to the point-of-load, wherein the power source is configured to sense a load variation via the sense circuit and regulate a voltage of the electrical power provided therefrom based on the sensed load variation (via the step-up regulator and step-down regulator), wherein the sense circuit and the power circuit are electrically coupled solely through the point-of-load (Figure 2).
Regarding claim 2, Wang discloses wherein the power source is a voltage regulator and the point-of-load is an internal power plane of an electronic device (Figure 2).
Regarding claim 3, Wang discloses wherein a voltage drop from the power source to the point-of-load is determined by a dimension between a first connection between the power circuit and the point-of-load and a second connection between the point-of-load and the sense circuit (Figure 2).
Regarding claim 16, Wang discloses a printed circuit board (PCB) that includes the power circuit and the sense circuit, wherein the power circuit and the sense circuit are electrically isolated from each other within the PCB, wherein the point-of-load is an IC power plane of an integrated circuit coupled to the PCB, integrated circuit including one or more power pins and an isolated pin, wherein the one or more power pins are electrically coupled to the isolated pin via the IC power plane, wherein the one or more power pins are electrically coupled to the power circuit of the PCB and the isolated pin is electrically coupled to the sense circuit, wherein the power source is a voltage regulator coupled to the PCB, the voltage regulator including one or more output pins and a sense pin, wherein the one or more output pins are electrically coupled to the power circuit of the PCB and the sense pin is electrically coupled to the sense circuit of the PCB, wherein the voltage regulator is configured to provide electrical power to the integrated circuit via the power circuit, sense a load variation at the sense pin, and regulate a voltage of the electrical power based on the load variation sensed (Figure 2).
Regarding claim 17, Wang discloses wherein the power circuit includes a first power via that is in electrical contact with the one or more output pins of the voltage regulator, a second power via that is in electrical contact with the one or more power pins of the integrated circuit, and a PCB power plane that connects the first power via to the second power via, wherein the voltage regulator is configured to provide the electrical power to the integrated circuit through the PCB power plane (Figure 2).
Regarding claim 18, Wang discloses wherein the sense circuit includes a first sense via that is in electrical contact with the sense pin of the voltage regulator, a second sense via that is in electrical contact with the isolated pin of the integrated circuit, and a trace formed on an inner layer of the PCB that connects the first via and the second via (Figure 2).
Regarding claim 19, Wang discloses wherein the voltage regulator is a switching voltage regulator, and the apparatus includes an inductor coupled to the PCB and electrically coupled between the switching voltage regulator and the integrated circuit, wherein the inductor is configured to receive the electrical power from the switching voltage regulator and output the electrical power to the power circuit of the PCB (Figure 2).
Regarding claim 20, Wang discloses wherein the voltage regulator is a linear voltage regulator, and the linear voltage regulator is directly coupled to the power circuit of the PCB (Figure 2).
Regarding claim 21, Wang discloses wherein the integrated circuit is coupled to the PCB with a ball grid array, wherein a first set of contacts of the ball grid array electrically contact the power circuit, wherein an isolated contact of the ball grid array electrically contacts the sense circuit (Figure 2).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TREMESHA W BURNS whose telephone number is (571)270-3391. The examiner can normally be reached Monday-Friday 8am - 4:30 pm EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
TREMESHA W. BURNS
Primary Examiner
Art Unit 2847
/TREMESHA W BURNS/Primary Examiner, Art Unit 2847
Prosecution Insights